Abstract: Example embodiments relate to a three-dimensional image sensor including a color pixel array on a substrate, a distance pixel array on the substrate, an RGB filter on the color pixel array and configured to allow visible light having a first wavelength to pass, a near infrared light filter on the distance pixel array and configured to allow near infrared light having a second wavelength to pass, and a stack type single band filter on the RGB filter and the near infrared light filter and configured to allow light having a third wavelength between the first wavelength and the second wavelength to pass.

Abstract: Provided are a non-volatile memory device that may expand to a stacked structure and may be more easily highly integrated and an economical method of fabricating the non-volatile memory device. The non-volatile memory device may include at least one semiconductor column. At least one first control gate electrode may be arranged on a first side of the at least one semiconductor column. At least one second control gate electrode may be arranged on a second side of the at least one semiconductor column. A first charge storage layer may be between the at least one first control gate electrode and the at least one semiconductor column. A second charge storage layer may be between the at least one second control gate electrode and the at least one semiconductor column.

Abstract: Provided is a nonvolatile semiconductor memory device and a method of manufacturing the same. The nonvolatile semiconductor memory device may include a tunnel insulating layer formed on a semiconductor substrate, a charge trap layer including a dielectric layer doped with a transition metal formed on the tunnel insulating layer, a blocking insulating layer formed on the charge trap layer, and a gate electrode formed on the blocking insulating layer. The dielectric layer may be a high-k dielectric layer, for example, a HfO2 layer. Thus, the data retention characteristics of the nonvolatile semiconductor memory device may be improved because a deeper charge trap may be formed by doping the high-k dielectric layer with a transition metal.

Abstract: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in the well between the source and the drain regions.

Abstract: Provided is a method of reliably operating a highly integratable nonvolatile memory device. The nonvolatile memory device may include a string selection transistor, a plurality of memory transistors, and a ground selection transistor between a bit line and a common source line. In the nonvolatile memory device, data may be erased from the memory transistors by applying an erasing voltage to the bit line or the common source line.

Abstract: Methods of reading memory cell data and nonvolatile memory devices, which apply a low voltage to memory cells adjacent to a memory cell from which data may be read are provided. Methods of reading memory cell data of nonvolatile memory device include applying a first voltage to a control gate of a read memory cell from among the plurality of memory cells, applying a third voltage to control gates of memory cell adjacent to the read memory cell, and applying a second voltage to control gates of memory cells other than the read memory cell and the adjacent memory cells.

Abstract: A semiconductor memory device performing an erase operation using an erase gate and a method of manufacturing the same are provided. The memory device may include a charge trap layer storing a first charge transfer medium having a first polarity and at least one erase gate. The at least one erase gate may be formed below the charge trap layer. A second charge transfer medium, which has a second polarity opposite to the first polarity, may be stored in the at least one erase gate. During the erase operation, the second charge transfer medium migrates to the charge trap layer causing the first charge transfer medium to combine with the second charge transfer medium.

Abstract: An image sensor including a noise removing unit may sense images accurately by measuring the amount of noise generated when the image sensor does not perform a sensing operation, storing information about the measured noise amount in each pixel, and removing photocharge corresponding to the information about the measured noise amount during image sensing.

Abstract: Provided is a method of reliably operating a highly integratable nonvolatile memory device. The nonvolatile memory device may include a string selection transistor, a plurality of memory transistors, and a ground selection transistor between a bit line and a common source line. In the nonvolatile memory device, data may be erased from the memory transistors by applying an erasing voltage to the bit line or the common source line.

Abstract: Provided are a memory device, a method of manufacturing the same, and a method of operating the same. The memory device may include a channel region having an upper end where both sides of the upper end are curved, the curved portions of both sides allowing charges to be injected thereinto in a program or erase voltage such that the curved portions into which the charges are injected are separate from a portion which determines a threshold voltage, and a gate structure on the channel region.

Abstract: A method of manufacturing a silicon optoelectronic device, a silicon optoelectronic device manufactured by the method, and an image input and/or output apparatus including the silicon optoelectronic device are provided. The method includes preparing an n- or p-type silicon-based substrate, forming a microdefect pattern along a surface of the substrate by etching, forming a control film with an opening on the microdefect pattern, and forming a doping region on the surface of the substrate having the microdefect pattern in such a way that a predetermined dopant of the opposite type to the substrate is injected onto the substrate through the opening of the control film to be doped to a depth so that a photoelectric conversion effect leading to light emission and/or reception by quantum confinement effect in the p-n junction occurs.

Abstract: A method of manufacturing a silicon optoelectronic device, a silicon optoelectronic device manufactured by the method, and an image input and/or output apparatus including the silicon optoelectronic device are provided. The method includes preparing an n- or p-type silicon-based substrate, forming a microdefect pattern along a surface of the substrate by etching, forming a control film with an opening on the microdefect pattern, and forming a doping region on the surface of the substrate having the microdefect pattern in such a way that a predetermined dopant of the opposite type to the substrate is injected onto the substrate through the opening of the control film to be doped to a depth so that a photoelectric conversion effect leading to light emission and/or reception by quantum confinement effect in the p-n junction occurs.

Abstract: A light-emitting device that improves the injection efficiency of electrons or holes by providing electrons or holes to an emitting layer using nano size needles, including a first electrode with a first polarity a second electrode with a second polarity opposite to the first polarity an emitting layer interposed between the first electrode and the second electrode to emit light and a plurality of conductive needles inserted in the first electrode and extending toward the emitting layer.

Abstract: An image sensor device may include a dual-gated charge storage region within a substrate. The dual-gated charge storage region includes first and second diodes within a common charge generating region. This charge generating region is configured to receive light incident on a surface of the image sensor device. The first and second diodes include respective first conductivity type regions responsive to first and second gate signals, respectively. These first and second gate signals are active during non-overlapping time intervals.

Abstract: A non-volatile memory device may include at least one semiconductor layer, a plurality of control gate electrodes, a plurality of charge storage layers, at least one first auxiliary electrode, and/or at least one second auxiliary electrode. The plurality of control gate electrodes may be recessed into the semiconductor layer. The plurality of charge storage layers may be between the plurality of control gate electrodes and the semiconductor layer. The first and second auxiliary electrodes may be arranged to face each other. The plurality of control gate electrodes may be between the first and second auxiliary electrodes and capacitively coupled with the semiconductor layer.

Abstract: A light-emitting device that improves the injection efficiency of electrons or holes by providing electrons or holes to an emitting layer using nano size needles, including a first electrode with a first polarity a second electrode with a second polarity opposite to the first polarity an emitting layer interposed between the first electrode and the second electrode to emit light and a plurality of conductive needles inserted in the first electrode and extending toward the emitting layer.

Abstract: A highly integrated non-volatile memory device and a method of operating the non-volatile memory device are provided. The non-volatile memory device includes a semiconductor layer. A plurality of upper control gate electrodes are arranged above the semiconductor layer. A plurality of lower control gate electrodes are arranged below the semiconductor layer, and the plurality of upper control gate electrodes and the plurality of lower control gate electrodes are disposed alternately. A plurality of upper charge storage layers are interposed between the semiconductor layer and the upper control gate electrodes. A plurality of lower charge storage layers are interposed between the semiconductor layer and the lower control gate electrodes.

Abstract: Provided is a pixel array of a three-dimensional image sensor. The pixel array includes unit pixel patterns each including a color pixel and a distance-measuring pixel arranged in an array form. The unit pixel patterns are arranged in such a way that a group of distance-measuring pixels are disposed adjacent to each other.

Abstract: An image sensor includes a plurality of pixels disposed in an array, each pixel comprising a first region and a second region, the first region and the second region separated from each other in a semiconductor layer, and doped with impurities having different conductivities from each other, a photoelectric conversion region formed between the first and second regions, and at least one metal nanodot that focuses an incident light onto the photoelectric conversion region.

Abstract: Provided is a bulb-type light concentrated solar cell module that includes a reflective mirror unit that is concavely formed to convergingly reflect sunlight and has a first hole on a bottom thereof; a solar cell that generates electrical energy in response to light received from the reflective mirror unit; a socket that blocks the first hole at a lower part of the reflective mirror unit and is fixed on the reflective mirror unit; and a power control unit that is electrically connected to the solar cell to generate electricity in the socket.