Patents by Inventor Young Hee Kim

Young Hee Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9722031
    Abstract: A method for fabricating a semiconductor device may include receiving a gated substrate comprising a substrate with a channel layer and a gate structure formed thereon, over-etching the channel layer to expose an extension region below the gate structure, epitaxially growing a halo layer on the exposed extension region using a first in-situ dopant and epitaxially growing a source or drain on the halo layer using a second in-situ dopant, wherein the first in-situ dopant and the second in-situ dopant are of opposite doping polarity. Using an opposite doping polarity may provide an energy band barrier for the semiconductor device and reduce leakage current. A corresponding apparatus is also disclosed herein.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: August 1, 2017
    Assignee: International Business Machines Corporation
    Inventors: Cheng-Wei Cheng, Pranita Kerber, Young-Hee Kim, Effendi Leobandung, Yanning Sun
  • Patent number: 9711417
    Abstract: A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces. The epitaxial semiconductor material can be different from the single crystalline semiconductor material, and the semiconductor shell can be bilaterally strained due to lattice mismatch. A fin field effect transistor including a strained channel can be formed. Further, the semiconductor shell can advantageously alter properties of the source and drain regions, for example, by allowing incorporation of more dopants or by facilitating a metallization process.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: July 18, 2017
    Assignee: International Business Machines Corporation
    Inventors: Kevin K. Chan, Young-Hee Kim, Masaharu Kobayashi, Jinghong Li, Dae-Gyu Park
  • Patent number: 9711416
    Abstract: A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces. The epitaxial semiconductor material can be different from the single crystalline semiconductor material, and the semiconductor shell can be bilaterally strained due to lattice mismatch. A fin field effect transistor including a strained channel can be formed. Further, the semiconductor shell can advantageously alter properties of the source and drain regions, for example, by allowing incorporation of more dopants or by facilitating a metallization process.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: July 18, 2017
    Assignee: International Business Machines Corporation
    Inventors: Kevin K. Chan, Young-Hee Kim, Masaharu Kobayashi, Jinghong Li, Dae-Gyu Park
  • Patent number: 9679775
    Abstract: An approach to providing a method of forming a dopant junction in a semiconductor device. The approach includes performing a surface modification treatment on an exposed surface of a semiconductor layer and depositing a dopant material on the exposed surface of the semiconductor layer. Furthermore, the approach includes alloying a metal layer with a dopant layer to form a semiconductor device junction where the semiconductor layer is composed of a Group III-V semiconductor material, the surface modification treatment occurs in a vacuum chamber to remove surface oxides from the exposed surface of the semiconductor layer, and each of the above processes occur at a low temperature.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: June 13, 2017
    Assignee: International Business Machines Corporation
    Inventors: Kevin K. Chan, Marinus J. P. Hopstaken, Young-Hee Kim, Masaharu Kobayashi, Effendi Leobandung, Deborah A. Neumayer, Dae-Gyu Park, Uzma Rana, Tsong-Lin Tai
  • Patent number: 9627482
    Abstract: A method for fabricating a semiconductor device may include receiving a gated substrate comprising a substrate with a channel layer and a gate structure formed thereon, over-etching the channel layer to expose an extension region below the gate structure, epitaxially growing a halo layer on the exposed extension region using a first in-situ dopant and epitaxially growing a source or drain on the halo layer using a second in-situ dopant, wherein the first in-situ dopant and the second in-situ dopant are of opposite doping polarity. Using an opposite doping polarity may provide an energy band barrier for the semiconductor device and reduce leakage current. A corresponding apparatus is also disclosed herein.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: April 18, 2017
    Assignee: International Business Machines Corporation
    Inventors: Cheng-Wei Cheng, Pranita Kerber, Young-Hee Kim, Effendi Leobandung, Yanning Sun
  • Publication number: 20170037154
    Abstract: Provided are a branched multi-peptide composition and a vaccine including the same. The branched multi-peptide vaccine according to the present invention is easy to be produced and utilized, thereby being easily applied to the treatment, and is capable of maintaining stable reaction in vivo, such that it is expected that the branched multi-peptide vaccine according to the present invention acts as an effective vaccine. Further, for the tumor antigen peptide, the present invention may select an antigen that is largely expressed in a malignant brain tumor. In addition, from now on, it is expected that tumor antigens having a large expression level may be analyzed depending on tumor characteristics of an individual patient, such that the branched multi-peptide vaccine according to the present invention may be utilized for producing personalized branched peptides and vaccines using the same.
    Type: Application
    Filed: December 31, 2015
    Publication date: February 9, 2017
    Applicant: INDUSTRY FOUNDATION OF CHONNAM NATIONAL UNIVERSITY
    Inventors: Tae-Young Jung, Young-Hee Kim
  • Publication number: 20160329211
    Abstract: An approach to providing a method of forming a dopant junction in a semiconductor device. The approach includes performing a surface modification treatment on an exposed surface of a semiconductor layer and depositing a dopant material on the exposed surface of the semiconductor layer. Furthermore, the approach includes alloying a metal layer with a dopant layer to form a semiconductor device junction where the semiconductor layer is composed of a Group III-V semiconductor material, the surface modification treatment occurs in a vacuum chamber to remove surface oxides from the exposed surface of the semiconductor layer, and each of the above processes occur at a low temperature.
    Type: Application
    Filed: July 15, 2016
    Publication date: November 10, 2016
    Inventors: Kevin K. Chan, Marinus J.P. Hopstaken, Young-Hee Kim, Masaharu Kobayashi, Effendi Leobandung, Deborah A. Neumayer, Dae-Gyu Park, Uzma Rana, Tsong-Lin Tai
  • Patent number: 9489740
    Abstract: Provided are an apparatus and method for tracking a camera that reconstructs a real environment in three dimensions by using reconstruction segments and a volumetric surface. The camera tracking apparatus using reconstruction segments and a volumetric surface includes a reconstruction segment division unit configured to divide three-dimensional space reconstruction segments extracted from an image acquired by a camera, a transformation matrix generation unit configured to generate a transformation matrix for at least one reconstruction segment among the reconstruction segments obtained by the reconstruction segment division unit, and a reconstruction segment connection unit configured to rotate or move the at least one reconstruction segment according to the transformation matrix generated by the reconstruction segment division unit and connect the rotated and moved reconstruction segment with another reconstruction segment.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young Hee Kim, Jin Ho Kim, Ki Hong Kim, Gil Haeng Lee
  • Publication number: 20160322264
    Abstract: A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces. The epitaxial semiconductor material can be different from the single crystalline semiconductor material, and the semiconductor shell can be bilaterally strained due to lattice mismatch. A fin field effect transistor including a strained channel can be formed. Further, the semiconductor shell can advantageously alter properties of the source and drain regions, for example, by allowing incorporation of more dopants or by facilitating a metallization process.
    Type: Application
    Filed: July 11, 2016
    Publication date: November 3, 2016
    Applicant: International Business Machines Corporation
    Inventors: Kevin K. Chan, Young-Hee Kim, Masaharu Kobayashi, Jinghong Li, Dae-Gyu Park
  • Publication number: 20160322500
    Abstract: A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces. The epitaxial semiconductor material can be different from the single crystalline semiconductor material, and the semiconductor shell can be bilaterally strained due to lattice mismatch. A fin field effect transistor including a strained channel can be formed. Further, the semiconductor shell can advantageously alter properties of the source and drain regions, for example, by allowing incorporation of more dopants or by facilitating a metallization process.
    Type: Application
    Filed: July 11, 2016
    Publication date: November 3, 2016
    Applicant: International Business Machines Corporation
    Inventors: Kevin K. Chan, Young-Hee Kim, Masaharu Kobayashi, Jinghong Li, Dae-Gyu Park
  • Patent number: 9447854
    Abstract: A force transfer mechanism includes cylindrical guide housing; a movable body which is slidably arranged in the guide housing so as to move in a linear direction by means of an externally applied force, and which includes a cutout groove having one or more inclined surfaces, and through-holes formed in a direction perpendicular to the linear motion direction in portions corresponding to the inclined surfaces; and a slave unit, one end of which is coupled to the movable body such that said end passes through the through-holes of the movable body and moves along the inclined surfaces of the cutout groove vertically relative to the movement direction of the movable body, and the other end of which is elastically supported.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: September 20, 2016
    Inventor: Young Hee Kim
  • Publication number: 20160254193
    Abstract: A method for fabricating a semiconductor device may include receiving a gated substrate comprising a substrate with a channel layer and a gate structure formed thereon, over-etching the channel layer to expose an extension region below the gate structure, epitaxially growing a halo layer on the exposed extension region using a first in-situ dopant and epitaxially growing a source or drain on the halo layer using a second in-situ dopant, wherein the first in-situ dopant and the second in-situ dopant are of opposite doping polarity. Using an opposite doping polarity may provide an energy band barrier for the semiconductor device and reduce leakage current. A corresponding apparatus is also disclosed herein.
    Type: Application
    Filed: April 7, 2016
    Publication date: September 1, 2016
    Inventors: Cheng-Wei Cheng, Pranita Kerber, Young-Hee Kim, Effendi Leobandung, Yanning Sun
  • Publication number: 20160254150
    Abstract: An approach to providing a method of forming a dopant junction in a semiconductor device. The approach includes performing a surface modification treatment on an exposed surface of a semiconductor layer and depositing a dopant material on the exposed surface of the semiconductor layer. Additionally, the approach includes performing a low temperature anneal in an oxygen free environment followed by depositing a metal layer on the dopant layer. Furthermore, the approach includes alloying the metal layer with the dopant layer to form a semiconductor device junction where the semiconductor layer is composed of a Group III-V semiconductor material, the surface modification treatment occurs in a vacuum chamber to remove surface oxides from the exposed surface of the semiconductor layer, and each of the above processes occur at a low temperature.
    Type: Application
    Filed: February 27, 2015
    Publication date: September 1, 2016
    Inventors: Kevin K. Chan, Marinus J.P. Hopstaken, Young-Hee Kim, Masaharu Kobayashi, Effendi Leobandung, Deborah A. Neumayer, Dae-Gyu Park, Uzma Rana, Tsong-Lin Tai
  • Publication number: 20160254352
    Abstract: A method for fabricating a semiconductor device may include receiving a gated substrate comprising a substrate with a channel layer and a gate structure formed thereon, over-etching the channel layer to expose an extension region below the gate structure, epitaxially growing a halo layer on the exposed extension region using a first in-situ dopant and epitaxially growing a source or drain on the halo layer using a second in-situ dopant, wherein the first in-situ dopant and the second in-situ dopant are of opposite doping polarity. Using an opposite doping polarity may provide an energy band barrier for the semiconductor device and reduce leakage current. A corresponding apparatus is also disclosed herein.
    Type: Application
    Filed: May 4, 2016
    Publication date: September 1, 2016
    Inventors: Cheng-Wei Cheng, Pranita Kerber, Young-Hee Kim, Effendi Leobandung, Yanning Sun
  • Patent number: 9430865
    Abstract: Disclosed herein is a real-time dynamic non-planar projection apparatus and method, which can reduce visual errors, such as distortion of a screen image or deviation from a border area, upon projecting screen images from a projector onto the surface of a non-planar object that is moved in real time. The presented real-time dynamic non-planar projection apparatus includes a preprocessing unit for preprocessing data related to a static part of a screen image to be projected onto a non-planar surface. A real-time projection unit classifies non-planar objects in the screen image to be projected onto the non-planar surface into a rigid body and a non-rigid body using data output from the preprocessing unit, respectively renders the rigid body and the non-rigid body depending on a viewer's current viewpoint, and projects rendered results onto the non-planar surface via projection mapping.
    Type: Grant
    Filed: January 6, 2015
    Date of Patent: August 30, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hang-Kee Kim, Young-Hee Kim, Yong-Sun Kim, Ki-Hong Kim, Hyun-Woo Cho, Jin-Ho Kim
  • Patent number: 9418846
    Abstract: An approach to providing a method of forming a dopant junction in a semiconductor device. The approach includes performing a surface modification treatment on an exposed surface of a semiconductor layer and depositing a dopant material on the exposed surface of the semiconductor layer. Additionally, the approach includes performing a low temperature anneal in an oxygen free environment followed by depositing a metal layer on the dopant layer. Furthermore, the approach includes alloying the metal layer with the dopant layer to form a semiconductor device junction where the semiconductor layer is composed of a Group III-V semiconductor material, the surface modification treatment occurs in a vacuum chamber to remove surface oxides from the exposed surface of the semiconductor layer, and each of the above processes occur at a low temperature.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: August 16, 2016
    Assignee: International Business Machines Corporation
    Inventors: Kevin K. Chan, Marinus J. P. Hopstaken, Young-Hee Kim, Masaharu Kobayashi, Effendi Leobandung, Deborah A. Neumayer, Dae-Gyu Park, Uzma Rana, Tsong-Lin Tai
  • Patent number: 9406382
    Abstract: The present invention proposes a single poly EEPROM cell including a first control gate capacitor, a first tunnel gate capacitor, a first sense transistor, and a first selection transistor. In a single poly EEPROM cell according to the present invention, a Fowler Nordheim (FN) tunneling method is used in order to increase the recognition distance of an RFID tag chip in mode. In a single poly EEPROM device including a single poly EEPROM cell, the single poly EEPROM cell includes a first control gate capacitor MC1, a first tunnel gate capacitor MC2, a first sense transistor MN1, and a first selection transistor MN2, and the first sense transistor MN1 and the first selection transistor MN2 share a P type well PW.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: August 2, 2016
    Assignee: CHANGWON NATIONAL UNIVERSITY ACADEMY COOPERATION CORPS
    Inventor: Young-Hee Kim
  • Patent number: 9397161
    Abstract: A method for fabricating a semiconductor device may include receiving a gated substrate comprising a substrate with a channel layer and a gate structure formed thereon, over-etching the channel layer to expose an extension region below the gate structure, epitaxially growing a halo layer on the exposed extension region using a first in-situ dopant and epitaxially growing a source or drain on the halo layer using a second in-situ dopant, wherein the first in-situ dopant and the second in-situ dopant are of opposite doping polarity. Using an opposite doping polarity may provide an energy band barrier for the semiconductor device and reduce leakage current. A corresponding apparatus is also disclosed herein.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: July 19, 2016
    Assignee: International Business Machines Corporation
    Inventors: Cheng-Wei Cheng, Pranita Kerber, Young-Hee Kim, Effendi Leobandung, Yanning Sun
  • Patent number: 9391171
    Abstract: A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces. The epitaxial semiconductor material can be different from the single crystalline semiconductor material, and the semiconductor shell can be bilaterally strained due to lattice mismatch. A fin field effect transistor including a strained channel can be formed. Further, the semiconductor shell can advantageously alter properties of the source and drain regions, for example, by allowing incorporation of more dopants or by facilitating a metallization process.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: July 12, 2016
    Assignee: International Business Machines Corporation
    Inventors: Kevin K. Chan, Young-Hee Kim, Masaharu Kobayashi, Jinghong Li, Dae-Gyu Park
  • Patent number: 9287136
    Abstract: Field effect transistors fabricated using atomic layer doping processes are disclosed. In accordance with an embodiment of an atomic layer doping method, a semiconducting surface and a dopant gas mixture are prepared. Further, a dopant layer is grown on the semiconducting surface by applying the dopant gas mixture to the semiconducting surface under a pressure that is less than 500 Torr and a temperature that is between 300° C. and 750° C. The dopant layer includes at least 4×1020 active dopant atoms per cm3 that react with atoms on the semiconducting surface such that the reacted atoms increase the conductivity of the semiconducting surface.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: March 15, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Kevin K. Chan, Young-Hee Kim, Isaac Lauer, Ramachandran Muralidhar, Dae-Gyu Park, Xinhui Wang, Min Yang