Abstract: The present disclosure provides a display device that controls output of a scan signal, conversion of image data, and output of a data signal in response to partial scan driving. The display device includes a display panel driven in one of a first mode and a second mode, a scan driver sequentially supplying a scan signal for writing data in the first mode, a controller generating image data in which input image data is rearranged based on the first mode or the second mode, and a data driver converting the image data into data signals and supplying the data signals to output channels.

Abstract: A display device comprises pixels, an emission control driver, a scan driver, and a timing controller for selecting whether the display device is to operate in a first display mode in which the display device is driven at a first frequency or a second display mode in which the display device is driven at a second frequency lower than the first frequency based on input image data. The first display mode comprises first frame periods, and the second display mode comprises second frame periods having at least two sub-frames having a period equal to the first frame period. A total time required to supply the scan signals to the scan lines in one first frame period of the first frame periods and a total time required to supply the scan signals to the scan lines in one second frame period of the second frame periods are substantially same.

Abstract: A scan driver includes: a plurality of first stages configured to sequentially output a plurality of intermediate scan signals based on a scan start signal; a plurality of masking transistors respectively connected to a plurality of output terminals of the plurality of first stages, and configured to selectively transfer the plurality of intermediate scan signals in response to a masking signal, respectively; and a plurality of second stages including a plurality of input terminals respectively connected to the plurality of masking transistors, and configured to selectively output a plurality of scan signals based on the plurality of intermediate scan signals selectively transferred by the plurality of masking transistors.

Abstract: A pixel of a display device includes a capacitor; a light emitting diode; and first, second, third, and fourth transistors. The display device has a normal frequency mode and a low frequency mode. Two electrodes of the capacitor are respectively connected to a first voltage source and a gate node. A gate electrode of the first transistor is connected to the gate node. In a hold period in the low frequency mode, both the second and third transistors receive a scan signal, the third transistor diode-connects the first transistor, the fourth transistor receives an initialization signal and transfers an initialization voltage to the gate node, the scan signal is at a first off voltage level, and the initialization signal is at a second off voltage level unequal to the first off voltage level. The cathode of the light emitting diode is connected to a second voltage source.

Abstract: A display device includes: a pixel part including a plurality of pixels; a first scan driver to provide a first scan signal to each of the pixels; and an initialization controller to control the first scan driver. Each of the pixels includes a pixel circuit including a plurality of transistors, and a light emitting element connected to the pixel circuit, an anode of the light emitting element is to be initialized to a first initialization voltage in response to the first scan signal having a gate-on level, and the initialization controller is to determine whether to provide the first scan signal having the gate-on level to each of the pixels for each frame.

Abstract: A display apparatus includes a display panel displaying an image based on an input image data, a data driver outputting a data voltage to a data line, and a driving controller determining a driving frequency of the display panel based on the input image data. The driving controller includes a flicker value storage configured to store flicker values for grayscale values corresponding to the input image data, a voltage drop determiner configured to adjust a flicker value of the flicker values based on a voltage drop of the display panel, a still image determiner configured to determine whether the input image data is a still image or a video image, and a driving frequency determiner configured to determine the driving frequency of the display panel using the flicker value based on the input image data being the still image.

Abstract: Provided is a display device comprising a pixel unit including first pixel rows connected to first scan lines and second pixel rows alternating with the first pixel rows and connected to second scan lines, a scan driver including first scan stages connected to the first scan lines and second scan stages connected to the second scan lines, and an emission driver including emission stages in which each of emission lines is connected to two or more pixel rows. Accordingly, the display device is capable of changing a display frequency and maintaining the same cycle in which luminance decreases when the display frequency is changed.

Abstract: A display system includes: a host processor which outputs first image data and outputs scan frequency information and a partial scan enable signal, based on an image driving frequency; a display module controlled by the host processor; and an interface. The display module includes: a display driving circuit which controls a selection of pixel rows to which the data signals are supplied based on the scan frequency information and the partial scan enable signal; and a display panel which displays an image on selected pixel rows based on the data signals. In a video mode of the interface, the host processor divides and outputs the first image data through the interface during transmission periods, based on the image driving frequency, and suspends an output of the first image data through the interface during suspend periods.

Abstract: A display device includes a display panel including a plurality of pixels each coupled to a write scan line, a compensation scan line, an initialization scan line, a bypass scan line, and a data line; and a scan driver configured to supply i (where i is a natural number) write scan pulses, compensation scan pulses, initialization scan pulses, and bypass scan pulses to the write scan line, the compensation scan line, the initialization scan line, and the bypass scan line, respectively, during a first period corresponding to one frame period, and to supply j (where j is a natural number other than i) write scan pulses to the write scan line during each of frame periods of a second period including a plurality of consecutive frame periods.

Abstract: A display device includes: a pixel configured to display an image based on image data and a reference voltage; a controller configured to generate reference voltage data corresponding to the reference voltage for restraining leakage current in the pixel based on a frame frequency; and a power supply configured to generate the reference voltage based on the reference voltage data and supply the reference voltage to the pixel.

Abstract: Provided is a display device including a pixel unit in which each of pixel rows extends in a first direction, odd numbered pixel rows and even numbered pixel rows are alternately disposed in a second direction, and pixels included in the pixel rows are designated as dots having two or more units, a gray difference calculator that calculates difference between representative grays of dots adjacent in the second direction among dots of a p-th pair of the pixel rows, an edge detector that increases an edge dot number when a first condition in which the difference between the representative grays is larger than a first threshold value is satisfied, and a first pattern detector that increases an edge number when the edge dot number is larger than a second threshold value, and that generates a first pattern detection signal when the edge number is larger than a third threshold value.

Abstract: A scan driver stage including: a first transistor including a gate connected to a first clock, a first electrode connected to a carry terminal, and a second electrode connected to a first node; a second transistor including a gate connected to a second clock, a first electrode connected to a carry terminal, and a second electrode connected to the first node; a third transistor including a gate connected to the first node and a first electrode connected to a second node; a fourth transistor including a gate connected to the second clock, a first electrode connected to power, and a second electrode connected to the second node; a fifth transistor including a gate connected to the first clock, a first electrode connected to power, and a second electrode connected to the second node; and an output outputting first and second scan signals based on first and second node voltages.

Abstract: A pixel of an organic light emitting diode display device includes a capacitor, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor and an organic light emitting diode. The third transistor includes first and second sub-transistors which are coupled to each other in series between a drain of the first transistor and a gate node, and a fourth transistor includes third and fourth sub-transistors which are coupled to each other in series between a line of an initialization voltage and the gate node. The eighth transistor applies a reference voltage to a first node between the first and second sub-transistors in response to an emission signal, and a ninth transistor applies the reference voltage to a second node between the third and fourth sub-transistors in response to the emission signal.

Abstract: A display device according to an embodiment of the disclosure includes a timing controller, a scan driver including a plurality of stages connected to a plurality of clock signal lines and generating a plurality of scan signals in response to the scan start signal, a data driver configured to generate a plurality of data signals based on the image data, and a pixel portion including a plurality of pixels. One stage in the scan driver transmits a carry signal to 2n-th next stage. The timing controller selects any one of a normal frequency and low frequencies lower than the normal frequency as a driving frequency based on the input image data, and adjusts a clock duty of the plurality of clock signals so that a time required to output all of the plurality of scan signals during one frame is constant irrespective of the driving frequency.

Abstract: A pixel circuit includes a main-circuit that controls an organic light-emitting element by controlling a driving current to flow into the organic light-emitting element and a sub-circuit including a first compensation transistor including a gate terminal which receives a first gate signal, a second compensation transistor including a gate terminal which receives a second gate signal, and an initialization transistor including a gate terminal which receives an initialization signal. Here, in a low-frequency driving mode, a driving frequency of the first gate signal is N hertz (Hz), a driving frequency of the initialization signal is N Hz, a driving frequency of the second gate signal is M Hz, the first compensation transistor and the initialization transistor are turned on during a first time duration in N non-light-emitting periods per second, and the second compensation transistor is turned on during a second time duration in M non-light-emitting periods per second.

Abstract: A display device according to an embodiment of the disclosure includes a timing controller, a scan driver including a plurality of stages connected to a plurality of clock signal lines and generating a plurality of scan signals in response to the scan start signal, a data driver configured to generate a plurality of data signals based on the image data, and a pixel portion including a plurality of pixels. One stage in the scan driver transmits a carry signal to 2n-th next stage. The timing controller selects any one of a normal frequency and low frequencies lower than the normal frequency as a driving frequency based on the input image data, and adjusts a clock duty of the plurality of clock signals so that a time required to output all of the plurality of scan signals during one frame is constant irrespective of the driving frequency.

Abstract: A scan driver stage including: a first transistor including a gate connected to a first clock, a first electrode connected to a carry terminal, and a second electrode connected to a first node; a second transistor including a gate connected to a second clock, a first electrode connected to a carry terminal, and a second electrode connected to the first node; a third transistor including a gate connected to the first node and a first electrode connected to a second node; a fourth transistor including a gate connected to the second clock, a first electrode connected to power, and a second electrode connected to the second node; a fifth transistor including a gate connected to the first clock, a first electrode connected to power, and a second electrode connected to the second node; and an output outputting first and second scan signals based on first and second node voltages.

Abstract: A display apparatus includes a display panel, a first gate driver, a second gate driver, a third gate driver, and a data driver. The display apparatus is operable in a low frequency driving mode, and the low frequency driving mode includes a writing frame and a holding frame. At least one of gate power voltages used to generate a first gate signal, a second gate signal, and an emission signal has a first voltage level in the writing frame of the low frequency driving mode and a second voltage level in the holding frame of the low frequency driving mode. The data voltage is applied to the pixel in the writing frame of the low frequency driving mode. The data voltage applied to the pixel in the writing frame of the low frequency driving mode is maintained in the holding frame of the low frequency driving mode.

Abstract: A display device includes: a display panel configured to display an image; a signal controller configured to determine whether an input image signal is a still image signal, and determine color coordinates using data values of one frame data of the input image signal, and generate compensated image data by compensating image data of the one frame data based on the color coordinates; and a data driver configured to generate a data signal based on the compensated image data and output the compensated image data to the display panel through a data line.

Abstract: A display device includes first dots connected to first scan lines, second dots connected to second scan lines and alternately disposed with the first dots in a first direction and a second direction different from the first direction, a scan driver including first stages respectively connected to the first scan lines and second stages respectively connected to the second scan lines, and a data driver connected to the first dots and the second dots through data lines. The first stages are connected to first clock lines, the second stages are connected to second clock lines, first stages except a first start stage are respectively connected to corresponding first scan lines of corresponding previous first stages, and second stages except a second start stage are respectively connected to corresponding second scan lines of corresponding previous second stages.