Abstract: The invention provides a method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) non-volatile memory cell, comprising: (S1) forming a pad oxide pattern on a silicon substrate having a recess exposing a tunnel region of the silicon substrate; (S2) forming a bottom oxide layer, a nitride layer, a top oxide layer covering the recess and the pad oxide pattern to form a first ONO structure; (S3) forming a photoresist on the first ONO structure covering the recess and a peripheral region of the pad oxide pattern; (S4) removing a part of the first ONO structure exposed by the photoresist to form an U-shaped ONO structure; (S5) trimming the photoresist to exposed a part of the U-shaped ONO structure above the recess; (S6) removing the part of the U-shaped ONO structure; (S7) removing the photoresist; (S8) removing the pad oxide pattern and the top oxide layer; and (S9) forming a gate structure.

Abstract: A free-space optical transceiver includes a repositionable mirror for receiving and sending light beams with another transceiver. To properly align the light beams, the position of the mirror is determined in using a position sensor. The position sensor is mounted within a base substructure that is coupled to a steerable mirror substructure containing the mirror. The position sensor reflects sensor light off of the mirror to determine the position of the mirror along two different axes. The position sensor includes an optical element for shaping the sensor light. The components of the position sensor are mounted to the base substructure such that alignment of the position sensor is not required. Further, by coupling the position sensor to the base substructure and not the steerable mirror substructure, the moment of inertia and center of gravity of the steerable mirror substructure is improved, thereby improving the steering responsiveness of the mirror.

Abstract: An electronic device is provided. The electronic device includes a housing; a camera module disposed in the housing and having a lens outstanding from a surface of the housing; and a protection unit connected to the housing, wherein when the camera module is in an off-state, a top surface of the protection unit is higher than a surface of the lens, when the camera module is in an on-state, the top surface of the protection unit is lower than the surface of the lens.

Abstract: A method for fabricating a semiconductor device includes forming a patterned multi-layered dielectric film on a substrate; forming a patterned stack on the patterned multi-layered dielectric film so that an edge of the patterned multi-layered dielectric film is exposed from the patterned stack; forming a cover layer to cover a part of the substrate and expose the patterned stack and the exposed edge of the patterned multi-layered dielectric film; removing at least a part of the exposed edge of the patterned multi-layered dielectric film by using the cover layer and the patterned stack as an etching mask; and performing an ion implantation process by using the cover layer as an etching mask so as to form a doped region.

Abstract: A method for fabricating semiconductor device is disclosed. Preferably, two hard masks are utilized to define the width of the first gate (may serve for a control gate) and the width of the second gate (may serve for a select gate). The widths are thus well controlled. For example, in an embodiment, the width of the select gate may be adjusted in advance as desired, and the select gate is protected by the second hard mask during an etch process, so as to obtain a select gate which upper portion has an appropriate width. Accordingly the semiconductor device would still have an excellent performance upon miniaturization.

Abstract: A method for fabricating semiconductor device is disclosed. Preferably, two hard masks are utilized to define the width of the first gate (may serve for a control gate) and the width of the second gate (may serve for a select gate). The widths are thus well controlled. For example, in an embodiment, the width of the select gate may be adjusted in advance as desired, and the select gate is protected by the second hard mask during an etch process, so as to obtain a select gate which upper portion has an appropriate width. Accordingly the semiconductor device would still have an excellent performance upon miniaturization.

Abstract: A liquid glass application is provided, which uses liquid glass to prepare a substrate having conductive posts, a substrate embedded with a circuit and a glass membrane. The liquid glass possesses a large number of usage convenience features. Therefore, a preparation cost can be greatly reduced. Besides, a traditional glass configuration limit is broken and a glass thickness can be reduced remarkably, thereby meeting nowadays requirements of lightness, thinness, shortness and smallness on electronic products.

Abstract: A semiconductor device including a first gate structure and a second gate structure immediately adjacent to each other with a spacer therebetween. Line width of the top of the second gate structure is not less than that of the bottom thereof. A fabrication method thereof is also disclosed. A transient first gate structure and a temporary gate structure are formed by etching through a first hard mask. A second gate structure is formed between a first spacer and a second spacer opposite to each other and disposed respectively on the transient first gate structure and temporary gate structure. The second gate structure is covered with a second hard mask. An etch process is performed through a patterned photoresist layer to remove exposed first hard mask and temporary gate structure and to partially remove exposed portion of first hard mask and transient first gate structure to form the first gate structure.

Abstract: A method for manufacturing a silicon-oxide-nitride-oxide-silicon non-volatile memory cell includes following steps. An implant region is formed in a substrate. A first oxide layer, a nitride layer, and a second oxide layer are formed and stacked on the substrate. A density of the second oxide layer is higher than a density of the first oxide layer. A first photoresist pattern is formed on the second oxide layer and corresponding to the implant region. A first wet etching process is then performed to form an oxide hard mask. A second wet etching process is performed to remove the nitride layer exposed by the oxide hard mask to form a nitride pattern. A cleaning process is then performed to remove the oxide hard mask and the first oxide layer exposed by the nitride pattern, and a gate oxide layer is then formed on the nitride pattern.

Abstract: A method for fabricating a semiconductor device includes forming a patterned multi-layered dielectric film on a substrate; forming a patterned stack on the patterned multi-layered dielectric film so that an edge of the patterned multi-layered dielectric film is exposed from the patterned stack; forming a cover layer to cover a part of the substrate and expose the patterned stack and the exposed edge of the patterned multi-layered dielectric film; removing at least a part of the exposed edge of the patterned multi-layered dielectric film by using the cover layer and the patterned stack as an etching mask; and performing an ion implantation process by using the cover layer as an etching mask so as to form a doped region.

Abstract: The present invention relates to a continuous reactor a method for manufacturing nanoparticles. The reactor of the present invention includes: a plurality of first inputs for individually inputting a plurality of reagents; a first mixing part connected to the first inputs to mix the reagents; N number of first reaction units, each comprising a plurality of first diverging channels and a first converging channel to form a channel having the first diverging channels and the first converging channels alternately connected to one another in series for N times of diverging-converging actions, wherein N?1, and the first diverging channels of a 1st one of the first reaction units are connected to the first mixing part; and a first output connected to the first converging channel of an Nth one of the first reaction units, so as to output a product of nanoparticles.

Abstract: A semiconductor device including a first gate structure and a second gate structure immediately adjacent to each other with a spacer therebetween. Line width of the top of the second gate structure is not less than that of the bottom thereof. A fabrication method thereof is also disclosed. A transient first gate structure and a temporary gate structure are formed by etching through a first hard mask. A second gate structure is formed between a first spacer and a second spacer opposite to each other and disposed respectively on the transient first gate structure and temporary gate structure. The second gate structure is covered with a second hard mask. An etch process is performed through a patterned photoresist layer to remove exposed first hard mask and temporary gate structure and to partially remove exposed portion of first hard mask and transient first gate structure to form the first gate structure.

Abstract: The present invention relates to a continuous reactor a method for manufacturing nanoparticles. The reactor of the present invention includes: a plurality of first inputs for individually inputting a plurality of reagents; a first mixing part connected to the first inputs to mix the reagents; N number of first reaction units, each comprising a plurality of first diverging channels and a first converging channel to form a channel having the first diverging channels and the first converging channels alternately connected to one another in series for N times of diverging-converging actions, wherein N?1, and the first diverging channels of a 1st one of the first reaction units are connected to the first mixing part; and a first output connected to the first converging channel of an Nth one of the first reaction units, so as to output a product of nanoparticles.

Abstract: A high-voltage selecting circuit generates an output voltage with no voltage drop by means of an auxiliary NMOS transistor turning on the corresponding selecting PMOS transistor of the high-voltage selecting circuit when the voltage levels of a first input voltage and a second input voltage are equal. In addition, when one of the first input voltage and the second input voltage is higher than the other one, the high-voltage selecting circuit avoids the leakage current by means of an auxiliary PMOS transistor turning off the corresponding selecting PMOS transistor of the high-voltage selecting circuit. In this way, the high-voltage selecting circuit can correctly generate the output voltage according to the first input voltage and the second input voltage, and avoid the leakage current at the same time.

Abstract: A cutter device for a crushing machine includes a rotary cutter base body and plural cutters. The rotary cutter base body is formed integral and has an outer peripheral side axially and equidistantly formed with plural annular ribs respectively provided with plural flat cut surfaces. Each flat cut surface is formed integral with a protruding fixing base with a fixing hole for locking each cutter on the fixing base. Each cutter body is formed with a cutting side disposed with at least four arcuate cutting edges extending toward the center to form a bulging portion, with the cross section of the cutter side formed with a double-curved surface for thickening the cutter to prolong its service life. The fixing bases are formed integrally with the rotary cutter base body to increase their strength.

Abstract: A high-voltage selecting circuit generates an output voltage with no voltage drop by means of an auxiliary NMOS transistor turning on the corresponding selecting PMOS transistor of the high-voltage selecting circuit when the voltage levels of a first input voltage and a second input voltage are equal. In addition, when one of the first input voltage and the second input voltage is higher than the other one, the high-voltage selecting circuit avoids the leakage current by means of an auxiliary PMOS transistor turning off the corresponding selecting PMOS transistor of the high-voltage selecting circuit. In this way, the high-voltage selecting circuit can correctly generate the output voltage according to the first input voltage and the second input voltage, and avoid the leakage current at the same time.

Abstract: A cutter device for a crushing machine includes a rotary cutter base body and plural cutters. The rotary cutter base body is formed integral and has an outer peripheral side axially and equidistantly formed with plural annular ribs respectively provided with plural flat cut surfaces. Each flat cut surface is formed integral with a protruding fixing base with a fixing hole for locking each cutter on the fixing base. Each cutter body is formed with a cutting side disposed with at least four arcuate cutting edges extending toward the center to form a bulging portion, with the cross section of the cutter side formed with a double-curved surface for thickening the cutter to prolong its service life. The fixing bases are formed integrally with the rotary cutter base body to increase their strength.

Abstract: A cutter device for a crushing machine includes a main body and plural cutter bodies. The main body is composed of plural rollers arranged continuously together. Each roller has its diametrical circumference formed with at least one flat cut surface formed integral with a cutter base with a fixing hole. Each roller has its diametrical circumferential side provided with a rib, and each cutter body has its cutting side disposed with four curved blade edges extending toward the center to form a projection, letting the cross section of the cutter body formed with a double-curved surface and thus thickening the cutter body and prolonging its service life. The cutter body can be secured on the cutter base by a fastener, convenient in disassembling and replacing the cutter bodies with new ones.

Abstract: A capacitive deionization (CDI) system for deionizing water is disclosed. The CDI system comprises at least a flow through capacitor (FTC) module, at least a first supercapacitor, at least a second supercapacitor, at least a third supercapacitor and a controller. The FTC module comprises a plurality electrodes for removing ions from water flowing between the electrodes under an electric field applied between the electrodes. The first supercapacitor is connected between the potential source and the FTC module for amplifying energy provided by the potential source. The second supercapacitor is connected to the FTC module for receiving energy from the FTC module for regenerating the electrodes of the FTC module. The third supercapacitor is adapted for exchanging energy with the FTC module for regenerating the electrodes of the FTC module. The controller is adapted for regulating deionization rate of the water and regeneration of the electrodes of the FTC module.

Abstract: A scanning apparatus used in a barcode device includes an anchor frame, a twist means located in the anchor frame and a driving means located on two sides of the twist means. The twist means includes a formed member made from a material of high elasticity coefficient such as silicon rubber or rubber. When the driving means is magnetized and generates a magnetic force to produce a corresponding force against a magnetic element, the formed member is twisted. When the magnetic force is absent, the formed member will turn in an opposite direction because of counter reaction force and the inertia thereof, and thereby concentrically turn a reflection element located thereon for projecting light to the barcode of an object to be scanned.