Patents by Inventor Yu-Chun Huang

Yu-Chun Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140360899
    Abstract: A shoebox includes a box body and a lid. The box body has a box bottom and four box laterals. Each of the box laterals and the box bottom include a first angle that is between 91.5° and 102°. The lid has a lid bottom and four lid laterals. The lid bottom is larger than the box bottom. Each of the lid laterals and the lid bottom include a second angle that is greater than the first angle. The lid has the lid bottom covering the opening so as to close the accommodating space. When the shoeboxes are stacked up, the box body of one shoebox is placed into the opening of another shoebox and partially received in the accommodating space. This allows the shoeboxes to be staked in a more compact form, thereby saving space for storage and transportation.
    Type: Application
    Filed: May 31, 2014
    Publication date: December 11, 2014
    Inventor: YU-CHUN HUANG
  • Patent number: 8815703
    Abstract: A fabricating method of a shallow trench isolation structure includes the following steps. Firstly, a substrate is provided, wherein a high voltage device area is defined in the substrate. Then, a first etching process is performed to partially remove the substrate, thereby forming a preliminary shallow trench in the high voltage device area. Then, a second etching process is performed to further remove the substrate corresponding to the preliminary shallow trench, thereby forming a first shallow trench in the high voltage device area. Afterwards, a dielectric material is filled in the first shallow trench, thereby forming a first shallow trench isolation structure.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: August 26, 2014
    Assignee: United Microelectronics Corporation
    Inventors: Liang-An Huang, Yu-Chun Huang, Chin-Fu Lin, Yu-Ciao Lin, Yu-Chieh Lin, Hsin-Liang Liu, Chun-Hung Cheng, Yuan-Cheng Yang, Yau-Kae Sheu
  • Publication number: 20140191992
    Abstract: A touch input method, system, and readable recording medium of an electronic device. The electronic device has a touch screen. The touch input system contains a processing unit, a database group, a touch-area calculating module, a plurality of touch-area variation analysis modules, and a control module. The method contains steps of: calculating, when a first character graphic key displayed on the touch screen is touched, touch-area data so that a first character corresponding to the first character graphic key is inputted into the electronic device; and acquiring, when the touch-area data is varied, a shift amount and a shift direction of the touch-area data, wherein a second character corresponding to a second character graphic key which is located beside the first character graphic key is inputted into the electronic device when the shift amount reaches a threshold value.
    Type: Application
    Filed: December 20, 2013
    Publication date: July 10, 2014
    Applicant: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: FONG-GONG WU, YU-CHUN HUANG
  • Publication number: 20140073109
    Abstract: A fabricating method of a shallow trench isolation structure includes the following steps. Firstly, a substrate is provided, wherein a high voltage device area is defined in the substrate. Then, a first etching process is performed to partially remove the substrate, thereby forming a preliminary shallow trench in the high voltage device area. Then, a second etching process is performed to further remove the substrate corresponding to the preliminary shallow trench, thereby forming a first shallow trench in the high voltage device area. Afterwards, a dielectric material is filled in the first shallow trench, thereby forming a first shallow trench isolation structure.
    Type: Application
    Filed: November 5, 2013
    Publication date: March 13, 2014
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Liang-An Huang, Yu-Chun Huang, Chin-Fu Lin, Yu-Ciao Lin, Yu-Chieh Lin, Hsin-Liang Liu, Chun-Hung Cheng, Yuan-Cheng Yang, Yau-Kae Sheu
  • Publication number: 20130242212
    Abstract: A mirror switchable organic light emitting display includes an organic light emitting display panel, a switchable quarter-wave phase retardation panel, a light transflective layer, and a polarizing plate. The organic light emitting display panel has a light output surface. The switchable quarter-wave phase retardation panel having a first surface and a second surface, is disposed at the light output surface of the organic light emitting display panel, wherein the first surface faces the organic light emitting display panel. The light transflective layer is disposed at the first surface of the quarter-wave phase retardation panel and faces the organic light emitting display panel. The polarizing plate is disposed on the second surface of the quarter-wave phase retardation panel.
    Type: Application
    Filed: May 24, 2012
    Publication date: September 19, 2013
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Yu-Chun Huang, Chia-Chun Chang
  • Publication number: 20130208499
    Abstract: An illuminated keyboard providing high and uniform luminosity includes a keyboard portion and at least one light guide element. The keyboard portion includes a plurality of key units and a substrate to hold the key units. The key units are arranged in parallel rows each having multiple key units to form a key unit assembly. The key unit assembly is spaced from the substrate to form a vertical projection space, and any two neighboring key unit assemblies form a horizontal mounting space. The light guide element includes a light guide portion located in the horizontal mounting space and two light projecting portions located in the vertical projection space. Each light projecting portion has at least one transparent zone to project light transmitted by the light guide portion into the vertical projection space to provide uniform luminosity for the key unit assembly.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 15, 2013
    Inventors: Chin-Wen CHOU, Chin-Hsiu Hwa, Yu-Chun Huang
  • Publication number: 20130163204
    Abstract: A display device includes a rear bezel, a display panel and at least two heat dissipation sheets. The display panel is disposed on the rear bezel. The display panel includes at least one power line having an extension direction. The heat dissipation sheets are disposed between the rear bezel and the display panel. The heat dissipation sheets have at least one seam formed therebetween. The at least one seam is substantially parallel to the extension direction of the at least one power line.
    Type: Application
    Filed: July 5, 2012
    Publication date: June 27, 2013
    Applicant: AU OPTRONICS CORP.
    Inventors: Yu-Chun Huang, Chia-Chun Chang, Hong-Shen Lin
  • Publication number: 20130043513
    Abstract: A fabricating method of a shallow trench isolation structure includes the following steps. Firstly, a substrate is provided, wherein a high voltage device area is defined in the substrate. Then, a first etching process is performed to partially remove the substrate, thereby forming a preliminary shallow trench in the high voltage device area. Then, a second etching process is performed to further remove the substrate corresponding to the preliminary shallow trench, thereby forming a first shallow trench in the high voltage device area. Afterwards, a dielectric material is filled in the first shallow trench, thereby forming a first shallow trench isolation structure.
    Type: Application
    Filed: August 19, 2011
    Publication date: February 21, 2013
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Liang-An HUANG, Yu-Chun Huang, Chin-Fu Lin, Yu-Ciao Lin, Yu-Chieh Lin, Hsin-Liang Liu, Chun-Hung Cheng, Yuan-Cheng Yang, Yau-Kae Sheu
  • Publication number: 20100320659
    Abstract: A plate spring includes an internal surrounding portion, an external surrounding portion, and a plurality of suspending arms. The external surrounding portion surrounds the internal surrounding portion and is spaced apart from the internal surrounding portion. The suspending arms interconnect the internal surrounding portion and the external surrounding portion. Each of the suspending arms includes a first connecting segment, a second connecting segment, and a working segment. The first connecting segment is connected to the external surrounding portion and extends inwardly. The second connecting segment is connected to the internal surrounding portion and extends outwardly. The working segment interconnects the first and second connecting segments and is formed with a plurality of hole portions which are spaced apart from each other.
    Type: Application
    Filed: June 14, 2010
    Publication date: December 23, 2010
    Inventors: Ying-Jui Chen, Yu-Chun Huang
  • Publication number: 20090146044
    Abstract: The present invention discloses an optical displacement detection apparatus and an optical displacement detection method. The optical displacement detection apparatus comprises: at least two light sources for projecting light of different spectrums to a surface under detection, respectively; an image capturing unit for receiving light reflected from the surface under detection and converting it into electronic signals; and a processor and control circuit for calculating displacement according to the electronic signals from the image capturing unit, wherein the processor and control circuit is capable of switching between the light sources.
    Type: Application
    Filed: December 5, 2007
    Publication date: June 11, 2009
    Inventors: Hui-Hsuan Chen, Hsin-Chia Chen, Han-Chi Liu, Yu-Chun Huang, Ching-Lin Chung
  • Patent number: 7446684
    Abstract: A readout circuit is adapted for receiving a line analog image signal from an image sensor array of an image sensor. The readout circuit includes an amplifying unit, an m-bit analog-to-digital converter, and an m-to-n bit digital converting unit. The amplifying unit is adapted for amplifying and correcting amplitude of the line analog image signal, and outputs an amplified and corrected analog signal. The m-bit analog-to-digital converter is coupled to the amplifying unit, and is operable to convert the amplified and corrected analog signal into a corresponding m-bit digital signal. The m-to-n bit digital converting unit is coupled to the m-bit analog-to-digital converter, receives the m-bit digital signal from the m-bit analog-to-digital converter, and is responsive to a k-bit control signal for converting the m-bit digital signal into an n-bit digital signal, wherein m is greater than or equal to n.
    Type: Grant
    Filed: July 5, 2006
    Date of Patent: November 4, 2008
    Assignee: Pixart Imaging, Inc.
    Inventor: Yu-Chun Huang
  • Patent number: 7444708
    Abstract: A shoe tree for one shoe includes a main body having a front end formed with a vamp support portion and a rear end formed with an upwardly extending rising portion and having a first side formed with a first side support portion and a second side formed with a second side support portion. Thus, the first side support portion has a shape matching that of the outer side of the shoe, and the second side support portion has a shape matching that of the inner side of the shoe so that the inner space of the shoe is supported by the main body of the shoe tree rigidly and stably, thereby preventing the shoe from being deformed due to its gravity.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: November 4, 2008
    Inventor: Yu-Chun Huang
  • Patent number: 7247252
    Abstract: A method for avoiding plasma arcing during a reactive ion etching (RIE) process including providing a semiconductor wafer having a process surface for depositing a dielectric insulating layer; depositing at least a portion of a dielectric insulating layer to form a deposition layer according to plasma assisted chemical vapor deposition (CVD) process; treating the deposition layer portion with a hydrogen plasma treatment to reduce an electrical charge nonuniformity of the deposition layer including applying a biasing power to the semiconductor wafer; and, carrying out a subsequent reactive ion etching process.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: July 24, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shing-Chyang Pan, Yu-Chun Huang, Shwangming Jing
  • Publication number: 20070137140
    Abstract: An electronic device (10) includes a case (20), a circuit board (30) received in the case, a front panel (40) including a first groove (42), a gasket (50) including a hook (54), and a pair of fixing posts (60) for securing the gasket on the front panel. The front panel is mounted to the circuit board. The hook is received in the first groove. Each fixing post is received in respective ends of the first groove.
    Type: Application
    Filed: June 12, 2006
    Publication date: June 21, 2007
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: YU-CHUN HUANG, MING-CHIEN CHIU
  • Publication number: 20070013565
    Abstract: A readout circuit is adapted for receiving a line analog image signal from an image sensor array of an image sensor. The readout circuit includes an amplifying unit, an m-bit analog-to-digital converter, and an m-to-n bit digital converting unit. The amplifying unit is adapted for amplifying and correcting amplitude of the line analog image signal, and outputs an amplified and corrected analog signal. The m-bit analog-to-digital converter is coupled to the amplifying unit, and is operable to convert the amplified and corrected analog signal into a corresponding m-bit digital signal. The m-to-n bit digital converting unit is coupled to the m-bit analog-to-digital converter, receives the m-bit digital signal from the m-bit analog-to-digital converter, and is responsive to a k-bit control signal for converting the m-bit digital signal into an n-bit digital signal, wherein m is greater than or equal to n.
    Type: Application
    Filed: July 5, 2006
    Publication date: January 18, 2007
    Inventor: Yu-Chun Huang
  • Publication number: 20060207039
    Abstract: A shoe tree for one shoe includes a main body having a front end formed with a vamp support portion and a rear end formed with an upwardly extending rising portion and having a first side formed with a first side support portion and a second side formed with a second side support portion. Thus, the first side support portion has a shape matching that of the outer side of the shoe, and the second side support portion has a shape matching that of the inner side of the shoe so that the inner space of the shoe is supported by the main body of the shoe tree rigidly and stably, thereby preventing the shoe from being deformed due to its gravity.
    Type: Application
    Filed: December 13, 2005
    Publication date: September 21, 2006
    Inventor: Yu-Chun Huang
  • Publication number: 20040082159
    Abstract: A fabrication method for solder bump pattern of rear section wafer package is disclosed and the method includes the steps of: (a) pattern-etching the wafer at a passivation layer for the positioning of the solder bump; (b) depositing the entire under bump metal layer,
    Type: Application
    Filed: March 10, 2003
    Publication date: April 29, 2004
    Inventors: Wen-Lo Shieh, Fu-Yu Huang, Ning Huang, Hui-Pin Chen, Shu-Wan Lu, Zhe-Sung Wu, Chih-Yu Tsai, Mei-Hua Chen, Chia-Ling Lu, Yu-Ju Wang, Yu-Chun Huang, Tzu-Lin Liu, Wen-Tsung Weng, Ya-Hsin Tseng
  • Publication number: 20040082174
    Abstract: A method of wire bonding of a semiconductor device for resolving oxidation of copper bonding pad is disclosed. The method comprises the steps of exposing the copper bonding pad of a wafer which has been completed with semiconductor circuit fabrication; covering the copper bonding pad of the wafer with a protective anti-oxidization film which will be vaporized when heated; performing wire bonding directly without requiring the removal of the protective film, employing ultrasonic vibration energy, pressurizing deformation energy and heat energy in the course of bonding to vaporize the protective film so that the metal wire and the copper pad form a large area intermetallic compound layer for bonding.
    Type: Application
    Filed: October 21, 2003
    Publication date: April 29, 2004
    Inventors: Wen-Lo Shieh, Fu-Yu Huang, Ning Huang, Hui-Pin Chen, Shu-Wan Lu, Zhe-Sung Wu, Chih-Yu Tsai, Mei-Hua Chen, Chia-Ling Lu, Yu-Ju Wang, Yu-Chun Huang, Tzu-Lin Liu, Wen-Tsung Weng, Ya-Hsin Tseng
  • Publication number: 20030235994
    Abstract: A method for avoiding plasma arcing during a reactive ion etching (RIE) process including providing a semiconductor wafer having a process surface for depositing a dielectric insulating layer; depositing at least a portion of a dielectric insulating layer to form a deposition layer according to plasma assisted chemical vapor deposition (CVD) process; treating the deposition layer portion with a hydrogen plasma treatment to reduce an electrical charge nonuniformity of the deposition layer including applying a biasing power to the semiconductor wafer; and, carrying out a subsequent reactive ion etching process.
    Type: Application
    Filed: June 20, 2002
    Publication date: December 25, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shing-Chyang Pan, Yu-Chun Huang, Shwangming Jing
  • Patent number: D720719
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: January 6, 2015
    Assignee: New Nobel Limited
    Inventor: Yu-Chun Huang