Abstract: A method for selectively anisotropically a semiconductor feature to form a tapered sidewall profile including providing a semiconductor wafer including an anisotropically etched feature formed in at least one dielectric insulating layer including a relatively larger width dimension portion overlying and encompassing at least one relatively smaller diameter dimension portion the smaller diameter dimension portion further including a bottom portion including an overlying liner; and, selectively anisotropically etching the anisotropically etched feature according to a reactive ion etching (RIE) process to form a tapered sidewall portion of the at least one relatively smaller diameter portion.

Abstract: A method for plasma treating an anisotropically etched semiconductor feature with improved removal of residual polymeric material including providing a semiconductor wafer having an anisotropically etched feature opening further including an edge portion defining a diameter of the anisotropically etched feature opening the anisotropically etched feature opening further comprising polymeric material disposed within the anisotropically etched feature opening; plasma treating the at least one opening with an oxygen containing plasma to substantially remove the polymeric material including removing a portion of the edge portion.

Abstract: A method of metal-electro-plating for IC package substrate comprising the steps of: forming vias on the package substrate coated with copper film on both sides thereof; electro-plating the vias to form electrical conductive holes between the top layer and the bottom layer of the package substrate; coating a resisting agent where the patterns should be formed on the top layer and on the entire bottom layer of the package substrate; etching the pattern to form circuit without plating lines on the top layer of the substrate, and removing the resisting agent; coating with a resisting agent on the top side and the bottom side of the package substrate but the wiring position to be electro-plated as surface finish for wire-bonding electro-plating on the top side of the package substrate not being applied with the resisting agent; electro-plating the substrate with nickel and gold, and removing the resisting agent; fabricating the circuit on the bottom side of the package substrate and coating with a resisting agent

Abstract: A plasma etch method for etching a silicon oxide containing material layer with respect to a silicon nitride etch stop layer employs an etchant gas composition comprising octafluorocyclobutane and oxygen, without a carbon and oxygen containing gas. An endpoint within the plasma etch method is determined by monitoring the concentration of the carbon and oxygen containing gas. The plasma etch methods provides for enhanced endpoint detection.