Abstract: A method of sowing plant seeds and the sowing materials used thereof are disclosed. The sowing method comprises the steps of a) providing a base with water-absorbing ability and humidity-maintaining ability, wherein the base includes a plurality of concavities, b) inlaying the plant seeds in the plural concavities of the base, and c) covering a cultivating material with the base, wherein each concavity has a void therein for allowing a radicle of a corresponding plant seed to pierce therethrough and be rooted in the cultivating material while the corresponding plant seed is germinating. The base comprises light-blocking material for preventing weeds from growing and is selected from a group consisting of a mulching paper, a fabric, a fiber and a polymer. Therefore, the steps of sowing, soil-covering and weed-removal for agricultural production can be proceeded simultaneously and thus lower cost.

Abstract: A method of fabricating a semiconductor device includes providing a wafer substrate, forming a first oxide layer over the wafer substrate using a single wafer low pressure chemical vapor deposition oxidation process, forming a second oxide layer over the first oxide layer by a single wafer oxidation process, forming a nitride layer over the second oxide layer using a low temperature and pressure deposition process, and growing a top oxide layer over the nitride layer.

Abstract: A method of fabricating a flash memory. A tunneling dielectric layer and a conductive layer are formed on a substrate. The conductive layer is patterned to form a floating gate. A source/drain region is formed in the substrate between the floating gates. A gate dielectric layer is formed. The gate dielectric layer includes an oxide layer formed on the floating gate by in-situ steam generation (ISSG). A control gate is formed on the gate dielectric layer.

Abstract: A method of fabricating a semiconductor device is disclosed. A wafer substrate is provided. A first silicon oxide layer is formed over the wafer substrate. A nitride layer is formed over the first silicon oxide layer using a low temperature deposition process. A second silicon oxide layer is formed over the nitride layer. The low temperature process can form a nitride layer for an oxide-nitride-oxide (ONO) dielectric structure at about a temperature of 700° C. By such a process, an ONO dielectric structure can be formed using a low temperature deposition process, which can reduce the thickness of the ONO dielectric structure.

Abstract: This invention provides imin complex dyes for a high-density optical disc recording medium having the following formula (I): wherein Y constitutes oxygen atom, sulfate atom, carbon atom with substitutes (C—R5) or nitrogen atom with substitutes (N—R6); R1 constitutes alkyl group having carbon number one to eighteen with or without substitutes or ether group, p-alkyl benzyl group with or without substitutes; R2, R3, R5, R6, R7 can be same or different groups; and X constitutes halogen atom, ClO4−, BF4−, PF6−, SbF6−, TCNQ−, TCNE−, naphthalenesulfonic acid or organometallic complex.x. The bis-styryl dyes whose spectra maximum absorption in visible light range of wavelength of 300 nm˜800 nm can be used as a high density optical disc recording medium.

Abstract: A fluorescent dye, a structure of a fluorescent storage media and method using thereof, are disclosed. The fluorescent dye of the present invention comprises an organic violet fluorescent compound having a chemical structure (I) is suitable for using a short wavelength laser having a wavelength less than 500 nm as an excitation source. When a short wavelength laser is used for exciting the organic violet fluorescent compound (I), a fluorescence having an emission wavelength larger than 500 nm is induced, and a reading signal can be provided by detecting the intensity of the fluorescence radiation.

Abstract: A plant cultivation method for preventing weed, pest and soil borne disease is disclosed. The method is characterized in that a photo-resistive and degradable covering material daubed with a bio-control microbe (a specific fungus: Gliocladium sp.) is applied to cover the cultivation media of a sown plant or transplanted seedling so as to control the weed growth and prevent pest and soil borne disease.

Abstract: A method of fabricating a semiconductor device is disclosed. A wafer substrate is provided. A first silicon oxide layer is formed over the wafer substrate. A nitride layer is formed over the first silicon oxide layer using a low temperature deposition process. A second silicon oxide layer is formed over the nitride layer. The low temperature process can form a nitride layer for an oxide-nitride-oxide (ONO) dielectric structure at about a temperature of 700° C. By such a process, an ONO dielectric structure can be formed using a low temperature deposition process, which can reduce the thickness of the ONO dielectric structure.

Abstract: A planting method for preventing pests, especially snails, is disclosed. The method includes the steps of (a) providing a biodegradable material, (b) adding a pesticide into the biodegradable material, and (c) spreading the pesticide-added biodegradable material on a plant-growing substrate. Therefore, a plant growing on the plant-growing substrate will not undergo the damage of pests.

Abstract: The present invention provides a method for forming a silicon nitride spacer by using an atomic layer deposition (ALD) method. The procedure of the ALD is to use a first kind of excess gas as a reactant air and thus produce a first mono-layer solid phase of the first reactant air on the wafer. When the first chemical reaction is completed, the first excess air is drawn out, and then the second excess air is released to deposit a second mono-layer solid phase of the second reactant air on the first mono-layer solid phase. In this way, a whole deposited layer with a layer of the first mono-layer solid phase, a layer of the second mono-layer solid phase, and so on are stepwise formed on the wafer surface. The ALD method is a time consuming task in deposition process such as in the generation of 0.35 &mgr;m to 0.5 &mgr;m of VLSI ages. However, in the generation of 0.18 &mgr;m, 0.

Abstract: Calculate the WIPi for a stage STkk for each lot Li in a queue of lots being processed in a production line between the stage STkk and an end point, where “i” is a positive integer representing the position of the lot Li in the queue, and where “kk” is a positive integer indicating the sequential position of the stage STkk (location along the production line) from the beginning to the end of a predetermined portion of the production line. Calculate remaining scheduled cycle time (RCTi) for each lot Li. Calculate consumed scheduled cycle time (CSTi) for each lot Li. Calculate (WIPi*RCTi) for each lot Li. Calculate (WIP*CSTi) for each lot Li. Sum WIPi*RCTi for all lots Li of a stage. Sum WIPi*CST for all lots Li of a stage.

Abstract: A surface treatment method for aluminum nitride includes the steps of:

Abstract: A method for forming an ONO structure in one chamber. The method at least includes the following steps. First of all, a substrate is provided. Then, a first oxide layer is formed on the substrate. Next, a first buffer layer is formed on the first oxide layer, and a silicon nitride layer is formed on the first buffer layer. Next, a second buffer layer is formed on the silicon nitride layer. Finally, a second oxide layer is formed on the second buffer layer.

Abstract: The present invention provides a method for forming a silicon nitride spacer by using an atomic layer deposition (ALD) method. The procedure of the ALD is to use a first kind of excess gas as a reactant air and thus produce a first mono-layer solid phase of the first reactant air on the wafer. When the first chemical reaction is completed, the first excess air is drawn out, and then the second excess air is released to deposit a second mono-layer solid phase of the second reactant air on the first mono-layer solid phase. In this way, a whole deposited layer with a layer of the first mono-layer solid phase, a layer of the second mono-layer solid phase, and so on are stepwise formed on the wafer surface. The ALD method is a time consuming task in deposition process such as in the generation of 0.35 &mgr;m to 0.5 &mgr;m of VLSI ages. However, in the generation of 0.18 &mgr;m, 0.

Abstract: An overlay mark for concurrently monitoring alignment accuracy, focus, leveling and astigmatism and a method of application thereof are disclosed. The overlay mark comprises four inner bars and four outer bars formed at the corners of exposure areas. The inner bar has a sawtooth area and a bar-shaped area, and the outer bar is a fore-layer etched pattern. Both the inner bars and the outer bars are formed into rectangles, and each bar is one side of a rectangle and none of the sides are connected. The sawtooth areas of the inner bars disposed on opposite sides are located at a same position. The rectangle formed by the outer bars encloses the rectangle formed by the inner bars. During the monitoring process, a testing beam scans across a scan area being divided into two areas, i.e., one being the outer bars and the sawtooth area of the inner bars, and the other one being the outer bars and the bar-shaped area of the inner bars.

Abstract: A flash memory structure which includes a tunneling oxide layer, a floating gate, a dielectric stacked layer, a control gate and a source/drain region. The dielectric stacked layer is formed by successively stacking a first oxide layer, a dielectric layer made of a high dielectric constant material and a second oxide layer, and is installed between the floating gate and the control gate. The floating gate is formed on the tunneling oxide layer. The control gate is formed on the dielectric stacked layer. The source/drain region is installed within the substrate on the two sides of the floating gate.

Abstract: A structure of a flash memory is provided. The flash memory has a charge trapping layer, a gate and a source/drain region, wherein the charge trapping layer is formed by stacking in sequence a first oxide layer, a dielectric layer of high dielectric constant material and a second oxide layer. The gate is arranged on the charge trapping layer, and the source/drain region is arranged at the two lateral sides of the substrate.

Abstract: A method for forming a low loss dielectric layer in the tungsten chemical mechanic grinding process is disclosed. After forming a dielectric layer on the semiconductor substrate and smoothing the dielectric layer as an inner dielectric layer, a stop layer of undoped silicon dioxide, organ spin on glass, or silicon oxygen nitride are coated thereon. After process of plug lithographic and etching, a barrier layer of tungsten plug and metal tungsten are deposited sequentially. Finally, the surplus tungsten metal layer on the surface of a dielectric layer is removed by chemical mechanic grinding process until the stop layer is exposed. In the present invention, the stop layer is used to repair the scratches or defects generated from the smoothness in the chemical mechanic grinding process. Furthermore, in the tungsten chemical mechanic grinding process, it can assure that the inner dielectric layer will not be ground so that the object of low loss is achieved.

Abstract: A planting method for preventing pests, especially snails, is disclosed. The method includes the steps of (a) providing a biodegradable material, (b) adding a pesticide into the biodegradable material, and (c) spreading the pesticide-added biodegradable material on a plant-growing substrate. Therefore, a plant growing on the plant-growing substrate will not undergo the damage of pests.

Abstract: A module cover is equipped with at least one door latch transmission mechanism for closing the entrance of a wafer transport module, each door latch transmission mechanism includes a door latch supported on a roller at the module cover, a latch bolt pivotally coupled between one end of the door latch and a part of the module cover, and a driving wheel coupled to the module cover and rotated to move the door latch forwards and backwards and to further turn the latch bolt in and out of a through hole on the module cover and a respective latch hole on the wafer transport module to lock/unlock the module cover.