Patents by Inventor Yu Huang

Yu Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240274465
    Abstract: A method includes etching a semiconductor substrate to form a trench and a semiconductor strip. A sidewall of the semiconductor strip is exposed to the trench. The method further includes depositing a silicon-containing layer extending into the trench, wherein the silicon-containing layer extends on the sidewall of the semiconductor strip, filling the trench with a dielectric material, wherein the dielectric material is on a sidewall of the silicon-containing layer, and oxidizing the silicon-containing layer to form a liner. The liner comprises oxidized silicon. The liner and the dielectric material form parts of an isolation region. The isolation region is recessed, so that a portion of the semiconductor strip protrudes higher than a top surface of the isolation region and forms a semiconductor fin.
    Type: Application
    Filed: April 23, 2024
    Publication date: August 15, 2024
    Inventors: Po-Kai Hsiao, Han-De Chen, Tsai-Yu Huang, Huicheng Chang, Yee-Chia Yeo
  • Patent number: 12062678
    Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a substrate having a first side and a second side opposing the first side. The substrate has one or more sidewalls defining a trench extending along opposing sides of a pixel region having a first width. An isolation structure including one or more dielectric materials is disposed within the trench. The isolation structure has a second width. An image sensing element and a focal region are disposed within the pixel region. The focal region is configured to receive incident radiation along the second side of the substrate. A ratio of the second width to the first width is in a range of between approximately 0.1 and approximately 0.2, so that the focal region is completely confined between interior sidewall of the isolation structure facing the image sensing element.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: August 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng Yu Huang, Wei-Chieh Chiang, Keng-Yu Chou, Tzu-Hsuan Hsu
  • Publication number: 20240264363
    Abstract: A low latency free-space optical data communication channel has at least two opposing parabolic mirrors for transmitting an optical communication signal in the form of a parallel beam across a free-space channel. The input and output of the collimators are multicore optical fibers. Multiple cores of the multicore optical fibers are positioned at the focal points of the at least two opposing parabolic mirrors and the at least two opposing parabolic mirrors image the optical communications signal in each core of the multiple cores of the multicore fibers into corresponding cores of opposing multicore fibers forming at least one optical communication channel.
    Type: Application
    Filed: February 6, 2023
    Publication date: August 8, 2024
    Applicant: Panduit Corp.
    Inventors: Yu Huang, Richard J. Pimpinella, Jose M. Castro, Bulent Kose
  • Patent number: 12057398
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a fin disposed over a substrate, a gate structure disposed over a channel region of the fin, such that the gate structure traverses source/drain regions of the fin, a device-level interlayer dielectric (ILD) layer of a multi-layer interconnect structure disposed over the substrate, wherein the device-level ILD layer includes a first dielectric layer, a second dielectric layer disposed over the first dielectric layer, and a third dielectric layer disposed over the second dielectric layer, wherein a material of the third dielectric layer is different than a material of the second dielectric layer and a material of the first dielectric layer. The semiconductor device further comprises a gate contact to the gate structure disposed in the device-level ILD layer and a source/drain contact to the source/drain regions disposed in the device-level ILD layer.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: August 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Lin-Yu Huang, Sheng-Tsung Wang, Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 12055178
    Abstract: A hinge device includes a fixed shaft, a rotating sleeve, a fixed connection member, a torsion spring, a rotating connection member and a friction resistance assembly. The rotating sleeve is rotatably mounted on the fixed shaft and is located between a fixed end and a free end. One end of the fixed connection member is fixedly connected to the free end, and the other end is provided with a first slot. Two ends of the torsion spring are respectively equipped with a first snap-in pin and a second snap-in pin. The first snap-in pin inserts into the first slot. An extension part protrudes from a fixed part of the of the rotating connection member and is provided with a second slot. The second snap-in pin inserts into the second slot. The friction resistance assembly is disposed on the fixed shaft to provide torsional resistance to the rotating sleeve.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: August 6, 2024
    Assignee: FOSITEK CORPORATION
    Inventors: Chin-Yu Hsiao, Huan-Yu Huang
  • Patent number: 12057392
    Abstract: Methods to form vertically conducting and laterally conducting low-cost resistor structures utilizing dual-resistivity conductive materials are provided. The dual-resistivity conductive materials are deposited in openings in a dielectric layer using a single deposition process step. A high-resistivity ?-phase of tungsten is stabilized by pre-treating portions of the dielectric material with impurities. The portions of the dielectric material in which impurities are incorporated encompass regions laterally adjacent to where high-resistivity ?-W is desired. During a subsequent tungsten deposition step the impurities may out-diffuse and get incorporated in the tungsten, thereby stabilizing the metal in the high-resistivity ?-W phase. The ?-W converts to a low-resistivity ?-phase of tungsten in the regions not pre-treated with impurities.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: August 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jia-En Lee, Po-Yu Huang, Shih-Che Lin, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang, Feng-Yu Chang
  • Patent number: 12054436
    Abstract: A ceramic aerogel includes a porous framework including interconnected double-paned wall structures of a ceramic material, wherein each double-paned wall structure includes a pair of walls spaced apart by a gap.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: August 6, 2024
    Assignee: The Regents of the University of California
    Inventors: Xiangfeng Duan, Yu Huang, Xiang Xu
  • Patent number: 12055815
    Abstract: A display system and a lens assembly for eliminating color dispersion thereof is disclosed. The lens assembly includes a first concave lens, a circular polarizer, and a magnifying convex lens assembly. The first concave lens has a light-receiving surface and a concave surface opposite to each other. The light-receiving surface is a plane or a convex surface. The circular polarizer may be arranged on the concave surface of the first concave lens to have a curved shape corresponding to the concave surface. The magnifying convex lens assembly is arranged on the circular polarizer through an optical adhesive. The first concave lens, the circular polarizer, and the magnifying convex lens assembly are sequentially arranged along an optical axis. When the light-receiving surface is a convex surface, the circular polarizer is arranged on the light-receiving surface to have a curved surface corresponding to the convex surface.
    Type: Grant
    Filed: March 16, 2023
    Date of Patent: August 6, 2024
    Assignee: Interface Advanced Technology (Chengdu) Co., Ltd.
    Inventor: Shang Yu Huang
  • Publication number: 20240258158
    Abstract: A method includes forming a transistor over a substrate; forming a front-side interconnection structure over the transistor; after forming the front-side interconnection structure, removing the substrate; after removing the substrate, forming a backside via to be electrically connected to the transistor; depositing a dielectric layer to cover the backside via; forming an opening in the dielectric layer to expose the backside via; forming a spacer structure on a sidewall of the opening; after forming a spacer structure, forming a conductive feature in the opening to be electrically connected to the backside via; and after forming the conductive feature, forming an air gap in the spacer structure.
    Type: Application
    Filed: April 9, 2024
    Publication date: August 1, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Zhen YU, Huan-Chieh SU, Lin-Yu HUANG, Cheng-Chi CHUANG, Chih-Hao WANG
  • Patent number: 12051668
    Abstract: A method of forming a semiconductor device includes applying an adhesive material in a first region of an upper surface of a substrate, where applying the adhesive material includes: applying a first adhesive material at first locations of the first region; and applying a second adhesive material at second locations of the first region, the second adhesive material having a different material composition from the first adhesive material. The method further includes attaching a ring to the upper surface of the substrate using the adhesive material applied on the upper surface of the substrate, where the adhesive material is between the ring and the substrate after the ring is attached.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: July 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuan-Yu Huang, Li-Chung Kuo, Sung-Hui Huang, Shang-Yun Hou, Tsung-Yu Chen, Chien-Yuan Huang
  • Patent number: 12051928
    Abstract: Provided are a washing device, a control method thereof and a smart home apparatus. The washing device includes a support plate, a charging cup, a liquid feeder and a power supply management system. A top surface of the support plate is provided with a first charging stand. The heating member can be electrically connected to the first charging stand. The liquid feeder is provided with a fluid inlet, a fluid outlet and an on-off switch. The power supply management system is connected to and controls the first charging stand and the on-off switch, the power supply management system receives a start-up instruction, controls the on-off switch to be turned on according to the start-up instruction to supply liquid to the charging cup, and controls the first charging stand to be electrified according to the start-up instruction to heat the liquid in the charging cup through the heating member.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: July 30, 2024
    Assignee: LUXSHARE PRECISION INDUSTRY CO., LTD.
    Inventors: Huabing Li, Zhongyuan Lai, Yu Huang, Zhexian Tianzhou
  • Patent number: 12050248
    Abstract: This application provides decompression circuits. An example decompression circuit includes a plurality of sub-circuits. The sub-circuit includes a plurality of cellular automaton (CA) circuits and a phase shifter. Each of the plurality of CA circuits includes a first XOR circuit and a register. The first XOR circuit includes a first input end, a second input end, and an output end. A data input end of the register is coupled to the output end of the first XOR circuit. A data output end of the register is coupled to the first input end of the first XOR circuit and an input end of the phase shifter. The data output end of the register is further coupled to the second input end of the first XOR circuit in a different CA circuit. The phase shifter is configured to output a test signal.
    Type: Grant
    Filed: April 21, 2023
    Date of Patent: July 30, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yu Huang, Weiwei Zhang
  • Publication number: 20240250017
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a device, a first dielectric material disposed over the device, and an opening is formed in the first dielectric material. The semiconductor device structure further includes a conductive structure disposed in the opening, and the conductive structure includes a first sidewall. The semiconductor device structure further includes a surrounding structure disposed in the opening, and the surrounding structure surrounds the first sidewall of the conductive structure. The surrounding structure includes a first spacer layer and a second spacer layer adjacent the first spacer layer. The first spacer layer is separated from the second spacer layer by an air gap.
    Type: Application
    Filed: March 14, 2024
    Publication date: July 25, 2024
    Inventors: Lin-Yu HUANG, Li-Zhen YU, Chia-Hao CHANG, Cheng-Chi CHUANG, Kuan-Lun CHENG, Chih-Hao WANG
  • Publication number: 20240245365
    Abstract: A method for planning a moving path of a machine table in a medical imaging system is described. The method includes determining a to-be-scanned region in an object 3D point cloud of the object based on a scanning plan, determining a center of gravity of the to-be-scanned region and a height of the center of gravity, determining a target height for positioning the machine table based on the height of the center of gravity and a central height of the scanning space, so that the height of the center of gravity is equal to the central height of the scanning space when the machine table is positioned at the target height, and planning the moving path of the machine table based on the determined target height. The scanning plan comprises positioning information of the to-be-scanned region relative to the object.
    Type: Application
    Filed: April 4, 2024
    Publication date: July 25, 2024
    Inventors: Yanran Xu, Yu Huang, Fanbo Meng, Raghu Prasad, Adam G. Pautsch
  • Publication number: 20240250151
    Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to one embodiment includes an active region including a channel region and a source/drain region adjacent the channel region, a gate structure over the channel region of the active region, a source/drain contact over the source/drain region, a dielectric feature over the gate structure and including a lower portion adjacent the gate structure and an upper portion away from the gate structure, and an air gap disposed between the gate structure and the source/drain contact. A first width of the upper portion of the dielectric feature along a first direction is greater than a second width of the lower portion of the dielectric feature along the first direction. The air gap is disposed below the upper portion of the dielectric feature.
    Type: Application
    Filed: April 5, 2024
    Publication date: July 25, 2024
    Inventors: Chia-Hao Chang, Lin-Yu Huang, Sheng-Tsung Wang, Cheng-Chi Chuang, Yu-Ming Lin, Chih-Hao Wang
  • Publication number: 20240251169
    Abstract: This document describes apparatuses and techniques enabling a scale down capture preview for a panorama capture user interface. This scale down preview enables users to more-easily and more-accurately capture images for a panorama.
    Type: Application
    Filed: April 1, 2024
    Publication date: July 25, 2024
    Inventors: Lawrence Chia-Yu Huang, Carsten Hinz, Chorong Hwang Johnston, Mike Ma, Isaac William Reynolds
  • Publication number: 20240246311
    Abstract: A shaping apparatus for shaping a workpiece includes a controlling module and a pressing module, a moving module, a sensing module and a shaping calculation module that are connected to the controlling module. The pressing module includes two pressing elements respectively applying load to a top/bottom surface of the workpiece. The moving module includes a moving platform moving the workpiece horizontally between a sensing zone and a processing zone. The sensing module performs a capturing process on the workpiece in the sensing zone to obtain a surface information. The shaping calculation module compares the surface information with an ideal shape data to calculate and get a shaping information. The moving platform moves the workpiece to the sensing zone. The sensing module performs a capturing process on the workpiece. The moving platform moves the workpiece to the processing zone. The pressing module performs a shaping treatment on the workpiece.
    Type: Application
    Filed: March 4, 2024
    Publication date: July 25, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Po-Huang SHIEH, Po-Nien TSOU, Hsuan-Yu HUANG, Wei-Chieh CHANG
  • Publication number: 20240249054
    Abstract: A method for designing a test circuit, includes determining a feature of a to-be-tested circuit based on data representing the to-be-tested circuit. The method further includes determining switch distribution for the to-be-tested circuit based on the feature of the to-be-tested circuit. The switch distribution represents distribution, in a two-dimensional switch matrix circuit, of a plurality of switches that are in a test circuit and that are coupled to a plurality of scan chains of the to-be-tested circuit. The switch matrix circuit includes a plurality of rows and a plurality of columns, any one of the plurality of rows has at least one of the plurality of switches, and any one of the plurality of columns has at least one of the plurality of switches.
    Type: Application
    Filed: January 29, 2024
    Publication date: July 25, 2024
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Zezhong Wang, Yu Huang, Weiwei Zhang, Naixing Wang, Pengju Li
  • Publication number: 20240248560
    Abstract: A touch detection circuitry includes an analog-to-digital converter (ADC), a controller, and a packet generator. The ADC is arranged to convert touch signals of a touch panel from analog form into digital form. The controller is electrically connected to the ADC, and is configured to calculate at least one coordinate point, at least one touch event type, and at least one touch size respectively corresponding to at least one touch event on the touch panel based on the touch signals. The packet generator is electrically connected to the controller, and is configured to encapsulate the at least one coordinate point, the at least one touch event type, and the at least one touch size into a touch data packet.
    Type: Application
    Filed: April 1, 2024
    Publication date: July 25, 2024
    Inventors: Yu Nian OU, Chun Kai CHUANG, Yu-Hsiang LIN, Te Yu HUANG
  • Patent number: 12044890
    Abstract: An optical module unlocking apparatus includes: a base, a sliding member, a driving piece, and an elastic piece. The sliding member is slidably disposed on the base along an insertion direction. The driving piece is rotatably connected to the base, the other end of the sliding member is connected to the driving piece, and the driving piece can rotate from a locked state to an unlocked state relative to the base under an action of external force, and drive the sliding member to move relative to the base along the insertion direction. A second connecting part is disposed on the driving piece. Because the driving piece is located outside a cage, space for disposing the elastic piece on the driving piece is sufficient, and the driving piece does not need to fit a spring plate. This simplifies a structure of the optical module and improves processing efficiency.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: July 23, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yabing Zhu, Song Yang, Liang Xu, Yu Huang