Patents by Inventor Yu-Hung Lin

Yu-Hung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9258819
    Abstract: A femtocell includes a frequency offset detecting module and a frequency correction module. The frequency offset detecting module calculates frequency offset and detects whether the frequency offset exceeds a default frequency offset. The frequency detecting offset module counts the time of the frequency offset exceeding the default frequency offset, and detects whether the counted number of times exceed a first default number. The frequency detecting module re-calculates frequency offset after an internal when the counted number of times does not exceed the first default number. The frequency correction module uses a last calculated frequency offsets to adjust the frequency of the femtocell, when the counted number of times exceed the first default number. A method of adjusting frequency of the femtocell is also provided.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: February 9, 2016
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Yu-Hung Lin
  • Publication number: 20160007445
    Abstract: The high-frequency signal processing method provides at least two isolation terminals between adjacent signal transmission conductor sets. For two adjacent signal transmission conductor sets of a substrate, at least two vias through the substrate are embedded with conductive pillars, respectively. Each conductive pillar penetrates the dielectric layers of the substrate from a top side to a bottom side of the substrate. Each via with the embedded conductive pillar functions as an isolation terminal. The signal transmission conductor sets are as such segregated by the isolation terminals and the isolation terminals provides two layers of shielding. With the present invention, there is no requirement of having a casing and the miniaturization of form factors of the electronic appliances is not compromised. The dual isolation terminals significantly suppress the strength and influence of interference produced by a signal transmission conductor.
    Type: Application
    Filed: July 4, 2014
    Publication date: January 7, 2016
    Inventors: Hsuan-Ho Chung, Yu-Hung Lin
  • Publication number: 20160006148
    Abstract: An obversely and reversely pluggable connector structure, includes a multi-plate circuit board, first transmission conductor set and second transmission conductor set each, a plurality of first soldering faces and second soldering faces, a plurality of first conduction portions and second conduction portions, a plurality of first through holes and second through hole portions, a first shielding shell and second shielding shell each, first capacitor unit and second capacitor unit each at least, allowing the first transmission conductor set and second transmission conductor set different in length to clamp a connector to the circuit board together through the above components, and components for soldering, conducting, reducing noise are configured correspondingly to each transmission conductor set, thereby achieving the reduction of the volume upon a connector assembly, and having the effect of decreasing EMI (Electromagnetic interference) and RFI (radio frequency interference).
    Type: Application
    Filed: July 7, 2014
    Publication date: January 7, 2016
    Inventors: Hsuan-Ho Chung, Yu-Hung Lin, Wei-Pang Chung, Kuang-Shan Li, Yuan-Chin Chiang
  • Publication number: 20160005824
    Abstract: Embodiments of the present disclosure include contact structures and methods of forming the same. An embodiment is a method of forming a semiconductor device, the method including forming a contact region over a substrate, forming a dielectric layer over the contact region and the substrate, and forming an opening through the dielectric layer to expose a portion of the contact region. The method further includes forming a metal-silicide layer on the exposed portion of the contact region and along sidewalls of the opening; and filling the opening with a conductive material to form a conductive plug in the dielectric layer, the conductive plug being electrically coupled to the contact region.
    Type: Application
    Filed: July 1, 2014
    Publication date: January 7, 2016
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou, Chia-Lin Hsu
  • Patent number: 9230795
    Abstract: A method includes etching a dielectric layer to form an opening, with an underlying region underlying the dielectric layer exposed to the opening, and performing a bombardment to bombard a surface region of the underlying region through the opening. After the bombardment, the surface region is reacted with a process gas to form a reaction layer. An anneal is then performed to remove the reaction layer.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: January 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Shiuan Wang, Hung-Chang Hsu, Li-Wei Chu, Sheng-Hsuan Lin, Chun-Hsien Huang, Yu-Hung Lin, Chih-Wei Chang, Wei-Jung Lin
  • Publication number: 20150370459
    Abstract: In a system and method for generating a mobile application, a static picture constructing a static object, and first and second pictures associated with an interactive element are defined from multiple digital pictures based on page metadata corresponding to the digital pictures. Transformed static, first and second pictures are generated based on the static, first and second pictures and on their original and corrected specifications. The page metadata, a preview page generated based on the transformed static and first pictures, a background page generated based on the transformed static picture, and the transformed first and second pictures are packaged to generate the mobile application.
    Type: Application
    Filed: October 8, 2014
    Publication date: December 24, 2015
    Inventors: Shih-Chun CHOU, Bo-Fu LIU, Jih-Yiing LIN, Peng-Hua CHU, Yi-Chun HSIEH, Yu-Hung LIN
  • Publication number: 20150369446
    Abstract: A lighting device for a sheet metal is provided, for emitting lights on a sheet metal. The lighting device includes: a bottom plate; a wireless remote module, including a signal receiver for receiving a wireless control signal; a plurality of lighting modules, for emitting a plurality of light colors; a cover body, covering the lighting modules and including a light translucent portion and a light opaque portion. The wireless remote module controls the lighting modules to emit light. The light from the lighting modules goes through the light translucent portion and projects a projection boundary defined by a common boundary constructed by the light translucent portion and the light opaque portion on the sheet metal. A lighting system for a sheet metal is also provided, including the lighting device described above and a support device. The lighting device is adjustably assembled with the support device.
    Type: Application
    Filed: June 23, 2014
    Publication date: December 24, 2015
    Inventors: Yu-Hung LIN, Cheng-Tse CHANG
  • Publication number: 20150325484
    Abstract: Disclosed herein is a method of forming a metal-to-semiconductor contact with a doped metal oxide interlayer. An insulating layer is formed on a top surface of a semiconductor substrate with target region at the top surface of the semiconductor substrate. An opening is etched through the insulating layer with the opening exposing a top surface of a portion of the target region. A doped metal oxide interlayer is formed in the opening and contacts the top surface of the target region. The remainder of the opening is filled with a metal plug, the doped metal oxide interlayer disposed between the metal plug and the substrate. The doped metal oxide interlayer is formed from one of tin oxide, titanium oxide or zinc oxide and is doped with fluorine.
    Type: Application
    Filed: May 9, 2014
    Publication date: November 12, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou
  • Publication number: 20150318243
    Abstract: An embodiment contact plug includes a bilayer structure and a diffusion barrier layer on a sidewall and a bottom surface of the bilayer structure. The bilayer structure includes a conductive core and a conductive liner on a sidewall and a bottom surface of the conductive core. In the embodiment contact plug, the conductive liner comprises cobalt or ruthenium.
    Type: Application
    Filed: June 24, 2014
    Publication date: November 5, 2015
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou, Chia-Lin Hsu
  • Publication number: 20150311150
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a silicide layer over a substrate, a metal plug in an opening defined by a dielectric layer over the substrate, a first metal layer between the metal plug and the dielectric layer and between the metal plug and the silicide layer, a second metal layer over the first metal layer, and an amorphous layer between the first metal layer and the second metal layer.
    Type: Application
    Filed: April 25, 2014
    Publication date: October 29, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou
  • Patent number: 9159666
    Abstract: A structure for an integrated circuit includes a substrate, a cap layer deposited on the substrate, a dielectric layer deposited on the cap layer, and a trench embedded in the dielectric layer. The trench includes a TaN layer deposited on a side wall of the trench wherein the TaN layer has a greater concentration of nitrogen than tantalum, a Ta layer deposited on the TaN layer, and a Cu deposited on the Ta layer. The structure further includes a via integrated into the trench at bottom of the filled trench. In an embodiment, both the TaN layer and the Ta layer are formed with physical vapor deposition (PVD) wherein the TaN layer is formed with plasma sputtering a Ta target with an N2 flow at least 20 sccm.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: October 13, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Lien Lee, Hung-Wen Su, Yu-Hung Lin, Kuei-Pin Lee, Yu-Min Chang
  • Patent number: 9147979
    Abstract: An electric connector includes at least one transmission conductor group, a plurality of contacts formed at an end of the transmission conductor group and up and down alternating each other, and adaption sections formed at an end of the transmission conductor group distant from the contacts and are arranged in groups each including at least four adaption sections juxtaposing each other. The transmission conductor group includes a plurality of high-frequency differential signal transmission conductor pairs, a plurality of power transmission conductor pair, and a plurality of low-frequency signal transmission conductors. With the above arrangement, the contact of the transmission conductor group is arranged in two rows alternating each other so that the insertion between the male and female connectors is directionless. The adaption sections are set in a secured juxtaposing configuration by means of an annular band to show the feature of soldering free and suppressing interference.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: September 29, 2015
    Assignee: Kuang Ying Computer Equipment Co., Ltd.
    Inventors: Hsuan-Ho Chung, Yu-Hung Lin, Kuang-Shan Li
  • Publication number: 20150262870
    Abstract: A method for forming an interconnect structure includes forming a dielectric layer overlying a substrate, forming an opening in the dielectric layer, forming a metal-containing layer overlying the opening in the dielectric layer, forming a conformal protective layer overlying the metal-containing layer, filling a conductive layer in the opening, and performing a thermal process to form a metal oxide layer barrier layer underlying the metal-containing layer.
    Type: Application
    Filed: May 29, 2014
    Publication date: September 17, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Hung Lin, Ching-Fu Yeh, Yu-Min Chang, You-Hua Chou, Chih-Wei Chang, Sheng-Hsuan Lin
  • Publication number: 20150262938
    Abstract: A method for forming an interconnect structure includes forming a dielectric layer overlying a substrate, forming an opening in the dielectric layer, forming a metal-containing layer overlying the opening in the dielectric layer, forming a conformal protective layer overlying the metal-containing layer, filling a conductive layer in the opening, and performing a thermal process to form a metal oxide layer barrier layer underlying the metal-containing layer.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 17, 2015
    Inventors: Yu-Hung Lin, Ching-Fu Yeh, Yu-Min Chang, You-Hua Chou, Chih-Wei Chang
  • Publication number: 20150257149
    Abstract: A femtocell includes a frequency offset detecting module and a frequency correction module. The frequency offset detecting module calculates frequency offset and detects whether the frequency offset exceeds a default frequency offset. The frequency detecting offset module counts the time of the frequency offset exceeding the default frequency offset, and detects whether the counted number of times exceed a first default number. The frequency detecting module re-calculates frequency offset after an internal when the counted number of times does not exceed the first default number. The frequency correction module uses a last calculated frequency offsets to adjust the frequency of the femtocell, when the counted number of times exceed the first default number. A method of adjusting frequency of the femtocell is also provided.
    Type: Application
    Filed: April 23, 2014
    Publication date: September 10, 2015
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: YU-HUNG LIN
  • Publication number: 20150255396
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a metal plug in a first opening over a substrate. The metal plug has a contact bottom surface that is substantially convex. The substantially convex contact bottom surface has an increased contact area as compared to a contact bottom surface of a metal plug that is not substantially convex. The increased contact area decreases a resistance of the metal plug. The increased contact area requires a smaller deposition amount to form a metal plug seed layer of the metal plug than a semiconductor device with a smaller contact area. A smaller deposition amount reduces an overhang of the deposited metal plug seed layer material. A reduced overhang of the deposited metal plug seed layer material reduces pitting in a metal plug formed from the deposited metal plug seed layer material.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 10, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou
  • Publication number: 20150235956
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a metal plug in a first opening over a substrate, the metal plug is over a silicide layer, and the silicide layer is over a metal oxide layer. The metal oxide layer has an oxygen gradient, such that a percentage of oxygen increases from a top surface of the metal oxide layer to a bottom surface of the metal oxide layer. The metal oxide layer unpins the Fermi level of the interface between the metal plug and the substrate, which is exhibited by a lowered Schottky barrier height (SBH) and increased oxygen vacancy states between the V.B. and the C.B. of the metal oxide layer, which decreases the intrinsic resistivity between the metal plug and the substrate as compared to a semiconductor device that lacks such a metal oxide layer.
    Type: Application
    Filed: February 14, 2014
    Publication date: August 20, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou
  • Publication number: 20150235958
    Abstract: A method for producing a metal contact in a semiconductor device is disclosed. The method comprises depositing a catalyst layer in a via hole, forming a catalyst from the deposited catalyst layer, and growing a carbon nanotube structure above the catalyst in the via hole. The method further comprises forming salicide from the catalyst, applying a chemical mechanical polishing (CMP) process to the carbon nanotube structure to remove top layers of catalyst and nanotube material, and depositing metal material above the carbon nanotube structure. Growing a carbon nanotube structure comprises absorbing a precursor on a surface of the catalyst formed in the via hole, forming a metal-carbon alloy from the catalyst and the precursor, and growing a carbon nanotube structure vertically from the via bottom. The carbon nanotube structure comprises a plurality of carbon nanotubes wherein the diameters of the carbon nanotubes are limited by the catalyst size.
    Type: Application
    Filed: February 14, 2014
    Publication date: August 20, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: YU-HUNG LIN, CHING-FU YEH, CHIH-WEI CHANG
  • Patent number: 9064934
    Abstract: A device and a method of forming the device is provided. The device includes a dielectric layer overlying a substrate, a conductive line with a sidewall in the dielectric layer, a Ta layer adjoining the sidewall of the conductive line, and a metal oxide formed between the Ta layer and the dielectric layer.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: June 23, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Lin, Chi-Yu Chou, Kuei-Pin Lee, Chen-Kuang Lien, Yu-Chang Hsiao, Yao Hsiang Liang, Yu-Min Chang
  • Publication number: 20150142576
    Abstract: A method for displaying an adaptive advertisement object on a mobile device, the method includes the following steps. Execute a mobile application to display a page including at least one adaptive advertisement object. The mobile application includes a description file, at least one content resource file, at least one advertisement resource file and a parsing module. The resource file includes at least one content object being displayed on the page. The description file includes a content description and an advertisement object description. The advertisement object description includes at least one keyword, at least one visual characteristic and at least one advertisement presentation description. The advertisement resource file is acquired from an advertisement resource file database.
    Type: Application
    Filed: May 7, 2014
    Publication date: May 21, 2015
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Shih-Chun Chou, Bo-Fu Liu, Jih-Yiing Lin, Yu-Hung Lin