Abstract: A thin film transistor includes a substrate, a semiconductor layer, a gate insulating layer, a gate, a source and a drain. The semiconductor layer is located above the substrate. The gate insulating layer is located above the semiconductor layer. The gate is located above the gate insulating layer and overlapping with the semiconductor layer. The gate includes a first portion, a second portion and a third portion. The first portion is extending along the surface of the gate insulating layer and directly in contact with the gate insulating layer. The second portion is separated from the gate insulating layer. Taking the surface of the gate insulating layer as a reference, the top surface of the second portion is higher than the top surface of the first portion. The third portion connects the first portion to the second portion. The source and the drain are electrically connected to the semiconductor layer.

Abstract: A transmission device includes a daisy chain structure composed of at least three daisy chain units arranged periodically and continuously. Each of the daisy chain units includes first, second and third conductive lines, and first and second conductive pillars. The first and second conductive lines at a first layer extend along a first direction and are discontinuously arranged. The third conductive line at a second layer extends along the first direction and is substantially parallel to the first and second conductive lines. The first conductive pillar extends in a second direction. The second direction is different from the first direction. A first part of the first conductive pillar is connected to the first and third conductive lines. The second conductive pillar extends in the second direction. A first part of the second conductive pillar is connected to the second and third conductive lines.

Abstract: A light-emitting diode and a manufacturing method thereof are provided. The manufacturing method includes following steps. First, an LED wafer is provided. The LED wafer includes a substrate and a light-emitting semiconductor stacking structure positioned on the surface of the substrate. The light-emitting semiconductor stacking structure includes a first type semiconductor layer, an active layer, and a second type semiconductor layer from a side of the substrate. Second, dicing lanes are defined on the upper surface of the LED wafer. Third, dicing is performed along the dicing lanes of the substrate using a laser. The laser is focused on the lower surface of the substrate to form a surface hole and focused inside the substrate to form an internal hole. The diameter of the surface hole is greater than the diameter of the internal hole. Fourth, the LED wafer is separated into LED chips along the dicing lanes.

Abstract: A semiconductor device includes a substrate, a first well region, a second well region, an isolation region, a first resistor segment and a second resistor segment. The substrate includes a region having a first conductivity type. The first and the second well regions are disposed in the region of the substrate. The isolation region is disposed on the first and the second well regions. The first and the second resistor segments are electrically connected to each other and disposed on the isolation region. Moreover, the first and the second well regions are disposed directly under the first and the second resistor segments, respectively. The first and the second well regions do not overlap with each other in a vertical projection direction and have a second conductivity type that is opposite to the first conductivity type.

Abstract: Methods of forming semiconductor devices are provided. The methods include: forming a trench in a substrate, wherein the trench includes a defect protruding from a bottom surface of the trench; forming a flowable material on the substrate to at least partially cover the defect; performing an etching process to reduce the height of the defect; and removing the flowable material.

Abstract: Methods of forming semiconductor devices are provided. The methods include: forming a trench in a substrate, wherein the trench includes a defect protruding from a bottom surface of the trench; forming a flowable material on the substrate to at least partially cover the defect; performing an etching process to reduce the height of the defect; and removing the flowable material.

Abstract: An apparatus of adaptive index structures is provided. Four common data attributes, including time, space, keyword, and value, are used. The present invention is a structure adaptively selecting the most efficient combined index by estimating index performance and selectivity rate. The main concept is to set indexes with high selectivity rates at positions having higher priorities for processing query. The intermediate result of query is minimized and the performance is further improved. The present invention uses multiple indexes, where all possible combined-index orders are considered and the best combined index is selected according to different query adaptabilities. As a result, the structure has a high chance of saving query time at a rate of more than 25 times as compared to a structure with indexes of a single attribute sequence. Furthermore, as compared to the traditional relational database PostGIS, the reaction time is also twice faster.

Abstract: An electro-phoretic display apparatus including an electro-phoretic display panel and a driving circuit is provided. The electro-phoretic display panel includes a display area and a border area. The driving circuit is configured to drive the display area to display an image frame according to a first voltage. The driving circuit drives the border area to maintain displaying a border of a first color or a second color according to a second voltage. The driving circuit generates the second voltage according to the first voltage. The border area includes electro-phoretic particles of the first color or the second color. A voltage difference between the first voltage and the second voltage drives the electro-phoretic particles of the first color or the second color to be maintained to a predetermined position such that the border area maintains displaying the border of the first color or the second color.

Abstract: An electro-phoretic display apparatus including an electro-phoretic display panel and a driving circuit is provided. The electro-phoretic display panel includes a display area and a border area. The driving circuit is configured to drive the display area to display an image frame according to a first voltage. The driving circuit drives the border area to maintain displaying a border of a first color or a second color according to a second voltage. The driving circuit generates the second voltage according to the first voltage. The border area includes electro-phoretic particles of the first color or the second color. A voltage difference between the first voltage and the second voltage drives the electro-phoretic particles of the first color or the second color to be maintained to a predetermined position such that the border area maintains displaying the border of the first color or the second color.

Abstract: An electro-phoretic display apparatus including an electro-phoretic display panel and a driving circuit is provided. The electro-phoretic display panel includes a display area and a border area. The driving circuit is coupled to the electro-phoretic display panel. The driving circuit is configured to drive the display area to display an image frame according to a first voltage. The driving circuit drives the border area to maintain displaying a white border or a black border according to a second voltage.

Abstract: An electro-phoretic display apparatus including an electro-phoretic display panel and a driving circuit is provided. The electro-phoretic display panel includes a display area and a border area. The driving circuit is coupled to the electro-phoretic display panel. The driving circuit is configured to drive the display area to display an image frame according to a first voltage. The driving circuit drives the border area to maintain displaying a white border or a black border according to a second voltage.

Abstract: A semiconductor structure and a method of manufacturing the semiconductor structure are provided. The semiconductor structure includes at least a substrate, an isolated structure, a gate, a source, a drain, a deep well, and a body well. The deep well extends under the isolated structure, and the body well is formed in the deep well between the gate and the isolated structure, wherein the body well has a convex region extending under the isolated structure. The deep well has a drive-in region outside the convex region of the body well, and the drive-in region has a lower doping concentration than remainder of the deep well.

Abstract: A semiconductor device includes a substrate; a well region of a first-conductivity-type, disposed in the substrate; a first impurity region of a first-conductivity-type disposed in the well region; a second impurity region of the second-conductivity-type disposed in the well region, the second-conductivity-type being opposite to the first-conductivity-type; a third impurity region disposed in the well region, a portion of the first impurity region overlapping a first portion of the third impurity region, a portion of the second impurity region overlapping a second portion of the third impurity region, and a third portion of the third impurity region being disposed between the first impurity region and the second impurity region; and a fourth impurity region and a barrier layer disposed in the substrate, the fourth impurity region and the barrier layer enclosing the well region from around and below, respectively.

Abstract: A semiconductor device includes a substrate, a well region of a first-conductivity type disposed in the substrate, a first impurity region of a second-conductivity type and having a plurality of branches disposed in the well region, a second impurity region of the first-conductivity type and having a plurality of branches, and a third impurity region of the first-conductivity type disposed in the well region. The second-conductivity type is opposite to the first-conductivity type. A portion of the first impurity region overlaps a portion of the third impurity region. The plurality of branches of the second impurity region are disposed in the third impurity region, and a portion of the third impurity region is disposed between the first impurity region and the second impurity region.

Abstract: A semiconductor device includes a substrate, a well region of a first-conductivity type disposed in the substrate, a first impurity region of a second-conductivity type and having a plurality of branches disposed in the well region, a second impurity region of the first-conductivity type and having a plurality of branches, and a third impurity region of the first-conductivity type disposed in the well region. The second-conductivity type is opposite to the first-conductivity type. A portion of the first impurity region overlaps a portion of the third impurity region. The plurality of branches of the second impurity region are disposed in the third impurity region, and a portion of the third impurity region is disposed between the first impurity region and the second impurity region.

Abstract: A semiconductor device includes a substrate having a first conductivity type, a high-voltage well having a second conductivity type and disposed in the substrate, a source region disposed in the high-voltage well, a drain region disposed in the high-voltage well and spaced apart from the source region along a first direction, and a buried layer having the second conductivity type and disposed under an area between the source region and the drain region.

Abstract: A semiconductor device includes a substrate having a first conductivity type, a high-voltage well having a second conductivity type and disposed in the substrate, a source region disposed in the high-voltage well, a drain region disposed in the high-voltage well and spaced apart from the source region along a first direction, and a buried layer having the second conductivity type and disposed under an area between the source region and the drain region.

Abstract: A semiconductor device includes a substrate, a high-voltage N-well (HVNW) disposed in the substrate, a bulk P-well disposed in the substrate and adjacent to an edge of the HVNW, a high-voltage (HV) diode disposed in the HVNW, the HV diode including a HV diode P-well disposed in the HVNW and spaced apart from the edge of the HVNW, and an N-well disposed in the HVNW and between the HV diode P-well and the bulk P-well. A doping concentration of the N-well is higher than a doping concentration of the HVNW.

Abstract: A semiconductor device includes a substrate, a high-voltage N-well (HVNW) disposed in the substrate, a bulk P-well disposed in the substrate and adjacent to an edge of the HVNW, a high-voltage (HV) diode disposed in the HVNW, the HV diode including a HV diode P-well disposed in the HVNW and spaced apart from the edge of the HVNW, and an N-well disposed in the HVNW and between the HV diode P-well and the bulk P-well. A doping concentration of the N-well is higher than a doping concentration of the HVNW.

Abstract: A semiconductor device includes a substrate, an insulation layer disposed over the substrate, covering a drift region, and including a first edge and a second edge opposite to the first edge, a gate layer covering the first edge of the insulation layer, and a metal layer including a metal portion connected to the gate layer and overlapping the first edge of the insulation layer. The metal portion includes a first edge located closer to a central portion of the insulation layer than an opposite second edge of the metal portion. A distance from the first edge of the metal portion to the first edge of the insulation layer along a channel length direction is a. A distance from the first edge of the insulation layer to the second edge of the insulation layer is L. A ratio of a/L is equal to or higher than 0.46.