Patents by Inventor Yu Ku
Yu Ku has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250149844Abstract: Some implementations described herein provide a laser device. The laser device includes a first portion of the laser device, at a proximal end of the laser device, that includes one or more optical devices, where the first portion is configured to emit first electromagnetic waves having a first wavelength. The laser device includes a second portion of the laser device, at a distal end of the laser device, that includes an optical crystal configured to receive the first electromagnetic waves and to emit second electromagnetic waves having a second wavelength based on reception of the first electromagnetic waves, where the optical crystal includes a thin film coating disposed on an end of the optical crystal, the thin film coating configured to: support emission of the second electromagnetic waves from the optical crystal, and support internal reflection of the first electromagnetic waves within the optical crystal.Type: ApplicationFiled: December 27, 2024Publication date: May 8, 2025Inventors: Yu-Hua HSIEH, Ying-Yen TSENG, Wen-Yu KU, Kei-Wei CHEN
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Publication number: 20250149596Abstract: A method of manufacturing a current collector of an energy storage device includes the following. A substrate is provided. A modified layer is formed on the substrate using a microwave plasma chemical vapor deposition process. The modified layer includes nanographene and has a thickness of 1 nm to 500 nm. In the microwave plasma chemical vapor deposition process, a microwave frequency is 300 MHz to 300 GHz, a microwave power is 500 W to 75000 W, a temperature is 25° C. to 600° C., and a deposition time is less than 30 minutes. The microwave plasma chemical vapor deposition process includes the following. Inert gas or stable gas is passed in. Hydrocarbon gas and hydrogen are passed in. Microwaves are applied to generate plasma. The hydrocarbon gas and the hydrogen are ionized. Nanographene is formed on the substrate.Type: ApplicationFiled: December 13, 2023Publication date: May 8, 2025Applicants: Industrial Technology Research Institute, National Tsing Hua UniversityInventors: Hung-Hsin Shih, Kun-Ping Huang, Chi-Chang Hu, Hao-Yu Ku
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Patent number: 12272708Abstract: An image sensor device includes a semiconductor device, a plurality of photo sensitive regions, a dielectric layer, a grid structure, and a plurality of convex dielectric lenses. The photo sensitive regions are in the semiconductor substrate. The dielectric layer is over a backside surface of the semiconductor substrate. The grid structure is over a backside surface of the dielectric layer. The grid structure includes a plurality of grid lines. Each of the grid lines comprises a lower portion and an upper portion forming an interface with the lower portion. The convex dielectric lenses are alternately arranged with the grid lines over the backside surface of the dielectric layer. Apexes of the plurality of convex dielectric lenses are higher than an interface between the upper portion and the lower portion of each of the grid lines.Type: GrantFiled: December 5, 2022Date of Patent: April 8, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shiu-Ko Jangjian, Chih-Nan Wu, Chun-Che Lin, Yu-Ku Lin
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Publication number: 20250112221Abstract: Provided are a precursor solution, and a modified layer and a lithium-based battery prepared by using the same. The modified layer is formed on the negative electrode, the positive electrode and/or the separator of the lithium-based battery by using the precursor solution through photo-polymerization reaction or thermal curing. The lithium-based battery comprising the modified layer effectively promotes the charge and discharge capability, cycling life, and safety. The modified layer can be applied to a roll-to-roll process. The formation of lithium dendrites in the lithium-based battery comprising the modified layer is significantly suppressed or reduced during the charge-discharge cycles. The shuttle effect is effectively suppressed or reduced in lithium sulfur batteries and lithium iodine batteries. All the above effects are beneficial to increasing the product value of lithium ion batteries, lithium metal batteries, anode-free lithium batteries, lithium sulfur batteries, and lithium iodine batteries.Type: ApplicationFiled: December 12, 2024Publication date: April 3, 2025Applicant: National Tsing Hua UniversityInventors: Chi-Chang HU, Chih-Han YEN, Li-Qian WANG, Chen-Wei TAI, Hao-Yu KU
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Patent number: 12266593Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.Type: GrantFiled: August 2, 2023Date of Patent: April 1, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ting-Li Yang, Wen-Hsiung Lu, Jhao-Yi Wang, Fu Wei Liu, Chin-Yu Ku
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Publication number: 20250069904Abstract: A semiconductor fabrication facility is provided. The semiconductor fabrication facility includes a processing tool and a transmission assembly. The transmission assembly is connected to the processing tool and comprises a number of transmission lines used to supply electric power or a fluid to the processing tool or remove the fluid or an exhaust gas from the processing tool. The transmission lines includes a first transmission line and a second transmission line. The first transmission line has a first temperature and the second transmission line has a second temperature. The second temperature is higher than the first temperature. The first transmission line and the second transmission line are arranged such that a thermal energy of the second transmission line is able to be transmitted to the first transmission line to change the first temperature of the first transmission line.Type: ApplicationFiled: November 12, 2024Publication date: February 27, 2025Inventors: OTTO CHEN, YING-YEN TSENG, WEN-YU KU, CHIA-CHIH CHEN
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Patent number: 12224547Abstract: Some implementations described herein provide a laser device. The laser device includes a first portion of the laser device, at a proximal end of the laser device, that includes one or more optical devices, where the first portion is configured to emit first electromagnetic waves having a first wavelength. The laser device includes a second portion of the laser device, at a distal end of the laser device, that includes an optical crystal configured to receive the first electromagnetic waves and to emit second electromagnetic waves having a second wavelength based on reception of the first electromagnetic waves, where the optical crystal includes a thin film coating disposed on an end of the optical crystal, the thin film coating configured to: support emission of the second electromagnetic waves from the optical crystal, and support internal reflection of the first electromagnetic waves within the optical crystal.Type: GrantFiled: February 16, 2022Date of Patent: February 11, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Hua Hsieh, Ying-Yen Tseng, Wen-Yu Ku, Kei-Wei Chen
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Patent number: 12209013Abstract: A method includes bonding a supporting substrate to a semiconductor substrate of a wafer. A bonding layer is between, and is bonded to both of, the supporting substrate and the semiconductor substrate. A first etching process is performed to etch the supporting substrate and to form an opening, which penetrates through the supporting substrate and stops on the bonding layer. The opening has substantially straight edges. The bonding layer is then etched. A second etching process is performed to extend the opening down into the semiconductor substrate. A bottom portion of the opening is curved.Type: GrantFiled: August 6, 2023Date of Patent: January 28, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jhao-Yi Wang, Chin-Yu Ku, Wen-Hsiung Lu, Lung-Kai Mao, Ming-Da Cheng
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Patent number: 12187671Abstract: Embodiments of the present disclosure are directed towards methods of etherification including modifying a zeolite catalyst with silica to provide a silica modified zeolite catalyst; and contacting the silica modified zeolite catalyst with an olefin and an alcohol to produce a monoalkyl ether.Type: GrantFiled: September 23, 2020Date of Patent: January 7, 2025Assignee: Dow Global Technologies LLCInventors: Wen-Sheng Lee, Sung-Yu Ku, Stephen W. King
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Patent number: 12183581Abstract: Embodiment described herein provide a thermal treatment process following a high-pressure anneal process to keep hydrogen at an interface between a channel region and a gate dielectric layer in a field effect transistor while removing hydrogen from the bulk portion of the gate dielectric layer. The thermal treatment process can reduce the amount of threshold voltage shift caused by a high-pressure anneal. The high-pressure anneal and the thermal treatment process may be performed any time after formation of the gate dielectric layer, thus, causing no disruption to the existing process flow.Type: GrantFiled: July 25, 2023Date of Patent: December 31, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hongfa Luan, Yi-Fan Chen, Chun-Yen Peng, Cheng-Po Chau, Wen-Yu Ku, Huicheng Chang
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Patent number: 12170208Abstract: A semiconductor fabrication facility is provided. The semiconductor fabrication facility includes a processing tool and a transmission assembly. The transmission assembly is connected to the processing tool and comprises a number of transmission lines used to supply electric power or a fluid to the processing tool or remove the fluid or an exhaust gas from the processing tool. The transmission lines includes a first transmission line and a second transmission line. The first transmission line has a first temperature and the second transmission line has a second temperature. The second temperature is higher than the first temperature. The first transmission line and the second transmission line are arranged such that a thermal energy of the second transmission line is able to be transmitted to the first transmission line to change the first temperature of the first transmission line.Type: GrantFiled: May 28, 2021Date of Patent: December 17, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Otto Chen, Ying-Yen Tseng, Wen-Yu Ku, Chia-Chih Chen
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Publication number: 20240383744Abstract: A method includes bonding a supporting substrate to a semiconductor substrate of a wafer. A bonding layer is between, and is bonded to both of, the supporting substrate and the semiconductor substrate. A first etching process is performed to etch the supporting substrate and to form an opening, which penetrates through the supporting substrate and stops on the bonding layer. The opening has substantially straight edges. The bonding layer is then etched. A second etching process is performed to extend the opening down into the semiconductor substrate. A bottom portion of the opening is curved.Type: ApplicationFiled: July 26, 2024Publication date: November 21, 2024Inventors: Jhao-Yi Wang, Chin-Yu Ku, Wen-Hsiung Lu, Lung-Kai Mao, Ming-Da Cheng
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Patent number: 12134557Abstract: A method includes bonding a supporting substrate to a semiconductor substrate of a wafer. A bonding layer is between, and is bonded to both of, the supporting substrate and the semiconductor substrate. A first etching process is performed to etch the supporting substrate and to form an opening, which penetrates through the supporting substrate and stops on the bonding layer. The opening has substantially straight edges. The bonding layer is then etched. A second etching process is performed to extend the opening down into the semiconductor substrate. A bottom portion of the opening is curved.Type: GrantFiled: May 18, 2021Date of Patent: November 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jhao-Yi Wang, Chin-Yu Ku, Wen-Hsiung Lu, Lung-Kai Mao, Ming-Da Cheng
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Publication number: 20240363676Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a magnetic element over the substrate. The magnetic element has multiple sub-layers, and each sub-layer is wider than another sub-layer above it. The semiconductor device structure also includes an isolation layer extending exceeding edges the magnetic element, and the isolation layer contains a polymer material. The semiconductor device structure further includes a conductive line over the isolation layer and extending exceeding the edges of the magnetic element.Type: ApplicationFiled: July 9, 2024Publication date: October 31, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chi-Cheng CHEN, Wei-Li HUANG, Chun-Yi WU, Kuang-Yi WU, Hon-Lin HUANG, Chih-Hung SU, Chin-Yu KU, Chen-Shien CHEN
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Publication number: 20240297138Abstract: Package structures and methods for manufacturing the same are provided. The package structure includes a first substrate and through vias formed through the first substrate. The package further includes redistribution layers formed over the first substrate and connected to the through vias and a first pillar layer formed over the redistribution layers. The package further includes a first barrier layer formed over the first pillar layer and a first cap layer formed over the first barrier layer. The package further includes an underfill layer formed over the redistribution layers and surrounding the first pillar layer, the first barrier layer, and the first cap layer. In addition, the first barrier layer has a first protruding portion laterally extending outside a first sidewall surface of the first pillar layer and a second sidewall surface of the first cap layer.Type: ApplicationFiled: May 13, 2024Publication date: September 5, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Cheng-Hung CHEN, Yu-Nu HSU, Chun-Chen LIU, Heng-Chi HUANG, Chien-Chen LI, Shih-Yen CHEN, Cheng-Nan HSIEH, Kuo-Chio LIU, Chen-Shien CHEN, Chin-Yu KU, Te-Hsun PANG, Yuan-Feng WU, Sen-Chi CHIANG
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Patent number: 12074193Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a magnetic element over the substrate. The semiconductor device structure also includes an isolation layer extending exceeding edges the magnetic element. The isolation layer contains a polymer material. The semiconductor device structure further includes a conductive line over the isolation layer and extending exceeding the edges of the magnetic element.Type: GrantFiled: March 30, 2023Date of Patent: August 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chi-Cheng Chen, Wei-Li Huang, Chun-Yi Wu, Kuang-Yi Wu, Hon-Lin Huang, Chih-Hung Su, Chin-Yu Ku, Chen-Shien Chen
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Publication number: 20240199518Abstract: A method includes the step of contacting an olefin, an alcohol, a metallosilicate catalyst and a solvent, wherein the solvent comprises structure (I) wherein R1 is selected from the group consisting of a hydrogen or an alkyl group and R2 is selected from the group consisting of an alkyl group or an alkoxy group.Type: ApplicationFiled: June 20, 2022Publication date: June 20, 2024Inventors: Wen -Sheng Lee, Sung-Yu Ku, Le Wang, Paul D. Hutchins, Thomas Peterson
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Publication number: 20240170230Abstract: A method for prelithiating a soft carbon negative electrode includes the steps of: disposing the soft carbon negative electrode and a lithium metal piece spaced apart from each other with a lithium-containing electrolyte present therebetween; prelithiating the soft carbon negative electrode at a first constant C-rate until a voltage thereof is reduced to a first predetermined voltage not greater than 0.3 V vs. Li/Li+, the first constant C-rate being not greater than 5 C; prelithiating the soft carbon negative electrode at a second constant C-rate until the voltage thereof is reduced to a second predetermined voltage lower than the first predetermined voltage, the second constant C-rate being not greater than 0.2 C and being less than the first constant C-rate; and prelithiating the soft carbon negative electrode at a prelithiation constant voltage which is not greater than the second predetermined voltage, thereby completing prelithiation of the soft carbon negative electrode.Type: ApplicationFiled: January 13, 2023Publication date: May 23, 2024Inventors: Yan-Shi CHEN, Guo-Hsu LU, Chi-Chang HU, Chih-Yu KU, Tien-Yu YI
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Publication number: 20240161998Abstract: A deflecting plate includes a silicon-on-insulator (SOI) substrate. The SOI substrate includes: an insulator layer having a top surface and a bottom surface; a device layer coupled to the insulator layer at the top surface, wherein multiple deflecting apertures are disposed in the device layer, each of which extending from a top open end to a bottom open end through the device layer, and wherein the bottom open end is coplanar with the top surface of the insulator layer; and a handle substrate coupled to the insulator layer at the bottom surface, wherein a cavity is disposed in the handle substrate and extends from a cavity open end to a cavity bottom wall, and wherein the bottom wall is coplanar with the top surface of the insulator layer, such that the bottom open end of each deflecting aperture is exposed to the cavity.Type: ApplicationFiled: September 10, 2023Publication date: May 16, 2024Inventors: Cheng-Hsien Chou, Yung-Lung Lin, Chun Liang Chen, Kuan-Liang Liu, Chin-Yu Ku, Jong-Yuh Chang
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Patent number: 11984419Abstract: Package structures and methods for manufacturing the same are provided. The package structure includes a first bump structure formed over a first substrate. The first bump structure includes a first pillar layer formed over the first substrate and a first barrier layer formed over the first pillar layer. In addition, the first barrier layer has a first protruding portion laterally extending outside a first edge of the first pillar layer. The package structure further includes a second bump structure bonded to the first bump structure through a solder joint. In addition, the second bump structure includes a second pillar layer formed over a second substrate and a second barrier layer formed over the second pillar layer. The first protruding portion of the first barrier layer is spaced apart from the solder joint.Type: GrantFiled: July 26, 2022Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Cheng-Hung Chen, Yu-Nu Hsu, Chun-Chen Liu, Heng-Chi Huang, Chien-Chen Li, Shih-Yen Chen, Cheng-Nan Hsieh, Kuo-Chio Liu, Chen-Shien Chen, Chin-Yu Ku, Te-Hsun Pang, Yuan-Feng Wu, Sen-Chi Chiang