Abstract: A method includes rotating a wafer, dispensing a liquid from a center of the wafer to an edge of the wafer to control a temperature of the wafer, and etching an etch layer of the wafer with an etchant during or after dispensing the liquid. The liquid is dispensed through a nozzle.

Abstract: Embodiment described herein provide a thermal treatment process following a high-pressure anneal process to keep hydrogen at an interface between a channel region and a gate dielectric layer in a field effect transistor while removing hydrogen from the bulk portion of the gate dielectric layer. The thermal treatment process can reduce the amount of threshold voltage shift caused by a high-pressure anneal. The high-pressure anneal and the thermal treatment process may be performed any time after formation of the gate dielectric layer, thus, causing no disruption to the existing process flow.

Abstract: The present disclosure provides a process. In an embodiment, the process includes providing a first blend composed of nonanals, C8 olefins and C7-C9 alkanes. The process includes adding, to the first blend, a component selected from C4 aldehyde, C5 aldehyde, and combinations thereof to form a non-aqueous reaction mixture having an initial water content from 0 wt% to 10 wt % water. The process includes introducing an organic base catalyst to the non-aqueous reaction mixture and heating the non-aqueous reaction mixture to a temperature from 30° C. to 100° C. and cross-aldol condensing the non-aqueous reaction mixture. The process includes forming a cross-aldol product composed of a component selected from C8 enals, C10 enals, C13 enals, C14 enals, and C18 enals, and combinations thereof.

Abstract: A semiconductor device and method of forming the same are provided. The semiconductor device includes at least one substrate and an interconnection structure. The at least one substrate has a cavity partially defined by an inner sidewall of the at least one substrate and a channel disposed at a bottom of the at least one substrate. The channel laterally penetrates through the at least one substrate. The interconnections structure is disposed over the substrate, and the interconnection structure has a through hole penetrating through the interconnection structure. The through hole, the cavity and the channel are in spatial communication with each other.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a magnetic element over the semiconductor substrate. The semiconductor device structure also includes an adhesive element between the magnetic element and the substrate. The adhesive element extends exceeding opposite edges of the magnetic element. The semiconductor device structure further includes an isolation element extending exceeding the opposite edges of the magnetic element. The isolation element partially covers a top surface of the magnetic element. In addition, the semiconductor device structure includes a conductive line over the isolation element.

Abstract: A system, method, and computer readable medium with instructions for verifying an original layout are disclosed. The original layout includes cells arranged in a cell hierarchy, front-end-of-line (FEOL) layers, and back-end-of-line (BEOL) layers. In one embodiment, a reduced layout is generated by trimming out cells below a top tier of the cell hierarchy and filtering out the FEOL layers. A text-based short check is executed on the reduced layout. Next, an augmented reduced layout is generated. The augmented reduced layout includes pin information for cells in a second tier connected to the top tier. An interconnectivity check is then executed on the augmented reduced layout based on a schematic for the circuit. Afterwards, a result (e.g., location of short or connectivity mismatch) based on at least one of the text-based short check and the interconnectivity check is outputted. A conventional LVS check may then be executed.

Abstract: The present disclosure provides a composition. In an embodiment, the composition includes a mixture of an alcohol (1) and an alcohol (2). Alcohol (1) has the Structure (1): alcohol (2) has the Structure (2): wherein a is an integer from 1 to 2, R1 and R2 each independently is selected from the group consisting of hydrogen and an alkyl group, with the proviso that the total number of carbon atoms of R1 and R2 is 7, and R3 is selected from the group consisting of a butyl group, an isobutyl group, a pentyl group, and an isopentyl group.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a magnetic element over the substrate. The semiconductor device structure also includes an isolation layer extending exceeding edges the magnetic element. The isolation layer contains a polymer material. The semiconductor device structure further includes a conductive line over the isolation layer and extending exceeding the edges of the magnetic element.

Abstract: The present disclosure provides a composition. In an embodiment, the composition includes 2-heptylundecanol; a member selected from the group consisting of 2-ethyhexanol and 2-propylheptanol; and a mixture of an alcohol (1) and an alcohol (2), alcohol (1) having the Structure (1) wherein R1 is selected from the group consisting of an ethyl group and a propyl group, R2 and R3 each independently is selected from the group consisting of hydrogen and an alkyl group, with the proviso that the total number of carbon atoms of R1 and R2 is 7, and alcohol (2) having the Structure (2) wherein R4 is selected from the group consisting of an n-propyl group, an isopropyl group, an n-butyl group, and an isobutyl group.

Abstract: The present disclosure provides a process. In an embodiment, the process includes providing a purge stream composed of octene isomers. The process includes subjecting the purge stream to hydroformylation conditions, and forming a reaction product composed of nonanals.

Abstract: Provided are a precursor solution, and a modified layer and a lithium-based battery prepared by using the same. The modified layer is formed on the negative electrode, the positive electrode and/or the separator of the lithium-based battery by using the precursor solution through photo-polymerization reaction or thermal curing. The lithium-based battery comprising the modified layer effectively promotes the charge and discharge capability, cycling life, and safety. The modified layer can be applied to a roll-to-roll process. The formation of lithium dendrites in the lithium-based battery comprising the modified layer is significantly suppressed or reduced during the charge-discharge cycles. The shuttle effect is effectively suppressed or reduced in lithium sulfur batteries and lithium iodine batteries. All the above effects are beneficial to increasing the product value of lithium ion batteries, lithium metal batteries, anode-free lithium batteries, lithium sulfur batteries, and lithium iodine batteries.

Abstract: Some implementations described herein provide a laser device. The laser device includes a first portion of the laser device, at a proximal end of the laser device, that includes one or more optical devices, where the first portion is configured to emit first electromagnetic waves having a first wavelength. The laser device includes a second portion of the laser device, at a distal end of the laser device, that includes an optical crystal configured to receive the first electromagnetic waves and to emit second electromagnetic waves having a second wavelength based on reception of the first electromagnetic waves, where the optical crystal includes a thin film coating disposed on an end of the optical crystal, the thin film coating configured to: support emission of the second electromagnetic waves from the optical crystal, and support internal reflection of the first electromagnetic waves within the optical crystal.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first conductive line over a substrate. The semiconductor device structure includes a first protection cap over the end portion. The first protection cap and the first conductive line are made of different conductive materials, and the first protection cap exposes a peripheral region of a top surface of the end portion. The semiconductor device structure includes a first photosensitive dielectric layer over the substrate, the first conductive line, and the first protection cap. The semiconductor device structure includes a conductive via structure passing through the first photosensitive dielectric layer and connected to the first protection cap.

Abstract: A method for route selection policy (URSP) rule matching enhancement in EPS is proposed. When an application is executed, the upper layer of a UE sends the application information to URSP entity for matching a URSP rule. The UE selects and evaluates a route selection descriptor (RSD) from a list of RSDs of a selected URSP rule to be matched with a PDN connection. If there is a “PDU session pair ID type” and/or “RSN type” route selection descriptor components in an RSD, such RSD components are intended for a redundant PDU session, which is not supported in EPS. Therefore, the UE ignores the specific RSD components and continues to evaluate the RSD with the remaining RSD components.

Abstract: An image sensor device includes a semiconductor device, a plurality of photo sensitive regions, a dielectric layer, a grid structure, and a plurality of convex dielectric lenses. The photo sensitive regions are in the semiconductor substrate. The dielectric layer is over a backside surface of the semiconductor substrate. The grid structure is over a backside surface of the dielectric layer. The grid structure includes a plurality of grid lines. Each of the grid lines comprises a lower portion and an upper portion forming an interface with the lower portion. The convex dielectric lenses are alternately arranged with the grid lines over the backside surface of the dielectric layer. Apexes of the plurality of convex dielectric lenses are higher than an interface between the upper portion and the lower portion of each of the grid lines.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a magnetic element over the semiconductor substrate. The semiconductor device structure also includes an isolation layer covering the magnetic element and a portion of the semiconductor substrate. The isolation layer contains a polymer material. The semiconductor device structure further includes a conductive line over the isolation layer and extending exceeding edges of the magnetic element.

Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.

Abstract: A method includes forming a first dielectric layer over a conductive pad, forming a second dielectric layer over the first dielectric layer, and etching the second dielectric layer to form a first opening, with a top surface of the first dielectric layer exposed to the first opening. A template layer is formed to fill the first opening. A second opening is then formed in the template layer and the first dielectric layer, with a top surface of the conductive pad exposed to the second opening. A conductive pillar is formed in the second opening.

Abstract: A method for UE route selection policy (URSP) rule matching enhancement is proposed. When an application is executed, the upper layer of a UE sends the application information to URSP entity for matching a URSP rule. The UE finds an RSD of the matching URSP rule, and the UE tries to reuse an existing PDU session, e.g., the association of the application with the existing PDU session have certain exceptions. In one example, regarding DNN, S-NSSAI, SSC mode, and PDU session type, the above listed parameters in the RSD can either match with stored PDU session parameters of the existing PDU session or match with PDU session parameters requested by the UE during the PDU session establishment procedure.

Abstract: A method of implementing autonomous emergency braking (AEB) for advanced driver-assistance systems (ADAS), the method includes receiving one or more first inputs and identifying one or more targets external to a host vehicle based on the one or more first inputs. The method further includes receiving one or more second inputs related to a turning status of the host vehicle and detecting a U-turn state associated with the host vehicle based on the one or more second inputs. The AEB algorithm may be modified in response to the detected U-turn state, wherein the AEB algorithm initiates an AEB event as necessary to avoid collisions with the one or more identified targets.