Patents by Inventor Yu Lei

Yu Lei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240116196
    Abstract: The present disclosure provides a collaborative robot arm and a joint module. The joint module includes a housing, a driving assembly, and a multi-turn absolute encoder. The joint module detects the angular position of the output shaft and records a number of rotating revolutions of the output shaft only by means of the multi-turn absolute encoder. The multi-turn absolute encoder includes a base, a bearing, a rotating shaft, an encoding disk, and a circuit board, the encoding disk is rotatably connected with the base by the rotating shaft and the bearing, the circuit board is fixedly connected with the base, and the reading head on the circuit board detects the angular position of the output shaft cooperatively with the encoding disk, making the multi-turn absolute encoder be an integrated structure. The base and the rotating shaft are detachably connected with the housing and the output shaft respectively.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 11, 2024
    Inventors: Zhongbin Wang, Yu Jiang, Yingbo Lei, Weizhi Ye, Lun Wang, Ming Zhang
  • Publication number: 20240116194
    Abstract: An integrated joint module includes a housing, a driving assembly, a speed reduction assembly, a braking assembly and an encoding assembly. The housing includes a first housing and a second housing, an annular supporting platform is arranged on an inner side of the first housing. The driving assembly includes an output shaft, a stator embedded in the annular supporting platform, and a rotor connected with the output shaft and arranged on an inner side of the stator, the speed reduction assembly and the braking assembly are connected with two ends of the output shaft. The encoding assembly is arranged on a side of the braking assembly away from the driving assembly and connected with the output shaft, the second housing is sleeved on the encoding assembly and connected with the first housing. The integrated joint module helps to simplify the structure of the joint module and reduce the cost.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 11, 2024
    Inventors: ZHONGBIN WANG, Yu Jiang, Yingbo Lei, Weizhi Ye, Lun Wang, Ming Zhang
  • Publication number: 20240121797
    Abstract: The present application relates to a method and an apparatus for monitoring DCI. The method includes: receiving a DCI from a BS, wherein the DCI includes an indicator; determining one or more sensing beams used by the BS to perform a LBT procedure according to the indicator and a higher layer signaling; and determining one or more transmission beams used by the BS to transmit PDCCH according to the indicator and the higher layer signaling, wherein the one or more transmission beams are within a spatial region of a CO initiated by the BS after completing the directional LBT with the one or more sensing beams.
    Type: Application
    Filed: March 11, 2021
    Publication date: April 11, 2024
    Applicant: Lenovo (Beijing) Limited
    Inventors: Yu Zhang, Haipeng Lei
  • Patent number: 11955319
    Abstract: Provided is a processing chamber configured to contain a semiconductor substrate in a processing region of the chamber. The processing chamber includes a remote plasma unit and a direct plasma unit, wherein one of the remote plasma unit or the direct plasma unit generates a remote plasma and the other of the remote plasma unit or the direct plasma unit generates a direct plasma. The combination of a remote plasma unit and a direct plasma unit is used to remove, etch, clean, or treat residue on a substrate from previous processing and/or from native oxide formation. The combination of a remote plasma unit and direct plasma unit is used to deposit thin films on a substrate.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: April 9, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Kazuya Daito, Yi Xu, Yu Lei, Takashi Kuratomi, Jallepally Ravi, Pingyan Lei, Dien-Yeh Wu
  • Patent number: 11955381
    Abstract: Methods for pre-cleaning substrates having metal and dielectric surfaces are described. A temperature of a pedestal comprising a cooling feature on which a substrate is located is set to less than or equal to 100° C. The substrate is exposed to a plasma treatment to remove chemical residual and/or impurities from features of the substrate including a metal bottom, dielectric sidewalls, and/or a field of dielectric and/or repair surface defects in the dielectric sidewalls and/or the field of the dielectric. The plasma treatment may be an oxygen plasma, for example, a direct oxygen plasma. Processing tools and computer readable media for practicing the method are also described.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: April 9, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Yi Xu, Yufei Hu, Kazuya Daito, Geraldine M. Vasquez, Da He, Jallepally Ravi, Yu Lei, Dien-Yeh Wu
  • Publication number: 20240113032
    Abstract: Interconnect structure packages (e.g., through silicon vias (TSV) packages, through interlayer via (TIV) packages) may be pre-manufactured as opposed to forming TIVs directly on a carrier substrate during a manufacturing process for a semiconductor die package at backend packaging facility. The interconnect structure packages may be placed onto a carrier substrate during manufacturing of a semiconductor device package, and a semiconductor die package may be placed on the carrier substrate adjacent to the interconnect structure packages. A molding compound layer may be formed around and in between the interconnect structure packages and the semiconductor die package.
    Type: Application
    Filed: April 25, 2023
    Publication date: April 4, 2024
    Inventors: Kai-Fung CHANG, Chin-Wei LIANG, Sheng-Feng WENG, Ming-Yu YEN, Cheyu LIU, Hung-Chih CHEN, Yi-Yang LEI, Ching-Hua HSIEH
  • Patent number: 11948836
    Abstract: Apparatuses and methods to provide electronic devices having metal films are provided. Some embodiments of the disclosure utilize a metallic tungsten layer as a liner that is filled with a metal film comprising cobalt. The metallic tungsten layer has good adhesion to the cobalt leading to enhanced cobalt gap-fill performance.
    Type: Grant
    Filed: October 11, 2021
    Date of Patent: April 2, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Yu Lei, Sang-Hyeob Lee, Chris Pabelico, Yi Xu, Tae Hong Ha, Xianmin Tang, Jin Hee Park
  • Publication number: 20240088071
    Abstract: Methods for reducing resistivity of metal gapfill include depositing a conformal layer in an opening of a feature and on a field of a substrate with a first thickness of the conformal layer of approximately 10 microns or less, depositing a non-conformal metal layer directly on the conformal layer at a bottom of the opening and directly on the field using an anisotropic deposition process. A second thickness of the non-conformal metal layer on the field and on the bottom of the feature is approximately 30 microns or greater. And depositing a metal gapfill material in the opening of the feature and on the field where the metal gapfill material completely fills the opening without any voids.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: Yi XU, Yu LEI, Zhimin QI, Aixi ZHANG, Xianyuan ZHAO, Wei LEI, Xingyao GAO, Shirish A. PETHE, Tao HUANG, Xiang CHANG, Patrick Po-Chun LI, Geraldine VASQUEZ, Dien-yeh WU, Rongjun WANG
  • Publication number: 20240087955
    Abstract: A method and apparatus for forming tungsten features in semiconductor devices is provided. The method includes exposing a top opening of a feature formed in a substrate to a physical vapor deposition (PVD) process to deposit a tungsten liner layer within the feature. The PVD process is performed in a first processing region of a first processing chamber and the tungsten liner layer forms an overhang portion, which partially obstructs the top opening of the feature. The substrate is transferred from the first processing region of the first processing chamber to a second processing region of a second processing chamber without breaking vacuum. The overhang portion is exposed to nitrogen-containing radicals in the second processing region to inhibit subsequent growth of tungsten along the overhang portion. The feature is exposed to a tungsten-containing precursor gas to form a tungsten fill layer over the tungsten liner layer within the feature.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 14, 2024
    Inventors: Yi XU, Xianyuan ZHAO, Zhimin QI, Aixi ZHANG, Geraldine VASQUEZ, Dien-Yeh WU, Wei LEI, Xingyao GAO, Shirish PETHE, Wenting HOU, Chao DU, Tsung-Han YANG, Kyoung-Ho BU, Chen-Han LIN, Jallepally RAVI, Yu LEI, Rongjun WANG, Xianmin TANG
  • Patent number: 11929691
    Abstract: A triboelectric generator can include respective contact members including a first contact member and second contact member. The respective contact members can be movable with respect to each other such that the respective contact members separate from each other in a first configuration and contact each other in a second configuration. The first contact member can include a first conductive layer and a contact layer. The second contact member can be spaced apart from the first contact member in the first configuration and can include an insulating contact layer and a second conductive layer. The insulating contact layer can be configured to come into contact with the contact layer of the first contact member and the transition of the respective contact members from the first configuration to the second configuration can create triboelectric charges. In some examples, the first contact member can include a non-contact insulating layer.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: March 12, 2024
    Assignee: The Board of Trustees of The University of Alabama, for and on behalf of the University of Alabama in Huntsville
    Inventors: Gang Wang, Yu Lei, Moonhyung Jang, Jacob Lee
  • Patent number: 11923429
    Abstract: A semiconductor device and method for forming the semiconductor device are provided. In some embodiments, a semiconductor substrate comprises a device region. An isolation structure extends laterally in a closed path to demarcate the device region. A first source/drain region and a second source/drain region are in the device region and laterally spaced. A sidewall of the first source/drain region directly contacts the isolation structure at a first isolation structure sidewall, and remaining sidewalls of the first source/drain region are spaced from the isolation structure. A selectively-conductive channel is in the device region, and extends laterally from the first source/drain region to the second source/drain region. A plate comprises a central portion and a first peripheral portion. The central portion overlies the selectively-conductive channel, and the first peripheral portion protrudes from the central portion towards the first isolation structure sidewall.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang
  • Publication number: 20240044893
    Abstract: A method for detecting a target molecule in a sample includes providing a capture species immobilized on a fixed surface; exposing the immobilized capture species to the sample to bind the target molecule; exposing the bound target molecule to a reporter complex to bind the reporter complex to the bound target molecule; and imaging the fixed surface to count the number of the reporter complexes or the number of an imageable product derived from each reporter complex. In an aspect, the signal of the bound target molecule can be amplified to provide an amplified signal that is then exposed to the reporter complex.
    Type: Application
    Filed: July 12, 2023
    Publication date: February 8, 2024
    Inventors: Yu Lei, Haomin Liu, Yikun Huang
  • Publication number: 20240018273
    Abstract: Provided are compositions that include at least one two-dimensional layer of an inorganic compound and at least one layer of an organic compound in the form of one or more polypeptides. Methods of making and using the materials are provided. The organic layer contains one or more polypeptides, each of which have alternating repeats of crystallite-forming subsequences and amorphous subsequences. The crystallite-forming subsequences form crystallites comprising stacks of one or more ?-sheets. The amorphous subsequences form a network of hydrogen bonds. A method includes i) combining one or more polypeptides with an inorganic material and an organic solvent, and ii) depositing one or more polypeptides, the inorganic material and the organic solvent onto a substrate. These steps can be repeated to provide a composite material that is a multilayer composite material. The composite materials can be used in a wide array of textile, electronic, semi-conducting, and other applications.
    Type: Application
    Filed: July 5, 2023
    Publication date: January 18, 2024
    Inventors: Melik DEMIREL, Mert VURAL, Mauricio TERRONES, Yu LEI, Ibrahim Tarik OZBOLAT
  • Publication number: 20240018648
    Abstract: Embodiments of a purge ring for use in a process chamber are provided herein. In some embodiments, a purge ring includes: an annular body having an inner portion and an outer portion, wherein the inner portion includes an inner surface of the annular body, the inner surface comprising a first inner sidewall, a second inner sidewall, and a third inner sidewall, wherein the inner portion has an upper inner notch that defines the first inner sidewall and a lower inner notch that defines the second inner sidewall, wherein a third inner sidewall is disposed between the first inner sidewall and the second inner sidewall, and wherein the first inner sidewall and the second inner sidewall are disposed radially outward of the third inner sidewall.
    Type: Application
    Filed: July 11, 2023
    Publication date: January 18, 2024
    Inventors: Geraldine VASQUEZ, Yi XU, Dien-yeh WU, Aixi ZHANG, Jallepally RAVI, Yu LEI
  • Publication number: 20240014072
    Abstract: A method of forming a semiconductor device structure includes forming a nucleation layer within at least one feature. The method includes exposing the nucleation layer to a nitrogen plasma treatment. The nitrogen plasma treatment preferentially treats the top field and sidewalls while leaving the bottom surface substantially untreated to encourage bottom up metal growth.
    Type: Application
    Filed: June 21, 2023
    Publication date: January 11, 2024
    Inventors: Tsung-Han YANG, Zhimin QI, Yongqian GAO, Rongjun WANG, Yi XU, Yu LEI, Xingyao GAO, Chih-Hsun HSU, Xi CEN, Wei LEI, Shiyu YUE, Aixi ZHANG, Kai WU, Xianmin TANG
  • Publication number: 20240006236
    Abstract: A method of forming a structure on a substrate includes forming a tungsten nucleation layer within at least one feature. The method includes forming the nucleation layer via a cyclic vapor deposition process. The cyclic vapor deposition process includes forming a portion of the nucleation layer and then exposing the exposing the nucleation layer a chemical vapor transport (CVT) process to remove impurities from the portion of the nucleation layer. The CVT process may be performed at a temperature of 400 degrees Celsius or less and comprises forming a plasma from a processing gas comprising greater than or equal to 90% of hydrogen gas of a total flow of hydrogen gas and oxygen.
    Type: Application
    Filed: April 11, 2023
    Publication date: January 4, 2024
    Inventors: Tsung-Han YANG, Junyeong YUN, Rongjun WANG, Yi XU, Yu LEI, Wenting HOU, Xianmin TANG
  • Publication number: 20230420295
    Abstract: A method and apparatus for tungsten gap-fill in semiconductor devices are provided. The method includes performing a gradient oxidation process to oxidize exposed portions of a liner layer, wherein the gradient oxidation process preferentially oxidizes an overhang portion of the liner layer, which obstructs or blocks top openings of one or more features formed within a field region of a substrate. The method further includes performing an etchback process to remove or reduce the oxidized overhang portion of the liner layer, exposing the liner layer to a chemical vapor transport (CVT) process to remove metal oxide remaining from the gradient oxidation process and the etchback process, and performing a tungsten gap-fill process to fill or partially fill the one or more features.
    Type: Application
    Filed: April 11, 2023
    Publication date: December 28, 2023
    Inventors: Tsung-Han YANG, Xingyao GAO, Shiyu YUE, Chih-Hsun HSU, Shirish PETHE, Rongjun WANG, Yi XU, Wei LEI, Yu LEI, Aixi ZHANG, Xianyuan ZHAO, Zhimin QI, Jiang LU, Xianmin TANG
  • Publication number: 20230343643
    Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.
    Type: Application
    Filed: July 19, 2022
    Publication date: October 26, 2023
    Inventors: Chih-Hsun HSU, Shiyu YUE, Wei LEI, Yi XU, Jiang LU, Yu LEI, Ziye XIONG, Tsung-Han YANG, Zhimin QI, Aixi ZHANG, Jie ZHANG, Liqi WU, Rongjun WANG, Shihchung CHEN, Meng-Shan WU, Chun-Chieh WANG, Annamalai LAKSHMANAN, Yixiong YANG, Xianmin TANG
  • Publication number: 20230343644
    Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed in a first process chamber to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process is performed in the first process chamber removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.
    Type: Application
    Filed: November 28, 2022
    Publication date: October 26, 2023
    Inventors: Chih-Hsun HSU, Shiyu YUE, Jiang LU, Rongjun WANG, Xianmin TANG, Zhenjiang CUI, Chi Hong CHING, Meng-Shan WU, Chun-chieh WANG, Wei LEI, Yu LEI
  • Publication number: 20230327090
    Abstract: The present disclosure relates to positive-electrode pre-lithiation agents. One example positive-electrode pre-lithiation agent includes a catalyst and a lithium-rich material, where the catalyst is an oxide positive-electrode active material, an intensity ratio of a crystal plane diffraction peak of the catalyst to a crystal plane diffraction peak of the catalyst is less than or equal to 2, the catalyst is configured to catalyze the lithium-rich material to decompose to release active lithium, and the lithium-rich material includes at least one of lithium oxide, lithium peroxide, lithium fluoride, lithium carbonate, lithium oxalate, or lithium acetate.
    Type: Application
    Filed: May 23, 2023
    Publication date: October 12, 2023
    Inventors: Shuoyu LI, Shengan XIA, Yu LEI, Yujing SHA