Abstract: A memory device includes a first word line and a second word line. The first word line is configured to transmit a first word line signal to a first set of memory cells. A first portion of the first word line is formed in a first metal layer, and a second portion of the first word line is formed in a second metal layer above the first metal layer. The second word line is configured to transmit a second word line signal to a second set of memory cells. A first portion of the second word line is formed in the first metal layer. A second portion of the second word line is formed in the second metal layer. The second portion of the first word line is partially overlapped with the second portion of the second word line.

Abstract: A mold assembly for assembling a touch module in a housing is provided. The touch module comprises a carrier, a circuit board, and a touch film. The housing has an opening corresponding to the touch module, and there has a plurality of positioning elements and a plurality of securing elements around the opening. The mold assembly comprises a base, a first frame, and a second frame. The base has an upper surface with a concave corresponding to the carrier. The first frame is for detachably disposed on the first surface and has a first opening correspond to the circuit board. The second frame is for detachably disposed on the first surface and has a second opening corresponding to the touch film. An assembling method using the mold assembly is also provided.

Abstract: A color filter module is provided. The color filter module is arranged on a display panel. The color filter module includes a transparent substrate and a color resist layer. The transparent substrate includes multiple sub-pixel regions arranged in an array. The color resist layer is arranged on the transparent substrate. The color resist layer includes multiple color resist units. The color resist units are respectively arranged across at least two sub-pixel regions, and the color resist units form a staggered array on the transparent substrate.

Abstract: A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.

Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.

Abstract: A mold assembly for assembling a touch module in a housing is provided. The touch module comprises a carrier, a circuit board, and a touch film. The housing has an opening corresponding to the touch module, and there has a plurality of positioning elements and a plurality of securing elements around the opening. The mold assembly comprises a base, a first frame, and a second frame. The base has an upper surface with a concave corresponding to the carrier. The first frame is for detachably disposed on the first surface and has a first opening correspond to the circuit board. The second frame is for detachably disposed on the first surface and has a second opening corresponding to the touch film. An assembling method using the mold assembly is also provided.

Abstract: In an aspect of the disclosure, a method for detecting outlier integrated circuits on a wafer is provided. The method comprises: operating multiple test items for each IC on the wafer to generate measured values of the multiple test items for each IC; selecting a target IC and neighboring ICs on the wafer repeatedly. each time after selecting the target IC executes the following steps: selecting a measured value of the target IC as a target measured value and selecting measured values of the target IC and the neighboring ICs as feature values of the target IC and the neighboring ICs; executing a transformer deep learning model to generate a predicted value of the target measured value; and identifying outlier ICs according to the predicted values of all the target ICs and the corresponding target measured values of all the target ICs.

Abstract: An in-memory computing (IMC) memory device comprises a plurality of computing memory cells and a plurality of balance computing memory cells forming a plurality of memory strings. In programming, a first resistance state number of the balance computing memory cells is determined based on a first resistance state number of the computing memory cells of the memory string. In IMC operations, when a read voltage is applied to the computing memory cells, the computing memory cells generate a plurality of cell currents which are summed into a plurality of memory string currents; the memory string currents charge a loading capacitor; a capacitor voltage of the loading capacitor is measured; and based a relationship between the capacitor voltage of the loading capacitor, at least one delay time and a predetermined voltage, an operation result of the input values and the weight values is determined.

Abstract: An adaptive minimum voltage aging margin prediction method includes acquiring characteristic data of a plurality of dies in a testing line, predicting a wear-out failure rate of each module of the plurality of dies according to the characteristic data by using a neural network, and predicting a minimum voltage aging margin of the each module according to the wear-out failure rate of the each module by using the neural network.

Abstract: In an embodiment of the techniques presented herein, a charging system includes an input port, a wireless charging unit, having a magnetic charging interface, and a wireless charging controller configured to generate a magnetic charging signal at the magnetic charging interface based on a first connection state of the magnetic charging interface, and a universal serial bus power delivery (USB-PD) power adaptor, having an output port, and a USB-PD controller configured to deliver power to the output port, wherein a first portion of available power at the input port is allocated to the wireless charging unit for generating the magnetic charging signal responsive to the first connection state indicating a connected device, and a second portion of the available power at the input port is allocated to the USB-PD adaptor based on the first portion allocated to the wireless charging unit.

Abstract: Embodiments of present disclosure relates to forming isolation structures in gate structures to prevent current leakage through source/drain regions (EPI), transistors, and silicon substrate. The isolation structures are arranged in a pattern with a long isolation structure adjacent a short isolation structure. The isolation structures may be formed in the gate structure prior to or after the replacement gate sequence.

Abstract: The present application provides a method for predicting energy consumption and an electronic device. The electronic device obtains energy efficiency data of a target device within a preset time period, and determines a plurality of influencing factors from the energy efficiency data according to a preset energy efficiency indicator and a feature extraction algorithm. The electronic device further determines a regression prediction model according to the plurality of influencing factors and the preset energy efficiency indicator, inputs the plurality of influencing factors into the regression prediction model and generates a first prediction value at each moment within the preset time period, and generates a trend graph of energy consumption corresponding to the preset time period according to a first predicted value at each moment. The present application is able to improve an efficiency of predicting energy consumption.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The method can include forming a fin structure over a substrate. The fin structure can include a channel layer and a sacrificial layer. The method can further include forming a first recess structure in a first portion of the fin structure, forming a second recess structure in the sacrificial layer of a second portion of the fin structure, forming a dielectric layer in the first and second recess structures, and performing an oxygen-free cyclic etching process to etch the dielectric layer to expose the channel layer of the second portion of the fin structure. The oxygen-free cyclic etching process can include two etching processes to selectively etch the dielectric layer over the channel layer.

Abstract: This disclosure discloses a multiplayer somatosensory system, method, and apparatus combining virtual and reality, and a medium, which belongs to the field of human-computer interaction. The system includes: a computer device, and a simulation carrier, n simulation firearms and a display apparatus; where the simulation carrier includes a driver's seat and n passenger seats; the display apparatus is configured to display a virtual environment picture and n aiming points provided by the computer device; and the computer device is configured to control a virtual carrier to change a driving direction in the virtual environment; control the virtual carrier to change a driving speed in the virtual environment; and shoot a virtual object aimed at an ith aiming point in the virtual environment in response to a shooting operation on an ith simulation firearm in the n simulation firearms.

Abstract: A hinge includes a seat, a shaft, a swivel bracket and at least one limiting bar. The seat includes two support portions. An accommodation area is defined between the two support portions. The two support portions are respectively provided with a shaft hole. The two shaft holes are arranged coaxially and connected to the accommodation area. The shaft includes a coupling section and two pivoting sections. The coupling section is located between the two pivoting sections. The two pivoting sections are respectively provided in one of the two shaft holes in a rotatable manner, and the coupling section is in the accommodation area. The swivel bracket includes a mounting plate, a sleeve piece and at least one extension portion. The mounting plate includes an inner surface, an outer surface, and a bottom edge. The sleeve piece extends from the bottom edge of the mounting plate and is wound at a side corresponding to the inner surface.

Abstract: The present invention relates to a pharmaceutical composition comprising at least one liposome and an antipsychotic drug with a high drug to lipid ratio and encapsulation efficiency. The pharmaceutical composition improves the pharmacokinetic profile and sustains the release of the antipsychotic drug. Also provided is the method for treating schizophrenia or bipolar disorder using the pharmaceutical composition disclosed herein.

Abstract: The invention provides a syringe for detecting pressure change. The syringe includes a barrel defining a reservoir for receiving a constituent, a piston movable within the reservoir and a plunger. The barrel further includes a proximal end and a distal end with an outlet, an engaging member with a pair of fingers formed on an outer periphery of the barrel and a rib extending from the outer periphery of the barrel and disposed proximally to the engaging member. The plunger includes a first plunger part, a second plunger part and a baseplate supporting the first and second plunger parts. The first plunger part is partially received by the reservoir and slidably engaged with the piston. The second plunger part further includes at least one stop ledge to which the fingers of the engaging member releasably latch, and the stop ledge formed on a periphery of the second plunger part, and a compartment for accommodating a first biasing member with first and second ends.

Abstract: Disclosed are a heat-electricity discrete power module with two-way heat-dissipation ceramic substrates and a manufacturing method of the same, including: two double-sided metal-clad ceramic substrates, a power transistor die, and an insulation sealant; each double-sided metal-clad ceramic substrate including a ceramic insulation layer, a three-dimensional conductive layer formed on the first ceramic insulation layer and facing the opposite three-dimensional conductive layer to constitute an electrical circuit, and a thermally-conductive metallic layer opposite and insulated from the three-dimensional conductive layer, respectively; electrodes of each power transistor die are electrically conductively connected to the three-dimensional conductive layer, and their upper and lower surfaces are thermally conductively connected to respective three-dimensional conductive layers; circuit components are additionally mounted on the three-dimensional conductive layers; at least one conductive post is formed between th

Abstract: A semiconductor substrate processing method includes: providing a substrate to be processed, where the substrate to be processed has a side to be processed and a bonding side which are opposite to each other; providing a hole supply substrate; and bonding the hole supply substrate to the bonding side of the substrate to be processed by a wafer bonding process so as to obtain a substrate pair, and performing a material process. By the semiconductor substrate processing method, the purpose of rapid electrochemical etching can be achieved.

Abstract: Systems and methods for enabling real-time graph machine learning models using bitwise transaction graph frameworks are disclosed. According to one embodiment, a method may include: (1) receiving, by a bitwise transaction graph computer program, a plurality of historical transactions, wherein each historical transaction comprises a customer identifier for a customer, a card number or card reference number, a merchant identifier for a merchant, a transaction authorization time, a transaction risk score, and a set of real-time fraud risk attributes; (2) converting, by the bitwise transaction graph computer program, the historical transactions to a fixed length data structure; and (3) loading, by the bitwise transaction graph computer program, the fixed length data structure onto edges of a transaction graph, wherein each vertex of the transaction graph represents one of the customers or one of the merchants.