Patents by Inventor Yu Ling

Yu Ling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240341496
    Abstract: A chair assembly is provided. The chair assembly includes locking members arranged at a joint between a chair chassis and a seat back support and joints between the chair chassis and two armrests correspondingly. An assembly block of the locking member is formed on the chair chassis while an assembly groove of the locking member is formed in both the seat back support and the respective armrests for being fit on the assembly block of the chair chassis correspondingly. Now a tenon disposed on the assembly block is capable of being engaged with a locking hole arranged at the assembly groove. A positioning part elastically abuts against the opposite side walls of the assembly groove. Thereby assembly of the chair chassis with both the seat back support and the armrests is finished easily and quickly. The chair assembly is more comfortable and safe for users sitting thereon.
    Type: Application
    Filed: April 11, 2023
    Publication date: October 17, 2024
    Inventors: YU-LING WU, MARTIN POTRYKUS, ARMIN ROLAND SANDER
  • Patent number: 12120884
    Abstract: A method of manufacturing a memory cell includes the following steps. A channel material is formed to contact a source line and a bit line. A ferroelectric (FE) material is formed to contact the channel material. A word line is formed to contact the FE material. The FE material is disposed between the channel material and the word line. The word line includes a bulk layer. The bulk layer includes a first metal layer and a second metal layer. The second metal layer is sandwiched between the first metal layer and the FE material.
    Type: Grant
    Filed: September 21, 2023
    Date of Patent: October 15, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Yu Ling, Katherine H. Chiang, Chung-Te Lin
  • Publication number: 20240339564
    Abstract: A semiconductor device includes a semiconductor stack; a substrate formed on the semiconductor stack, including a lower surface connected to the semiconductor stack, an upper surface opposite to the lower surface, and a side surface between the lower surface and the upper surface, wherein the side surface includes a mirror area, a first scribing area, and a first crack area, the mirror area is closer to the lower surface than the first scribing area to the lower surface, and the first scribing area is located between the mirror area and the first crack area; an optical structure on the upper surface of the substrate; and a reflective structure on a side surface of the first scribing area and the first crack area, wherein the first scribing area is arranged below the upper surface of the substrate with a distance less than or equal to ΒΌ of a thickness of the substrate.
    Type: Application
    Filed: April 3, 2024
    Publication date: October 10, 2024
    Inventors: Wei-Che WU, Chih-Hao CHEN, Yu-Ling LIN, Chao-Hsing CHEN, Yong-Yang CHEN
  • Patent number: 12109587
    Abstract: A polymer plastic front plate comprises: a plastic substrate and a hard coating layer formed on an adhesion surface of the plastic substrate. The hard coating layer comprises: organic-inorganic hybrid UV oligomer, high Tg UV resin additive, a plurality of dispersed flaky nano inorganic material, and photo initiator, so as to form a gas barrier hard coating layer with high surface dyne value (>44 dyne) on the adhesion surface of the plastic substrate. It not only has good ink printability and OCA adhesiveness, but also inhibits the diffusion of fugitive gas from polymer plastic front plates during high-temperature, high-temperature and high-humidity, high-low temperature thermal shocks and other harsh automotive industry environmental tests. The gas can be avoided from entering the OCA layer, thereby solving the problems of bubbles and delamination after the environmental tests are performed.
    Type: Grant
    Filed: October 17, 2023
    Date of Patent: October 8, 2024
    Assignee: ENFLEX CORPORATION
    Inventors: Hsin Yuan Chen, Chun Kai Wang, Yu Ling Chien
  • Publication number: 20240328247
    Abstract: A window shade comprises a shade assembly that includes a roller connected to a shade structure, and has a first end coupled to a first bracket and a second end having a coupler, the roller being pivotally connected to the first bracket. The first bracket is provided with a roller lock movable between a locking position where the roller lock rotationally locks the roller to prevent rotation of the roller relative to the first bracket, and an unlocking position where the roller lock rotationally unlocks the roller for rotation of the roller relative to the first bracket. Moreover, the window shade includes a connector and a second bracket attachable to a support surface of a building, wherein the first bracket and the coupler are respectively connected to the connector and the second bracket when the shade assembly is mounted to the support surface of the building.
    Type: Application
    Filed: March 22, 2024
    Publication date: October 3, 2024
    Applicant: Teh Yor Co., Ltd.
    Inventors: Chin-Tien HUANG, Yu-Ling LIU
  • Publication number: 20240329100
    Abstract: A current detection method adapted to an inverter is provided, which includes: determining that a plurality of lower arms of an inverter have a minimum conduction period when all the lower arms are turned on simultaneously; determining a sampling time point according to the minimum conduction period, wherein a period from a starting point of the minimum conduction period to the sampling time point is defined as a sampling period that is close to the minimum conduction period; simultaneously detecting currents flowing through the lower arms by a plurality of detection resistors to generate a plurality of measurement voltages; and determining the currents of the inverter according to the measurement voltages.
    Type: Application
    Filed: March 11, 2024
    Publication date: October 3, 2024
    Inventors: Yu-Ling LEE, Ching-Chang CHEN, Shih-Hao HUANG, Zhi-Xiang LIU, Yu-Shian LIN
  • Publication number: 20240321010
    Abstract: The embodiments of the disclosure provide a method for hand tracking. The method includes: obtaining, through a head-mounted device, a first image of a hand; determining, through the processor, a first pose of a first part of the hand based on the first image; obtaining, through a hand-held device, a second image of the hand; determining, through the processor, a second pose of a second part of the hand based on the second image, wherein the first part and the second part complementarily form an entirety of the hand; and determining, through the processor, a gesture of the hand based on the first pose and the second pose.
    Type: Application
    Filed: March 11, 2024
    Publication date: September 26, 2024
    Applicant: HTC Corporation
    Inventors: Chang-Hua Wei, Yu-Ling Huang
  • Patent number: 12101931
    Abstract: Various embodiments of the present application are directed towards an integrated memory chip comprising a memory array with a strap-cell architecture that reduces the number of distinct strap-cell types and that reduces strap-line density. In some embodiments, the memory array is limited to three distinct types of strap cells: a source line/erase gate (SLEG) strap cell; a control gate/word line (CGWL) strap cell; and a word-line strap cell. The small number of distinct strap-cell types simplifies design of the memory array and further simplifies design of a corresponding interconnect structure. Further, in some embodiments, the three distinct strap-cell types electrically couple word lines, erase gates, and control gates to corresponding strap lines in different metallization layers of an interconnect structure. By spreading the strap lines amongst different metallization layers, strap-line density is reduced.
    Type: Grant
    Filed: July 19, 2023
    Date of Patent: September 24, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Tuo Huang, Ping-Cheng Li, Hung-Ling Shih, Po-Wei Liu, Yu-Ling Hsu, Yong-Shiuan Tsair, Chia-Sheng Lin, Shih Kuang Yang
  • Publication number: 20240307471
    Abstract: A method against coronavirus infection includes administering to a subject in need thereof a pharmaceutical composition containing a water-extracted product of Melastoma malabathricum root.
    Type: Application
    Filed: September 11, 2023
    Publication date: September 19, 2024
    Inventors: Pei-Wen Hsieh, Tsong-Long Hwang, Yu-Ling Huang
  • Patent number: 12093442
    Abstract: A handheld controller is adapted to control an electronic device. The handheld controller includes a first body, a second body, and a connecting portion. The first body is adapted to be held by a user's hand. The second body is connected to the first body through the connecting portion. The connecting portion is adapted to be clamped between user's fingers. A distance between the first body and at least a portion of the second body is variable.
    Type: Grant
    Filed: February 24, 2023
    Date of Patent: September 17, 2024
    Assignee: HTC Corporation
    Inventors: Chang-Hua Wei, Yu-Ling Huang
  • Publication number: 20240296890
    Abstract: A memory device and method of making the same are disclosed. The memory device includes transistor devices located in both a memory region and a logic region of the device. Transistor devices in the memory region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, a second oxide layer over the first nitride layer, and a second nitride layer over the second oxide layer. Transistor devices in the logic region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, and a second nitride layer over the first nitride layer.
    Type: Application
    Filed: May 13, 2024
    Publication date: September 5, 2024
    Inventors: Chen-Ming Huang, Wen-Tuo Huang, Yu-Hsiang Yang, Yu-Ling Hsu, Wei-Lin Chang, Chia-Sheng Lin, ShihKuang Yang, Yu-Chun Chang, Hung-Ling Shih, Po-Wei Liu, Shih-Hsien Chen
  • Publication number: 20240297207
    Abstract: A light-emitting device, includes a substrate; a semiconductor stack formed on the substrate; a first current blocking patterned structure and a second current blocking patterned structure formed on the semiconductor stack and separated from each other; and a plurality of electrodes formed on the semiconductor stack and electrically connected to the semiconductor stack; wherein the first current blocking patterned structure is overlapped with one of the plurality of electrodes and the second current blocking patterned structure is not overlapped with the plurality of electrodes.
    Type: Application
    Filed: May 9, 2024
    Publication date: September 5, 2024
    Inventors: Hsin Ying WANG, Tzung Shiun YEH, Yu Ling LIN, Bo Jiun HU
  • Publication number: 20240282798
    Abstract: A backside illuminated image sensor structure including a pixel structure is provided. The pixel structure includes a substrate, a light sensing device, and at least one light pipe structure. The substrate includes a first surface and a second surface opposite to each other. The second surface has at least one recess. The light sensing device is located in the substrate. The light sensing device is adjacent to the first surface. The light pipe structure is located in the substrate. The light pipe structure is located directly above the light sensing device.
    Type: Application
    Filed: June 9, 2023
    Publication date: August 22, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Yu Ling Huang, Yu-Yuan Lai
  • Patent number: 12068032
    Abstract: Various embodiments of the present application are directed towards an integrated memory chip with an enhanced device-region layout for reduced leakage current and an enlarged word-line etch process window (e.g., enhanced word-line etch resiliency). In some embodiments, the integrated memory chip comprises a substrate, a control gate, a word line, and an isolation structure. The substrate comprises a first source/drain region. The control gate and the word line are on the substrate. The word line is between and borders the first source/drain region and the control gate and is elongated along a length of the word line. The isolation structure extends into the substrate and has a first isolation-structure sidewall. The first isolation-structure sidewall extends laterally along the length of the word line and underlies the word line.
    Type: Grant
    Filed: May 23, 2023
    Date of Patent: August 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih Kuang Yang, Ping-Cheng Li, Hung-Ling Shih, Po-Wei Liu, Wen-Tuo Huang, Yu-Ling Hsu, Yong-Shiuan Tsair, Chia-Sheng Lin
  • Publication number: 20240258187
    Abstract: In an embodiment, a device includes: a first integrated circuit die having a first contact region and a first non-contact region; an encapsulant contacting sides of the first integrated circuit die; a dielectric layer contacting the encapsulant and the first integrated circuit die, the dielectric layer having a first portion over the first contact region, a second portion over the first non-contact region, and a third portion over a portion of the encapsulant; and a metallization pattern including: a first conductive via extending through the first portion of the dielectric layer to contact the first integrated circuit die; and a conductive line extending along the second portion and third portion of the dielectric layer, the conductive line having a straight portion along the second portion of the dielectric layer and a first meandering portion along the third portion of the dielectric layer.
    Type: Application
    Filed: April 10, 2024
    Publication date: August 1, 2024
    Inventors: Chien-Hsun Chen, Yu-Ling Tsai, Jiun Yi Wu, Chien-Hsun Lee, Chung-Shi Liu
  • Publication number: 20240247543
    Abstract: A window shade includes a shade assembly having a first end and a second end opposite to each other, the first end being coupled to a first bracket and the second end having a coupler, and a connector and a second bracket respectively attachable to a support surface of a building at two spaced-apart locations, wherein the first bracket at the first end of the shade assembly is operable to engage with and disengage from the connector, and the coupler at the second end of the shade assembly is operable to connect to and detach from the second bracket. Embodiments described herein also include a method of installing the window shade.
    Type: Application
    Filed: January 12, 2024
    Publication date: July 25, 2024
    Applicant: Teh Yor Co., Ltd.
    Inventor: Yu-Ling LIU
  • Publication number: 20240234635
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.
    Type: Application
    Filed: December 29, 2023
    Publication date: July 11, 2024
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Tsung-Hsun CHIANG, Bo-Jiun HU, Wen-Hung CHUANG, Yu-Ling LIN
  • Publication number: 20240237198
    Abstract: An electronic device and a method of manufacturing the electronic device are provided. The method of manufacturing the electronic device includes the following steps: providing a circuit board; performing a first pre-bending step on the circuit board so that the circuit board is bent to have a first radius of curvature; providing a back frame having a second radius of curvature; attaching the circuit board having the first radius of curvature to the back frame through an adhesive. A difference between the first radius of curvature and the second radius of curvature is within 10%.
    Type: Application
    Filed: December 12, 2023
    Publication date: July 11, 2024
    Applicant: CARUX TECHNOLOGY PTE. LTD.
    Inventors: Chueh-Yuan Nien, Ching-I Lo, Li-Wei Sung, Yu-Ling Hung
  • Publication number: 20240216311
    Abstract: A fully dilutable in aqueous phase self-microemulsifying system for the delivery of one or more polar oil active compounds having a positive characteristic curvature (Cc), comprising: a lecithin compound; a hydrophilic linker or a combination two or more hydrophilic linkers, the hydrophilic linker or the combination of two or more hydrophilic linkers having one having one hydrocarbon group with 6 to 10 carbon atoms, and the hydrophilic linker or the combination of two or more HLs having a Cc of about ?5 or more negative than about ?5; and a carrier oil.
    Type: Application
    Filed: December 13, 2021
    Publication date: July 4, 2024
    Applicant: THE GOVERNING COUNCIL OF THE UNIVERSITY OF TORONTO
    Inventors: Mehdi NOURAEI, Edgar ACOSTA, Yu-Ling CHENG, Levente DIOSADY, Venketeshwer RAO
  • Publication number: 20240220210
    Abstract: A modulo divider and a modulo division operation method for binary data are provided, including: converting a first variant and a second variant to a variant set according to a first mapping table; generating a fifth variant and a sixth variant according to the variant set; generating a seventh variant and an eighth variant according to the variant set; updating the first variant according to one of the fifth variant and the sixth variant and updating the second variant according to the other one of the fifth variant and the sixth variant; updating the third variant according to one of the seventh variant and the eighth variant and updating the fourth variant according to the other one of the seventh variant and the eighth variant; and outputting the third variant as a result of a modulo division operation in response to determining the updating of the third variant being finished.
    Type: Application
    Filed: January 10, 2023
    Publication date: July 4, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Chia-Hsiang Yang, Liang-Hsin Lin, Yu-Ling Kang, Yu-Hui Lin, Chih-Ming Lai