Patents by Inventor Yu Lu

Yu Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240400834
    Abstract: The present disclosure relates generally to multimeric dyes, colored dielectric polymer materials, methods of making them and uses thereof. In particular, the application concerns a colored dielectric polymer material comprising a multimeric dye with structure wherein each D is independently a chromophoric unit; each L is independently absent or is a linking group comprising no more than 10 atoms in length as measured in the shortest path from D to A; A is a bridging group; and n is an integer in the range of 1 to 3.
    Type: Application
    Filed: April 21, 2022
    Publication date: December 5, 2024
    Inventors: Antonio Facchetti, Zhihua Chen, Shaofeng Lu, Yu Xia, Mark Seger, Shiuan-Iou Lin, Hsiu-Chun Wu, Liang-Je Lai, Jing-Yun Chen
  • Publication number: 20240404924
    Abstract: A semiconductor package includes a leadframe having a die pad and lead terminals along a perimeter of the die pad, and an IC die mounted on the die pad. The IC die includes I/O pads disposed on an active front surface of the IC die. The IC die includes a semiconductor substrate, a circuit block fabricated on the semiconductor substrate, and a through substrate via (TSV) extending through a thickness of the semiconductor substrate. Bond wires extend between the I/O pads and the lead terminals, respectively. A molding compound encapsulates the IC die, the bond wires, and the leadframe.
    Type: Application
    Filed: June 3, 2024
    Publication date: December 5, 2024
    Applicant: MEDIATEK INC.
    Inventors: Tsung-Ming Chen, Yu-Ting Chou, Keng-Chang Liang, Chiyuan Lu, Jing-Hong Conan Zhan
  • Publication number: 20240400434
    Abstract: Methods for manufacturing glass articles having a target effective coefficient of thermal expansion CTETeff averaged over a temperature range comprise selecting a glass core composition having an average core glass coefficient of thermal expansion CTEcore that is greater than the target effective CTETeff and a glass clad composition having an average clad glass coefficient of thermal expansion CTEclad that is less than the target effective CTETeff; and manufacturing a glass laminate comprising a glass core layer formed from the glass core composition and two or more glass cladding layers fused to the glass core layer, each of the two or more glass cladding layers formed from the glass clad composition such that a ratio of a thickness of the glass core layer to a total thickness of the two or more glass cladding layers is selected to produce the glass laminate having an effective coefficient of thermal expansion CTEeff that is within ±0.5 ppm/° C. of the target effective CTETeff.
    Type: Application
    Filed: August 12, 2024
    Publication date: December 5, 2024
    Inventors: Heather Debra Boek, Timothy Michael Gross, Jin Su Kim, Jesse Kohl, HungCheng Lu, Yu Xiao, Liying Zhang, Lu Zhang
  • Publication number: 20240397904
    Abstract: The present disclosure provides a litter device, which comprises: a base having a concave groove; at least one support arm arranged on the base; a shell having a chamber and partially accommodated in the concave groove, the shell is rotatably connected to the support arm and rotated around an axis relatively to the support arm; a container arranged under the chamber, and having a collection cavity configured for collecting waste; wherein the chamber having an opening to allow pets to enter into, the shell is in shape of arc and having a center, the shell having an upper end and a lower end in the direction perpendicular to the axis, an angle between connection line of the upper end and the center and connection line of the lower end and the center is between 120-180 degrees.
    Type: Application
    Filed: May 22, 2024
    Publication date: December 5, 2024
    Inventors: Linfeng Cai, Yu Tang, Minxiang Cheng, Chuchu He, Deyong Lu
  • Publication number: 20240404741
    Abstract: A common mode filter includes a first iron core, a second iron core, a first coil, and a second coil. The first iron core includes two first electrode portions and two second electrode portions. The second iron core is disposed above the first iron core, and the first iron core and the second iron core are adhered to each other. All surfaces of the second iron core are coated with an insulating layer. The first coil is wound around the first iron core and the second iron core. The second coil is wound around the first iron core and the second iron core.
    Type: Application
    Filed: November 6, 2023
    Publication date: December 5, 2024
    Inventors: HUNG-CHIH LIANG, PIN-YU CHEN, HANG-CHUN LU, YA-WEN YANG, SHIH-KAI HUANG, YU-TING HSU, WEI-ZHI HUANG
  • Publication number: 20240400736
    Abstract: The present disclosure relates generally to colored dielectric polymer materials, methods of making them and uses thereof. In particular, the application concerns a colored dielectric polymer material comprising a crosslinked polymer and a dye dispersed in the crosslinked polymer.
    Type: Application
    Filed: April 21, 2022
    Publication date: December 5, 2024
    Inventors: Antonio Facchetti, Yu Xia, Shaofeng Lu, Mark Seger, Zhihua Chen, Shiuan-Iou Lin, Liang-Je Lai, Hsiu-Chun Wu, Jing-Yun Chen
  • Patent number: 12158618
    Abstract: An assembly having a protective part including a cap or a plug, a fiber optic component adapted to mate with the protective part and a lanyard. The lanyard has a first end attached to the protective part and a second end attached to the fiber optic component. One of the first and second ends of the lanyard includes a loop defined by a loop member. The loop has a plurality of undulations. The undulations are moveable between a first state and a second state. The undulations are at least partially straightened in a circumferential orientation as the undulations move from the first state to the second state. An inner cross-dimension of the loop is larger when the undulations are in the second state as compared to the first state, and wherein a resiliency of the loop biases the undulations toward the first state.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: December 3, 2024
    Assignee: CommScope Technologies LLC
    Inventors: Yu Lu, Ryan Kostecka
  • Patent number: 12157359
    Abstract: This application relates to a vehicle, a battery, and a driving apparatus, where the battery includes: a first box body; a second box body connected to the first box body; a plurality of battery units accommodated inside an enclosure defined by the first box body and the second box body; and a sealing gasket located between the first box body and the second box body whereby the first box body and the second box body are hermetically connected. The first box body and/or the second box body is provided with a first protruding portion, a side wall of the sealing gasket is provided with a notch portion, and the notch portion runs through the sealing gasket along a thickness direction of the sealing gasket, and the first protruding portion extends into the notch portion so that the first protruding portion fits with the notch portion.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: December 3, 2024
    Assignee: CONTEMPORARY AMPEREX TECHNOLOGY (HONG KONG) LIMITED
    Inventors: Kaijie You, Xingdi Chen, Yongguang Wang, Zequan Lu, Yu Tang, Zhichao Wang
  • Patent number: 12159922
    Abstract: A method includes forming a dummy gate over a substrate. A first gate spacer is formed on a sidewall of the dummy gate. The dummy gate is replaced with a gate structure. A top portion of the first spacer is removed. After the top portion of the first spacer is removed, a second spacer is over the first spacer. The second spacer has a stepped bottom surface with an upper step in contact with a top surface of the first spacer and a lower step lower than the top surface of the first spacer. A contact plug is formed contacting the gate structure and the second spacer.
    Type: Grant
    Filed: April 17, 2023
    Date of Patent: December 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 12157894
    Abstract: Provided are suppression DNA constructs and CRISPR/Cas9 DNA constructs that are useful for conferring improved drought tolerance, yield, and/or nitrogen stress tolerance in a plant. Also provided are genome edited plants, or plants expressing a suppression DNA construct, having improved drought tolerance, yield and/nitrogen stress tolerance. Further provided are methods for improving drought tolerance, yield, and/or nitrogen stress tolerance by introducing a genome edit in a plant or expressing a suppression DNA construct in a plant.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: December 3, 2024
    Inventors: Guihua Lu, Guokui Wang, Guanfan Mao, Changgui Wang, Rongrong Jiao, Yu Zhang, Guangwu Chen, Jiantao Wang
  • Publication number: 20240395670
    Abstract: A method of making a semiconductor device includes forming a first device on a first side of a substrate, wherein the first device comprises a first source/drain (S/D) electrode. The method further includes forming a second device on a second side of the substrate, wherein the second side of the substrate is opposite the first side of the substrate, and the second device comprises a second S/D electrode. The method further includes forming a through substrate via (TSV) electrically connecting the first S/D electrode to the second S/D electrode, wherein a width of the TSV is equal to a width of at least one of the first S/D electrode or the second S/D electrode.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Shang-Hsuan CHIU
  • Publication number: 20240391509
    Abstract: The disclosure discloses a system for controlling a multi-point synchronous braking of a monorail hoist and a utilization method thereof. The system comprises a contact detection unit, a common end roller unit, a hydraulic unit, a synchronous control unit and connection cables. The contact detection unit is installed on a brake shoe of a monorail hoist. The common end roller unit is installed on a travelling track and connected with a frame of the monorail hoist. The contact detection unit includes a tube in connection with the brake shoe. A metal probe corresponding to the travelling track is arranged inside the tube. A circular boss is formed on the metal probe. A limiting bolt corresponding to the circular boss is formed on an inner side wall of the tube. The metal probe is contactable with the travelling track or the limiting bolt when the brake shoe brakes.
    Type: Application
    Filed: September 19, 2022
    Publication date: November 28, 2024
    Applicant: China University of Mining and Technology
    Inventors: Yu TANG, Zhencai ZHU, Gang SHEN, Xiang LI, Mengmeng GAO, Wei WANG, Yuxing PENG, Gongbo ZHOU, Hao LU, Qingguo WANG
  • Publication number: 20240393548
    Abstract: A fiber optic cable assembly includes a fiber optic cable and a fiber optic connector. The cable includes a jacket having an elongated transverse cross-sectional profile that defines a major axis and a minor axis. Strength components of the cable are anchored to the connector. The fiber optic connector includes a ferrule defining a major axis that is generally perpendicular to the major axis of the jacket and a minor axis that is generally perpendicular to the minor axis of the jacket. Certain types of connectors include a connector body defining a side opening that extends along a length of the connector body; a ferrule configured for lateral insertion into the connector body through the side opening; and a cover that mounts over the side opening after the ferrule has been inserted into the connector body through the side opening.
    Type: Application
    Filed: May 20, 2024
    Publication date: November 28, 2024
    Applicant: CommScope Technologies LLC
    Inventor: Yu LU
  • Publication number: 20240395911
    Abstract: A semiconductor device and method of manufacture which utilize isolation structures between semiconductor regions is provided. In embodiments different isolation structures are formed between different fins in different regions with different spacings. Some of the isolation structures are formed using flowable processes. The use of such isolation structures helps to prevent damage while also allowing for a reduction in spacing between different fins of the devices.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Pei Yu Lu, Je-Ming Kuo
  • Publication number: 20240397763
    Abstract: A display substrate comprises a base substrate (10), a first conductive layer (21), a first planarization layer (31), a second conductive layer (22), a second planarization layer (32) and at least one transparent conductive layer which are located on the base substrate (10). The second conductive layer (22) is electrically connected with the first conductive layer (21) through at least one first via penetrating the first planarization layer (31). The transparent conductive layer includes at least one first transparent conductive line (231) and at least one auxiliary trace (232). An orthographic projection of the first transparent conductive line (231) on the base substrate (10) is overlapped with an orthographic projection of the at least one first via on the base substrate (10).
    Type: Application
    Filed: December 27, 2021
    Publication date: November 28, 2024
    Inventors: Jianchang CAI, Qing TANG, Yu ZHAO, Yanwei LU, Jianmin FAN, Binyan WANG, Yue LONG, Weiyun HUANG, Zhuoran YAN, Yifei WANG
  • Publication number: 20240395671
    Abstract: A method of making a semiconductor device includes manufacturing a first transistor over a first side of a substrate. The method further includes depositing a spacer material against a sidewall of the first transistor. The method further includes recessing the spacer material to expose a first portion of the sidewall of the first transistor. The method further includes manufacturing a first electrical connection to the transistor, a first portion of the electrical connection contacts a surface of the first transistor farthest from the substrate, and a second portion of the electrical connect contacts the first portion of the sidewall of the first transistor. The method further includes manufacturing a self-aligned interconnect structure (SIS) extending along the spacer material, wherein the spacer material separates a portion of the SIS from the first transistor, and the first electrical connection directly contacts the SIS.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Shang-Syuan CIOU, Hui-Zhong ZHUANG, Ching-Wei TSAI, Shang-Wen CHANG
  • Publication number: 20240397673
    Abstract: A liquid cooling device comprises a cabinet, a liquid flowing unit, a liquid tray, and a liquid sensor. The cabinet is configured for containing an electronic component. The liquid flowing unit comprises a plurality of liquid delivery pieces connected and configured for circulating coolant to cool the electronic component. The liquid tray defines a confluence groove configured for gathering the coolant leaking from two connected ones of the plurality of liquid delivery pieces. The liquid sensor is placed in the confluence groove and is configured for sending a signal when contacting with the coolant. When the coolant leaks from two connected ones of the plurality of liquid delivery pieces then drops on the liquid tray and flows into the confluence groove by gravity, the liquid sensor contacts with the coolant in the confluence groove and sends the signal. A server with the liquid cooling device is also disclosed.
    Type: Application
    Filed: May 15, 2024
    Publication date: November 28, 2024
    Inventors: YU-CHIA TING, CHIA-NAN PAI, TSUNG-LIN LIU, YEN-LU CHENG, CHUANG-WEI TSENG, HAO-WEN CHENG
  • Patent number: 12155586
    Abstract: Provided are a method for indicating reference signal configuration information, a base station and a terminal. The method includes that a first communication node determines joint signaling and the first communication node transmits the joint signaling to a second communication node. The joint signaling includes first information and second information. The first information includes at least one of the following: quasi-colocation configuration information and configuration information of a transmission beam. The second information includes at least one of the following: configuration information of a phase tracking reference signal and configuration information of a demodulation reference signal.
    Type: Grant
    Filed: March 29, 2023
    Date of Patent: November 26, 2024
    Assignee: ZTE Corporation
    Inventors: Chuangxin Jiang, Nan Zhang, Zhaohua Lu, Yu Ngok Li, Bo Gao, Hao Wu, Meng Mei
  • Patent number: 12155605
    Abstract: A wireless communication method, comprising: forming M groups of data transmission configurations, wherein the mth group of data transmission configuration corresponds to the data transmission scheduled by a maximum number of Km control information sets, where M>0, m=1, . . . , M and Km>0, defining one or more transmission settings for said M groups of data transmission configurations, allocating resources among the one or more transmission settings, generating one or more control information sets associated with said one or more transmission settings, transmitting the one or more control information sets to a wireless network.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: November 26, 2024
    Assignee: ZTE Corporation
    Inventors: Nan Zhang, Yu Ngok Li, Yijian Chen, Zhaohua Lu
  • Patent number: 12154938
    Abstract: Embodiments include structures and methods for fabricating an MFM capacitor having a plurality of metal contacts. An embodiment may include a first metal strip, disposed on a substrate and extending in a first direction, a ferroelectric blanket layer, disposed on the first metal strip, a second metal strip, disposed on the ferroelectric blanket layer and extending in a second direction different from the first direction, and a plurality of metal contacts disposed between the first metal strip and the second metal strip and located within an intersection region of the first metal strip and the second metal strip.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: November 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chun-Chieh Lu, Mauricio Manfrini, Marcus Johannes Hendricus Van Dal, Chih-Yu Chang, Sai-Hooi Yeong, Yu-Ming Lin, Georgios Vallianitis