Patents by Inventor Yu Peng

Yu Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220344248
    Abstract: A package structure includes a redistribution layer, a chip assembly, a plurality of solder balls, and a molding compound. The redistribution layer includes redistribution circuits, photoimageable dielectric layers, conductive through holes, and chip pads. One of the photoimageable dielectric layers located on opposite two outermost sides has an upper surface and openings. The chip pads are located on the upper surface and are electrically connected to the redistribution circuits through the conductive through holes. The openings expose portions of the redistribution circuits to define solder ball pads. Line widths and line spacings of the redistribution circuits decrease in a direction from the solder ball pads towards the chip pads. The chip assembly is disposed on the chip pads and includes at least two chips with different sizes. The solder balls are disposed on the solder ball pads, and the molding compound at least covers the chip assembly.
    Type: Application
    Filed: April 21, 2021
    Publication date: October 27, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: John Hon-Shing Lau, Cheng-Ta Ko, Pu-Ju Lin, Kai-Ming Yang, Chi-Hai Kuo, Chia-Yu Peng, Tzyy-Jang Tseng
  • Patent number: 11482491
    Abstract: A package structure includes an insulating encapsulation, at least one die, and conductive structures. The at least one die is encapsulated in the insulating encapsulation. The conductive structures are located aside of the at least one die and surrounded by the insulating encapsulation, and at least one of the conductive structures is electrically connected to the at least one die. Each of the conductive structures has a first surface, a second surface opposite to the first surface and a slant sidewall connecting the first surface and the second surface, and each of the conductive structures has a top diameter greater than a bottom diameter thereof, and wherein each of the conductive structures has a plurality of pores distributed therein.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: October 25, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chen, Chih-Hua Chen, Ching-Hua Hsieh, Hsiu-Jen Lin, Yu-Chih Huang, Yu-Peng Tsai, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu
  • Patent number: 11479957
    Abstract: The present disclosure provides a toilet seat assembly for delivering medicine, washing, cleaning, and drying a perineal region of a user. The toilet seat assembly includes a spraying nozzle assembly having one or more retractable spray nozzle units for delivering a liquid product, a drying nozzle assembly having one or more retractable drying nozzle units for drying the region, and a medicine delivery assembly for delivering a medicinal product to the region, the medicine delivery assembly having a medicine delivery nozzle connected to a medicine storage element containing the medicinal product.
    Type: Grant
    Filed: May 6, 2017
    Date of Patent: October 25, 2022
    Assignee: Bemis Manufacturing Company
    Inventors: Brian Schwab, Shao-Yu Peng
  • Publication number: 20220336333
    Abstract: A package structure includes at least one first redistribution layer, at least one second redistribution layer, a chip pad, a solder ball pad, a chip, a solder ball, and a molding compound. The first redistribution layer includes a first dielectric layer and a first redistribution circuit that fills a first opening and a second opening of the first dielectric layer. The first dielectric layer is aligned with the first redistribution circuit. The second redistribution layer includes a second and a third dielectric layers and a second redistribution circuit. The third dielectric layer is aligned with the second redistribution circuit. The chip pad and the solder ball pad are electrically connected to the first and the second redistribution circuits respectively. The chip and the solder ball are disposed on the chip pad and the solder ball pad respectively. The molding compound at least covers the chip and the chip pad.
    Type: Application
    Filed: April 19, 2021
    Publication date: October 20, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: John Hon-Shing Lau, Cheng-Ta Ko, Pu-Ju Lin, Kai-Ming Yang, Chia-Yu Peng, Chi-Hai Kuo, Tzyy-Jang Tseng
  • Publication number: 20220326294
    Abstract: A photovoltaic energy system and a method for detecting a ground insulation impedance, improve accuracy of detecting a ground insulation impedance after one or more conversion circuits are connected in parallel. The photovoltaic energy system includes one or more conversion circuits and a detection circuit. The detection circuit includes an alternating current signal source and a sampling resistor that are connected in series, a first sampling circuit, and a control circuit. The control circuit is configured to control the alternating current signal source to output harmonic signals of a first frequency and a second frequency. The first sampling circuit is configured to: when the alternating current signal source outputs the harmonic signal of the first frequency, collect a voltage at both terminals of the sampling resistor to obtain a first voltage.
    Type: Application
    Filed: March 29, 2022
    Publication date: October 13, 2022
    Inventors: Zhong WANG, Shengjie ZHANG, Jianshan LI, YU PENG, Shijiang YU, He ZHOU, Bo YU
  • Publication number: 20220328387
    Abstract: A package carrier includes a first redistribution layer having a first upper surface and a first lower surface and including a plurality of first redistribution circuits, a plurality of conductive through holes, a plurality of photoimageable dielectric layers, and a plurality of chip pads and a second redistribution layer disposed on the first upper surface of the first redistribution layer. The second redistribution layer has a second upper surface and a second lower surface aligned with and directly connected to the first upper surface of the first redistribution layer and includes a plurality of second redistribution circuits, a plurality of conductive structures, a plurality of Ajinomoto build-up Film (ABF) layers, and a plurality of solder ball pads. A line width and a line pitch of each of the first redistribution circuits are smaller than a line width and a line pitch of each of the second redistribution circuits.
    Type: Application
    Filed: April 15, 2021
    Publication date: October 13, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: John Hon-Shing Lau, Cheng-Ta Ko, Pu-Ju Lin, Kai-Ming Yang, Chi-Hai Kuo, Chia-Yu Peng, Tzyy-Jang Tseng
  • Publication number: 20220328334
    Abstract: A tray includes a body for placement of a component (e.g. electronic component) and a taker disposed on a bottom surface of the body. The taker is used to take a spacer and includes a first taking element and a second taking element. The first taking element includes a first connection portion and a first confinement portion, and the second taking element includes a second connection portion and a second confinement portion. An accommodation space is provided between the first and second connection portions and a passageway is provided between the first and second confinement portions. While the spacer is moved through the passageway and into the accommodation space, it is confined in the accommodation space by the first and second confinement portions such that the taker can take away the spacer to show another tray located under the spacer as the tray is removed.
    Type: Application
    Filed: March 9, 2022
    Publication date: October 13, 2022
    Inventors: Hsu-Chi Lee, Pi-Yu Peng, Chun-Te Lee
  • Publication number: 20220319298
    Abstract: An indoor positioning system, for detecting a position of a target object located in a containing body, includes a tracking label, a plurality of positioning label groups, and a scanning device. The tracking label is disposed on the target object. Each positioning label groups is disposed on the containing body and has a plurality of label units. Each label unit defines a positioning interface, which forms a plurality of areas of the containing body. The scanning device senses and reads the tracking label and each label unit of each positioning label group. The scanning device obtains the positioning interface in which the tracking label is located through an analysis computation according to a signal relationship between the tracking label and each label unit, thereby identifying the positioning interface to obtain one of the areas of the target object in the containing body.
    Type: Application
    Filed: March 21, 2022
    Publication date: October 6, 2022
    Inventors: CHENG-YU PENG, DWEN-CHEN WU
  • Publication number: 20220319982
    Abstract: An IC structure comprises a first transistor formed on a substrate, a first interconnect structure over the first transistor, a dielectric layer over the first interconnect structure, a plurality of 2D semiconductor islands on the dielectric layer, and a plurality of second transistors formed on the plurality of 2D semiconductor islands.
    Type: Application
    Filed: August 23, 2021
    Publication date: October 6, 2022
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Chenming HU, Shu-Jui CHANG, Chen-Han CHOU, Yen-Teng HO, Chia-Hsing WU, Kai-Yu PENG, Cheng-Hung SHEN
  • Patent number: 11458260
    Abstract: A method and apparatus is provided for spraying a solution, such as a cleaning solution a barrier material, out of a spray canister device to a surface area of a human body. The spray canister device generally includes a removable sleeved cover element covering an inner canister element. The spray canister device with the removable sleeved cover is easy to carry and easy to spray, and can be handled manually or functions together with other devices.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: October 4, 2022
    Assignee: Bemis Manufacturing Company
    Inventors: Brian Schwab, Shao-Yu Peng, Brian Murray
  • Patent number: 11462302
    Abstract: A method of building an abnormality quantifier comprising: generating at least one selected first dataset comprising measurements of a normal population or sample and at least one second selected dataset comprising measurements of an abnormal population or sample; generating an image or map by imagizing the datasets; identifying a normality zone within the image or map using the first dataset; identifying an abnormality zone within the image or map using the second dataset; determining a definition of abnormality based on a comparison of the normality zone and the abnormality zone; receiving or accessing at least one third dataset comprising measurements of a both known normal and abnormal population or sample; testing the performance of the initially defined abnormality against one or more preset performance criteria; and outputting an abnormality quantifier when optimal performance has been reached.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: October 4, 2022
    Assignee: Straxcorp Pty Ltd
    Inventors: Roger Zebaze, Yu Peng
  • Patent number: 11462507
    Abstract: A method includes performing a first laser shot on a first portion of a top surface of a first package component. The first package component is over a second package component, and a first solder region between the first package component and the second package component is reflowed by the first laser shot. After the first laser shot, a second laser shot is performed on a second portion of the top surface of the first package component. A second solder region between the first package component and the second package component is reflowed by the second laser shot.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: October 4, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Yu Chen, Chia-Shen Cheng, Hao-Jan Pei, Philip Yu-Shuan Chung, Kuei-Wei Huang, Yu-Peng Tsai, Hsiu-Jen Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu
  • Patent number: 11452709
    Abstract: The invention provides novel compositions and methods for the treatment of Radiation-Induced Bystander Effects (RIBE), resulting from radiation exposure. In one preferred embodiment the inventions includes novel therapeutic agents, including but not limited to quercetin and quercetin analogs, as well as E64, CA074, CA074Me, that interfere with the activity of Cathepsin B.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: September 27, 2022
    Assignees: THE REGENTS OF THE UNIVERSITY OF COLORADO, A BODY CORPORATE, TSINGHUA UNIVERSITY, CHANG GUNG UNIVERSITY
    Inventors: Ding Xue, Yu Peng, Man Zhang, Lingjun Zheng, Qian Liang, Hanzeng Li, Jau-Song Yu, Jeng-Ting Chen
  • Publication number: 20220279992
    Abstract: A method and a wash, clean and dry system are provided for washing, cleaning and drying a surface region of a human body. The system includes a toilet seat assembly with a bidet assembly having a spray canister device for spraying the surface region with a solution, such as a skin protecting barrier solution, a cleaning solution or a medicated solution. In one aspect, the spray canister device can be movably insert into and out of the toilet seat assembly and is easy to operate and use. In addition, the bidet assembly further includes a spray nozzle assembly and a drying nozzle assembly, which are adapted to wash, clean and dry the region of the human body in three dimensional moments. The removable spray canister device with the removable sleeved cover element is thus easy to carry and be re-filled with new solutions.
    Type: Application
    Filed: February 21, 2022
    Publication date: September 8, 2022
    Inventors: Brian Schwab, Shao-Yu Peng, Brian Murray
  • Publication number: 20220256717
    Abstract: A circuit board structure includes a first sub-board including a plurality of circuit patterns, a second sub-board including a plurality of pads, and a connecting structure layer having a plurality of through holes and including an insulating layer, first and second adhesive layers, and a plurality of conductive blocks. The first adhesive layer is directly connected to the first sub-board. The second adhesive layer is directly connected to the second sub-board. The through holes penetrate through the first adhesive layer, the insulating layer, and the second adhesive layer. The conductive blocks are located in the through holes. An upper surface and a lower surface of each conductive block are respectively lower than a first surface of the first adhesive layer and a second surface of the second adhesive layer relatively away from the insulating layer. Each circuit pattern contacts the upper surface, and each pad contacts the lower surface.
    Type: Application
    Filed: April 20, 2021
    Publication date: August 11, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: John Hon-Shing Lau, Cheng-Ta Ko, Pu-Ju Lin, Chi-Hai Kuo, Kai-Ming Yang, Chia-Yu Peng, Shao-Chien Lee, Tzyy-Jang Tseng
  • Publication number: 20220254767
    Abstract: A manufacturing method of a package-on-package structure includes at least the following steps. Top packages are mounted on a top side of a reconstructed wafer over a flexible tape, where conductive bumps at a bottom side of the reconstructed wafer is attached to the flexible tape, and during the mounting, a shape geometry of the respective conductive bump changes and at least a lower portion of the respective conductive bump is embraced by the flexible tape. The flexible tape is released from the conductive bumps after the mounting.
    Type: Application
    Filed: April 27, 2022
    Publication date: August 11, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsuan-Ting Kuo, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hao-Jan Pei, Yu-Peng Tsai, Chia-Lun Chang, Chih-Chiang Tsao, Philip Yu-shuan Chung
  • Publication number: 20220247430
    Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.
    Type: Application
    Filed: April 18, 2022
    Publication date: August 4, 2022
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Wei Bing Shang, Yu Zhang, Hong Wen Li, Yu Peng Fan, Zhong Lai Liu, En Peng Gao, Liang Zhang
  • Publication number: 20220208630
    Abstract: A chip packaging structure includes a chip, a redistribution layer, a solder ball, an encapsulant, and a stress buffer layer. The chip has an active surface and a back surface opposite to each other, and a peripheral surface connected to the active surface and the back surface. The redistribution layer is disposed on the active surface of the chip. The solder ball is disposed on the redistribution layer, and the chip is electrically connected to the solder ball through the redistribution layer. The encapsulant encapsulates the active surface and the back surface of the chip, the redistribution layer, and part of the solder ball. The stress buffer layer at least covers the peripheral surface of the chip. An outer surface of the stress buffer layer is aligned with a side surface of the encapsulant.
    Type: Application
    Filed: January 22, 2021
    Publication date: June 30, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: Kai-Ming Yang, Chia-Yu Peng, Pei-Chi Chen, Pu-Ju Lin, Cheng-Ta Ko
  • Patent number: D962942
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: September 6, 2022
    Assignee: AVISION INC.
    Inventor: Chao-Yu Peng
  • Patent number: D962943
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: September 6, 2022
    Assignee: AVISION INC.
    Inventors: Chao-Yu Peng, Shao-Lan Sheng