Abstract: Implementations of semiconductor packages may include: a substrate coupled to one or more die and to one or more connectors, a glass lid coupled over one or more die by an adhesive and a housing comprising one or more sides and a bottom opening and a top opening. The substrate may be coupled to the housing at the bottom opening and the glass lid may be coupled under the housing at the top opening.

Abstract: Implementations of semiconductor packages may include: a first semiconductor die coupled to a first side of a substrate having one or more internal traces. One or more connectors coupled to the first semiconductor die and the first side of the substrate. A glass lid coupled to the first side of the substrate over the first semiconductor die. A mold compound that encapsulates at least a portion of the substrate. A second semiconductor die coupled to a second side of the substrate opposing the first side. The second semiconductor die is electrically coupled with the first semiconductor die through the one or more traces of the substrate.

Abstract: An image sensor semiconductor package (package) includes a printed circuit board (PCB) having a first surface and a second surface opposite the first surface. A complementary metal-oxide semiconductor (CMOS) image sensor (CIS) die has a first surface with a photosensitive region and a second surface opposite the first surface of the CIS die. The second surface of the CIS die is coupled with the first surface of the PCB. A transparent cover is coupled over the photosensitive region of the CIS die. An image signal processor (ISP) is embedded within the PCB. One or more electrical couplers electrically couple the CIS die with the PCB. A plurality of electrical contacts on the second surface of the PCB are electrically coupled with the CIS die and with the ISP. The ISP is located between the plurality of electrical contacts of the second surface of the PCB and the CIS die.

Abstract: Implementations of semiconductor packages may include: a substrate coupled to one or more die and to one or more connectors, a glass lid coupled over one or more die by an adhesive and a housing comprising one or more sides and a bottom opening and a top opening. The substrate may be coupled to the housing at the bottom opening and the glass lid may be coupled under the housing at the top opening.

Abstract: Implementations of semiconductor packages may include: a semiconductor wafer, a glass lid fixedly coupled to a first side of the semiconductor die by an adhesive, a redistribution layer coupled to a second side of the semiconductor die, and a plurality of ball mounts coupled to the redistribution layer on a side of the redistribution layer coupled to the semiconductor die. The adhesive may be located in a trench around a perimeter of the semiconductor die and located in a corresponding trench around a perimeter of the glass lid.

Abstract: An image sensor package including a barrier structure to prevent image sensor die contamination is described. A barrier structure may surround an image sensor die that is attached on an image sensor carrier. The barrier structure may be attached to a transparent window structure as well as a package substrate. The barrier structure may extend through a hole in the package substrate. The image sensor carrier may be mounted to the package substrate using a thermal compression head that is able to apply independently varying compressive forces to corresponding regions of a surface at a given time. The thermal compression head may be used to cure the barrier structure and/or adhesives used in the image sensor package. Underfill adhesive may be deposited between discrete mounting structures used to mount the package substrate to the image sensor carrier, after the barrier structure has been applied.

Abstract: An image sensor package including a barrier structure to prevent image sensor die contamination is described. A barrier structure may surround an image sensor die that is attached on an image sensor carrier. The barrier structure may be attached to a transparent window structure as well as a package substrate. The barrier structure may extend through a hole in the package substrate. The image sensor carrier may be mounted to the package substrate using a thermal compression head that is able to apply independently varying compressive forces to corresponding regions of a surface at a given time. The thermal compression head may be used to cure the barrier structure and/or adhesives used in the image sensor package. Underfill adhesive may be deposited between discrete mounting structures used to mount the package substrate to the image sensor carrier, after the barrier structure has been applied.

Abstract: Disclosed herein is a stacked chip package including an image sensor including a recess formed on a surface thereof, and a digital signal processor chip that is positioned within the recess. Also disclosed herein is a method of fabricating a stacked chip package including the steps of forming a recess on a surface of an image sensor and positioning a digital signal processor in the recess of the image sensor.

Abstract: Disclosed herein is a stacked chip package including an image sensor including a recess formed on a surface thereof, and a digital signal processor chip that is positioned within the recess. Also disclosed herein is a method of fabricating a stacked chip package including the steps of forming a recess on a surface of an image sensor and positioning a digital signal processor in the recess of the image sensor.

Abstract: An image sensor package includes a substrate, an image sensor chip, a plurality of metal wires and an encapsulant. The substrate has an upper face, a lower face and a plurality of connecting pads arranged on the upper face. The image sensor chip has an active surface, a back surface opposite to the active surface and a plurality of bonding pads arranged on the active surface. The metal wires electrically connect the bonding pads of the image sensor chip to the connecting pads of the substrate. The transparent cover is arranged above the image sensor chip. A gap is formed between the transparent cover and the image sensor chip. The encapsulant is disposed around the transparent cover and the metal wires, and is used for sealing the metal wires and fixing the transparent cover above the image sensor chip.

Abstract: A vehicle signal light includes a housing, a light-guiding unit, a light-emitting unit, and a light shield. The housing has a rear wall and a transparent front wall. The light-guiding unit is mounted in the housing, and includes a light-transmitting member and a refractive member. The light-transmitting member has front, rear, and first and second side surfaces. The refractive member includes first protrusions formed on the rear surface. The light-transmitting member and the refractive member are made of a light-transmissive material. The light-emitting unit is disposed proximate to the first and second side surfaces of the light-transmitting member, and emits light into the light-transmitting member. The light shield is disposed adjacent to the rear surface and reflects light emitted thereon toward the housing front wall.

Abstract: An IC chip/substrate assembly bonded together by a non-conductive adhesive and a method for forming the assembly. The assembly consists of an IC chip that has bumps formed on an active surface, a substrate that has bond pads formed on a top surface, wherein at least one of the IC chip and the substrate has dummy bumps formed in-between the bumps or the bond pads, and a non-conductive adhesive disposed in between and bonding the IC chip and the substrate together in a face-to-face relationship with the bumps in electrical communication with the bond pads.

Abstract: An IC chip/substrate assembly bonded together by a non-conductive adhesive and a method for forming the assembly. The assembly consists of an IC chip that has bumps formed on an active surface, a substrate that has bond pads formed on a top surface, wherein at least one of the IC chip and the substrate has dummy bumps formed in-between the bumps or the bond pads, and a non-conductive adhesive disposed in between and bonding the IC chip and the substrate together in a face-to-face relationship with the bumps in electrical communication with the bond pads.

Abstract: An IC chip/substrate assembly bonded together by a non-conductive adhesive and a method for forming the assembly. The assembly consists of an IC chip that has bumps formed on an active surface, a substrate that has bond pads formed on a top surface, wherein at least one of the IC chip and the substrate has dummy bumps formed in-between the bumps or the bond pads, and a non-conductive adhesive disposed in between and bonding the IC chip and the substrate together in a face-to-face relationship with the bumps in electrical communication with the bond pads.

Abstract: A method for forming electrically conductive bumps on a semiconductor substrate, or a semiconductor wafer and devices formed by the method are disclosed. In the method, a wafer that has an active surface, a plurality of conductive elements formed on the active surface and a passivation layer insulating the plurality of conductive bumps from each other is first provided. A first metal layer is then sputter deposited on top of the plurality of conductive elements and the passivation layer, followed by stencil printing a plurality of bumps of an insulating material on top of each one of the plurality of conductive elements. The plurality of bumps may be heat treated to a temperature of at least 100° C. for a period of at least 10 minutes for stress relief. A second metal layer is then sputter deposited on top of the plurality of bumps and the first metal layer.

Abstract: An IC chip/substrate assembly bonded together by a non-conductive adhesive and a method for forming the assembly. The assembly consists of an IC chip that has bumps formed on an active surface, a substrate that has bond pads formed on a top surface, wherein at least one of the IC chip and the substrate has dummy bumps formed in-between the bumps or the bond pads, and a non-conductive adhesive disposed in between and bonding the IC chip and the substrate together in a face-to-face relationship with the bumps in electrical communication with the bond pads.

Abstract: A method for bonding an IC chip by a non-conductive adhesive that contains between about 5 weight % and about 25 weight % of a non-conductive filler is described. The filler particles in the filler material must have a hardness that is higher, and preferably at least two times higher, than the metal material forming the bump. Moreover, the filler particles must be non-electrically conductive such that electrical shorts between a plurality of bumps on the IC chip do not occur. The concentration of the filler in the adhesive must be high enough so as to reduce the CTE of the adhesive to match that of the IC chip and the substrate, and low enough so as not to impede the electrical communication between the bumps on the IC chip and the bond pads on the substrate.