Patents by Inventor Yu-Wen Huang

Yu-Wen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11736704
    Abstract: Video encoding methods and apparatuses for Sum of Absolute Transformed Difference (SATD) computation by folded Hadamard transform circuits include splitting a current block into SATD blocks, receiving input data associated with a first block of a first SATD block in a first cycle and receiving input data associated with a second block of the first SATD block in a second cycle, and performing calculations for the first block by shared Hadamard transform circuits in the first cycle and performing calculations for the second block by the shared Hadamard transform circuits in the second cycle. Each shared Hadamard transform circuit is a first part of each folded Hadamard transform circuit. The video encoding methods and apparatuses further perform calculations for the entire SATD block by a final part of each folded Hadamard transform circuit to generate a final SATD result of the first SATD block for encoding.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: August 22, 2023
    Assignee: MEDIATEK INC.
    Inventors: Cheng-Yen Chuang, Man-Shu Chiang, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20230224455
    Abstract: A method and apparatus for video coding. According to the method, a set of candidates associated with coding modes or mode parameters are determined. Boundary matching costs associated with the set of candidates are determined, where each of the boundary matching costs is determined for one target candidate of the set of candidates. The costs are calculated by using reconstructed or predicted samples of the current block and one or more neighboring blocks of the current block. Each of the boundary matching costs is calculated using one target configuration selected from a plurality of configurations. A final candidate is selected from the set of candidates based on the boundary matching costs. The current block is encoded or decoded using the final candidate.
    Type: Application
    Filed: December 13, 2022
    Publication date: July 13, 2023
    Inventors: Man-Shu CHIANG, Chun-Chia CHEN, Chih-Wei HSU, Shih-Ta HSIANG, Ching-Yeh CHEN, Tzu-Der CHUANG, Yu-Wen HUANG
  • Patent number: 11700391
    Abstract: Method and apparatus of Inter prediction for video coding are disclosed. When a sub-block motion compensation coding tool is selected for the current block, the method generates sub-block MVs (motion vectors) associated with multiple sub-blocks, which are included or contained in the current block, according to the sub-block motion compensation coding tool, constrains the sub-block MVs within a range to form constrained sub-block MVs, and applies motion compensation to the current block using the constrained sub-block MVs or applies motion compensation to the current block using one sub-block MV within the range around the primary MV in a second list if a corresponding sub-block MV in a first list is outside the range. In another method, motion compensation is applied to the current block only using reference pixels of reference sub-blocks within a primary reference block.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: July 11, 2023
    Assignee: HFI INNOVATION INC.
    Inventors: Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang, Chih-Wei Hsu
  • Publication number: 20230199170
    Abstract: A video coding system generating candidates for Merge Mode with Motion Vector Difference (MMVD) with reduced resource usage is provided. The system receives data to be encoded or decoded as a current block of a current picture of a video. The system identifies multiple MMVD candidates for different offset positions based on a merge candidate of the current block. The system generates reference samples for the identified MMVD candidates. The system reconstructs the current block or encodes the current block into a bitstream by using the generated reference samples. The system processes the MMVD candidates in separate groups: a first group of vertical MMVD candidates and a second group of horizontal MMVD candidates. The system generates the reference samples for the identified MMVD candidates by applying a vertical filter to source reference samples of horizontal MMVD candidates and then applying a horizontal filter to outputs of the vertical filter.
    Type: Application
    Filed: October 31, 2022
    Publication date: June 22, 2023
    Inventors: Cheng-Yen Chuang, Man-Shu Chiang, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20230199171
    Abstract: Various schemes for managing search memory are described, which are beneficial in achieving enhanced coding gain, low latency, and/or reduced hardware for a video encoder or decoder. In processing a current block of a current picture, an apparatus determines a quantity of a plurality of reference pictures of the current picture. The apparatus subsequently determines, for at least one of the reference pictures, a corresponding search range size based on the quantity. The apparatus then determines, based on the search range size and a location of the current block, a search range of the reference picture, based on which the apparatus encodes or decodes the current block.
    Type: Application
    Filed: November 28, 2022
    Publication date: June 22, 2023
    Inventors: Yu-Ling Hsiao, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20230199196
    Abstract: Video encoding methods and apparatuses for frequency domain mode decision include receiving residual data of a current block, testing multiple coding modes on the residual data, calculating a distortion associated with each of the coding modes in a frequency domain, performing a mode decision to select a best coding mode from the tested coding modes according to the distortion calculated in the frequency domain, and encoding the current block based on the best coding mode.
    Type: Application
    Filed: March 23, 2022
    Publication date: June 22, 2023
    Inventors: Chen-Yen LAI, Ching-Yeh CHEN, Tzu-Der CHUANG, Chih-Wei HSU, Chun-Chia CHEN, Yu-Wen HUANG
  • Publication number: 20230199199
    Abstract: Various schemes pertaining to video coding parallelization techniques are described. An apparatus receives video data. The apparatus subsequently calculates a plurality of figures of merits (FOMs), each of the FOM representing how well a particular coding tool may perform in encoding the video data. The apparatus further determines a coding tool that may be suitable for encoding the video data by comparing the FOMs. In determining the coding tool, the apparatus utilizes time-interleaving techniques to parallelly process the video data. The video data may include an array of coding blocks, and the apparatus may receive the video data using a snake-like processing order scanning through the array of coding blocks.
    Type: Application
    Filed: November 1, 2022
    Publication date: June 22, 2023
    Inventors: Cheng-Yen Chuang, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20230200043
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate, a first inter-level dielectric (ILD) layer above the substrate, and a second ILD layer above the first ILD layer. A first capacitor and a second capacitor are formed within the first ILD layer and the second ILD layer. A first top plate of the first capacitor and a second top plate of the second capacitor are formed at a boundary between the first ILD layer and the second ILD layer. The first capacitor and the second capacitor are separated by a dielectric area in the first ILD layer. The dielectric area includes a first dielectric area that is coplanar with the first top plate or the second top plate, and a second dielectric area above the first dielectric area and to separate the first top plate and the second top plate. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: February 14, 2023
    Publication date: June 22, 2023
    Inventors: Travis W. LAJOIE, Abhishek A. SHARMA, Van H. LE, Chieh-Jen KU, Pei-Hua WANG, Jack T. KAVALIEROS, Bernhard SELL, Tahir GHANI, Gregory GEORGE, Akash GARG, Julie ROLLINS, Allen B. GARDINER, Shem OGADHOH, Juan G. ALZATE VINASCO, Umut ARSLAN, Fatih HAMZAOGLU, Nikhil MEHTA, Yu-Wen HUANG, Shu ZHOU
  • Publication number: 20230199217
    Abstract: A video encoder receives raw pixel data to be encoded as a current block of a current picture of a video into a bitstream. The video encoder identifies multiple candidate bi-prediction positions for the current block, including a center position, a first set of offset positions, and a second set of offset positions. The first set of offset positions and the second set of offset positions interleave each other. The encoder computes distortion values for each of the candidate bi-prediction positions based on several possible weighting parameter values. The distortion values for the center position are based on each of the several possible weighting parameter values. The distortion values for the first set of offset positions are based on a first subset of the possible weighting parameter values. The distortion values for the second set of offset positions are based on a second subset of the possible weighting parameter values.
    Type: Application
    Filed: November 22, 2022
    Publication date: June 22, 2023
    Inventors: Cheng-Yen Chuang, Man-Shu Chiang, Yu-Ling Hsiao, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Patent number: 11680291
    Abstract: The present invention discloses a Polymerase Chain Reaction (PCR) apparatus for real-time detecting of one or more fluorescent signals. According to the apparatus, the PCR is performed by controlling heating and cooling intervals of a reagent container receiving space. With the aid of an added specific probe and fluorescent material, as well as a light source and a spectrometer, a generated fluorescent signal is detected. Meanwhile, the apparatus is also pre-loaded with an algorithm configured to analyze and quantify the fluorescent signal in a real-time manner.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: June 20, 2023
    Assignee: CREDO DIAGNOSTICS BIOMEDICAL PTE, LTD.
    Inventors: Ying-Ta Lai, Yu-Cheng Ou, Chun-Te Wu, Yu-Wen Huang, Han-Yi Chen
  • Publication number: 20230188745
    Abstract: The techniques described herein relate to methods, apparatus, and computer readable media configured to receive compressed video data, wherein the compressed video data is related to a set of frames. A decoder-side predictor refinement technique is used to calculate a new motion vector for a current frame from the set of frames, wherein the new motion vector estimates motion for the current frame based on one or more reference frames. An existing motion vector associated with a different frame from a motion vector buffer is retrieved. The new motion vector is calculated based on the existing motion vector using a decoder-side motion vector prediction technique, such that the existing motion vector is in the motion vector buffer after calculating the new motion vector.
    Type: Application
    Filed: February 10, 2023
    Publication date: June 15, 2023
    Applicant: HFI Innovation Inc.
    Inventors: Tzu-Der Chuang, Ching-Yeh Chen, Chih-Wei Hsu, Yu-Wen Huang
  • Publication number: 20230171403
    Abstract: Video encoding methods and apparatuses include collecting statistics data, determining a matrix and vector representing a set of linear equations, solving the matrix and vector by a novel Gaussian elimination method to derive optimal parameter adjustments for an affine mode or adaptive loop filter coefficients, and encoding the current block by the affine mode or encoding one or more blocks by applying ALF filtering. Embodiments of the novel Gaussian elimination method reduce the critical path of entry operations in each row elimination step from one reciprocal, two multiplication, and one addition operations to one reciprocal, one multiplication, and one addition operations, or one multiplication and one addition operations.
    Type: Application
    Filed: March 23, 2022
    Publication date: June 1, 2023
    Inventors: Shih-Chun CHIU, Tzu-Der CHUANG, Ching-Yeh CHEN, Chun-Chia CHEN, Chih-Wei HSU, Yu-Wen HUANG
  • Patent number: 11659198
    Abstract: Method and apparatus of video coding using decoder derived motion information based on bilateral matching or template matching are disclosed. According to one method, merge index for merge candidate group comprising bilateral matching merge candidate and/or template matching merge candidate are signalled using different codewords. According to another method, the first-stage MV or the first-stage MV pair is used as an only initial MV or MV pair or used as a central MV of search window for second-stage search. According to yet another method, after the reference template for a first reference list is found, the current template is modified for template search in the other reference list. According to yet another method, the sub-PU search is disabled for the template search. According to yet another method, block difference calculation is based on reduced bit depth during MV search associated with the decoder-side MV derivation process.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: May 23, 2023
    Assignee: MEDIATEK INC.
    Inventors: Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Publication number: 20230156234
    Abstract: Video encoding methods and apparatuses include receiving reconstructed video samples, determining an initial clipping setting for ALF coefficients, deriving clipping setting candidates from the initial clipping setting. ALF coefficients for the initial clipping setting and the clipping setting candidates are derived by solving inverse matrices, where partial intermediate results of solving ALF coefficients are shared by two or more clipping settings. A distortion value corresponds to the derived ALF coefficients for each clipping setting is computed, and final clipping indices for final ALF coefficients are determined according to the distortion values. ALF filtering is applied to the reconstructed video samples based on the final ALF coefficients and the final clipping indices.
    Type: Application
    Filed: April 22, 2022
    Publication date: May 18, 2023
    Inventors: Shih-Chun CHIU, Chih-Wei HSU, Ching-Yeh CHEN, Chun-Chia CHEN, Tzu-Der CHUANG, Yu-Wen HUANG
  • Publication number: 20230156181
    Abstract: A video coding method and apparatus include receiving input data associated with a current block, determining a coding mode for the current block by disabling Geometric Partitioning Mode (GPM) when a size of the current block is greater than or equal to a threshold size, and encoding or decoding the current block according to the determined coding mode. In a high-throughput video encoder performing Rate Distortion Optimization (RDO) by parallel Processing Elements (PEs), all or partial PEs receive search range reference samples in a broadcasting form. The parallel PEs test multiple coding modes on various partitioning for the current block, decide a block partitioning structure for dividing the current block into one or more coding blocks, and decide a coding mode for each of the coding blocks.
    Type: Application
    Filed: March 3, 2022
    Publication date: May 18, 2023
    Inventors: Chun-Chia CHEN, Chih-Wei HSU, Tzu-Der CHUANG, Ching-Yeh CHEN, Yu-Wen HUANG
  • Publication number: 20230131291
    Abstract: According to a method for Adaptive Loop Filter (ALF) processing of reconstructed video, multiple indicators are signaled in slice at an encoder side or parsed at a decoder side, where the multiple indicators are Adaptive Parameter Set (APS) indices associated with temporal ALF filter sets for the ALF processing. A current indicator is determined from the multiple indicators, where the current indicator is used to select a current ALF filter set. Filtered-reconstructed pixels are derived for the current block by applying the current ALF filter to the current block. In another method, if the ALF processing applied at a target sample requires an outside sample on other side of a target virtual boundary from the target sample, the outside sample is replaced by a padded sample.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 27, 2023
    Applicant: HFI INNOVATION INC.
    Inventors: Ching-Yeh CHEN, Tzu-Der CHUANG, Yu-Wen HUANG
  • Patent number: 11638027
    Abstract: The techniques described herein relate to methods, apparatus, and computer readable media configured to receive compressed video data, wherein the compressed video data is related to a set of frames. A decoder-side predictor refinement technique is used to calculate a new motion vector for a current frame from the set of frames, wherein the new motion vector estimates motion for the current frame based on one or more reference frames. An existing motion vector associated with a different frame from a motion vector buffer is retrieved. The new motion vector is calculated based on the existing motion vector using a decoder-side motion vector prediction technique, such that the existing motion vector is in the motion vector buffer after calculating the new motion vector.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: April 25, 2023
    Assignee: HFI Innovation, Inc.
    Inventors: Tzu-Der Chuang, Ching-Yeh Chen, Chih-Wei Hsu, Yu-Wen Huang
  • Publication number: 20230119972
    Abstract: Video encoding methods and apparatuses for performing rate-distortion optimization by a hierarchical architecture include receiving input data associated with a current block in a current picture, determining a block partitioning structure to split the current block into coding blocks and determining a corresponding coding mode for each coding block by multiple Processing Element (PE) groups, and entropy encoding the coding blocks in the current block according to the coding modes determined by the PE groups. Each PE group has parallel PEs and is associated with a particular block size. The parallel PEs in each PE group test a number of coding modes on each partition or sub-partition of the current block to derive rate-distortion costs. The block partitioning structure and corresponding coding modes are then decided based on the rate-distortion costs derived by the PE groups.
    Type: Application
    Filed: January 18, 2022
    Publication date: April 20, 2023
    Inventors: Chia-Ming TSAI, Chun-Chia CHEN, Chih-Wei HSU, Tzu-Der CHUANG, Ching-Yeh CHEN, Yu-Wen HUANG
  • Patent number: 11610894
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate, a first inter-level dielectric (ILD) layer above the substrate, and a second ILD layer above the first ILD layer. A first capacitor and a second capacitor are formed within the first ILD layer and the second ILD layer. A first top plate of the first capacitor and a second top plate of the second capacitor are formed at a boundary between the first ILD layer and the second ILD layer. The first capacitor and the second capacitor are separated by a dielectric area in the first ILD layer. The dielectric area includes a first dielectric area that is coplanar with the first top plate or the second top plate, and a second dielectric area above the first dielectric area and to separate the first top plate and the second top plate. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 21, 2023
    Assignee: Intel Corporation
    Inventors: Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang, Jack T. Kavalieros, Bernhard Sell, Tahir Ghani, Gregory George, Akash Garg, Julie Rollins, Allen B. Gardiner, Shem Ogadhoh, Juan G. Alzate Vinasco, Umut Arslan, Fatih Hamzaoglu, Nikhil Mehta, Yu-Wen Huang, Shu Zhou
  • Publication number: 20230065083
    Abstract: Low-latency video coding methods and apparatuses include receiving input data associated with a current Intra slice composed of Coding Tree Units (CTU), where each CTU includes luma and chroma Coding Tree Blocks (CTBs), partitioning each CTB into non-overlapping pipeline units, and encoding or decoding the CTUs in the current Intra slices by performing processing of chroma pipeline units after beginning processing of luma pipeline units in at least one pipeline stage. Each of the pipeline units is processed by one pipeline stage after another pipeline stage, and different pipeline stages process different pipeline units simultaneously. The pipeline stage in the low-latency video coding methods and apparatuses simultaneously processes one luma pipeline unit and at least one previous chroma pipeline unit within one pipeline unit time interval.
    Type: Application
    Filed: December 16, 2021
    Publication date: March 2, 2023
    Inventors: Chia-Ming TSAI, Chun-Chia CHEN, Chih-Wei HSU, Ching-Yeh CHEN, Tzu-Der CHUANG, Yu-Wen HUANG