Patents by Inventor Yu-Yang Chang

Yu-Yang Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7683531
    Abstract: A triode field emission display is provided. It utilizes the electrical characteristics that an edge structure may raise the electric field intensity to expose an edge of a cathode plate through an opening of a gate layer, thereby forming the edge structure at an emitter to raise the electric field intensity. Therefore, reduction of driving voltage is achieved.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: March 23, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Biing-Nan Lin, Cheng-Chung Lee, Yu-Yang Chang, Wei-Yi Lin
  • Patent number: 7662428
    Abstract: A method for increasing the number of carbon nanotubes exposed on the triode structure device of a field emission display uses the technology of casting surface treatment. For advancing the current density and magnitude of CNT emitters, the method of casting surface treatment on the CNT emitters includes the steps of coating an adhesive material on the surface of the device; heating the adhesive material for adhibitting the surface; and lifting the adhesive material off the surface.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: February 16, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Jyh-Rong Sheu, Chun-Tao Lee, Cheng-Chung Lee, Jia-Chong Ho, Yu-Yang Chang
  • Patent number: 7608990
    Abstract: This invention provides an anode plate structure for a flat panel light source of field emission. The structure for the flat panel light source includes an anode plate structure in addition to a known cathode plate structure. The anode plate structure comprises an anode plate and a fluorescent layer formed on the anode plate. The flat panel light source utilizes a cubic-bump structure of the fluorescent layer or a rough surface of the anode plate to increase the lighting areas per unit volume, thereby enhancing the lighting effect of the light source. In the embodiments of the flat panel light source, the rough surface of the anode plate may be formed with a plurality of cubic-bumps, or have a shape of plural concave lenses.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: October 27, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Hung Lin, Yu-Yang Chang, Wei-Yi Lin, Cheng-Chung Lee
  • Patent number: 7594841
    Abstract: A method for fabricating a carbon nanotube field emitter array is disclosed, which has the steps of (a) providing a substrate; (b) forming a cathode layer having a first pattern on the substrate; (c) forming an opaque insulating layer having a second pattern on the substrate, wherein a predetermined part of the cathode layer is exposed; (d) forming a gate layer having the second pattern on the opaque insulating layer; (e) forming a carbon nanotube layer on the entire top surface of the substrate; and (f) exposing the carbon nanotube layer to a light beam coming from the backside of the substrate.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: September 29, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Jyh-Rong Sheu, Ching-Hsun Chao, Liang-You Jiang, Yu-Yang Chang, Cheng-Chung Lee
  • Publication number: 20090039763
    Abstract: An electroluminescent device includes a first electrode layer, a phosphor layer on the first electrode layer, a layer with permanent accumulated charges on the phosphor layer, and a second electrode layer on the layer with permanent accumulated charges. By the addition of the layer with permanent accumulated charges, an external driving voltage applied to the luminescent device can be reduced.
    Type: Application
    Filed: August 4, 2008
    Publication date: February 12, 2009
    Inventors: Yu-Han Chien, Shih-Chieh Hsu, Yu-Yang Chang, Cheng-Chung Lee
  • Patent number: 7471039
    Abstract: A quadrode field emission display is provided, where a low driving voltage is reached by an edge structure, and display in the dark is achieved by adding a sub-gate electrode. With respect to the electrical characteristics that an edge structure may raise the electric field intensity, an edge of a cathode plate through an opening of a gate layer is exposed, thereby forming the edge structure at an emitter to raise the electric field. It also reduces the driving voltage substantially. Therefore, the display in the dark is achieved by adjusting the voltage without changing the structure.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: December 30, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Biing-Nan Lin, Cheng-Chung Lee, Yu-Yang Chang, Wei-Yi Lin
  • Patent number: 7413763
    Abstract: A method of transferring imprint carbon nano-tube (CNT) field emitting source is disclosed. Firstly, cathode lines are screen printed on a substrate. Then a dielectric layer formation on the cathode lines and substrate is followed. Afterward, gate lines formed on the dielectric layer by screen printing are performed. Next a patterning process is carried out to form openings. Subsequently, an imprint negative mold is dipped with CNT paste and imprinted the CNT paste on the cathode lines through the openings. After drawing of pattern from the imprint mold, the CNT paste is cured by annealing. Since the emitting sources are formed through the imprint negative mold, as a result, the size and shape can be predetermined. Moreover, the intervals between gate line and the emitting source are readily control, which resolve the circuit short problem between gate and cathode. Consequently, the current density, brightness, and uniformity of the emitter sources are significantly improved.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: August 19, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Ching-Hsun Chao, Jyh-Rong Sheu, Liang-Yu Chiang, Yu-Yang Chang, Cheng-Chung Lee
  • Publication number: 20080072957
    Abstract: A solar cell unit. The solar cell unit includes a first tubulate structure, an electron transfer layer coated thereon, a second tubulate structure, a metal layer coated thereon, a space formed between the first and second tubulate structures, a dye layer coated on the electron transfer layer, and an electrolyte filled in the space, wherein the diameters of the first and second tubulate structures are different and the electron transfer layer is opposite to the metal layer. The invention also provides a module including a plurality of the solar cell units.
    Type: Application
    Filed: December 26, 2006
    Publication date: March 27, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Yang Chang, Ming-Hung Lin, Bing-Nan Lin, Cheng-Chung Lee
  • Publication number: 20080072954
    Abstract: A method of sealing a solar cell. A first substrate is provided. A semiconductor layer is coated on the first substrate. A second substrate is provided. A metal layer is coated on the second substrate. The first and second substrates are assembled to form a space therebetween, wherein the semiconductor layer is opposite to the metal layer. The air is removed from the space to achieve a vacuum such that a dye solution is refilled thereto. An electrolyte is filled in the space. The space is sealed.
    Type: Application
    Filed: February 8, 2007
    Publication date: March 27, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Yang Chang, Wei-Yi Lin, Ming-Chun Hsiao, Cheng-Chung Lee
  • Publication number: 20080057255
    Abstract: A recordable medium includes an inscription layer and at least one contrast inverting layer. The inscription layer has at least a first sub-layer and a second sub-layer that combine upon application of a write power. The inscription layer has a reflectivity R1 with respect to a read beam before application of the write power and a reflectivity R2 after application of the write power, and R1<R2. The at least one contrast inverting layer does not combine with the first and second sub-layers of the inscription layer upon application of the write power. The at least one contrast inverting layer and the inscription layer together have a reflectivity R3 before application of the write power and a reflectivity R4 after application of the write power, and R3>R4.
    Type: Application
    Filed: October 20, 2005
    Publication date: March 6, 2008
    Applicant: Lanyo Technology Co., Ltd.
    Inventors: Geoffrey Shuy, Cheng-Ji Lu, Hsin-Cheng Lai, Fang-Yu Lee, Yu-Yang Chang
  • Publication number: 20080024048
    Abstract: A field emission device comprising a first substrate, a second substrate spaced apart from the first substrate, a first metal layer on the first substrate, the first metal layer including a number of first metal lines, a second metal layer over the first metal layer, the second metal layer including a number of second metal lines, emitters over the first metal layer, the emitters being configured to emit electrons toward the second substrate, a luminescent layer between the first substrate and the second substrate, the luminescent layer being configured to provide light when the electrons impinge thereon, and a third metal layer between the second substrate and the luminescent layer, the third metal layer being configured to reflect the light from the luminescent layer toward the first substrate, wherein the first metal lines are substantially parallel to the second metal lines.
    Type: Application
    Filed: September 19, 2007
    Publication date: January 31, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Chung LEE, Yu-Yang CHANG, Ming-Hung LIN, Bing-Nan LIN
  • Patent number: 7322869
    Abstract: A structure of a coplanar gate-cathode of triode CNT-FED and a manufacturing method thereof by Imprint Lithography and ink jet. The structure includes a substrate, a plurality of cathode layers, a plurality of gate extended layers, a plastic dielectric layer, a plurality of dielectric openings, and a plurality of gate electrodes. The plurality of cathode layers and the plurality of gate extended layers are coplanar, and formed on the substrate by Imprint Lithography and the plurality of dielectric openings are made by Imprint Lithography. The gate electrode, made by ink jet or screen print, can be extended through the plastic dielectric layer to the gate extended electrode to feature the coplanar gate-cathode.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: January 29, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Ching-Hsun Chao, Jane-Hway Liao, Jyh-Rong Sheu, Yu-Yang Chang, Cheng-Chung Lee
  • Patent number: 7304424
    Abstract: An anode plate for a field emission display device (FED) is disclosed, which has a substrate; an anode conductive layer formed on the substrate; at least one interspacing conductive band having a plurality of internal gaps for connecting the anode conductive layer and external cable lines, wherein the interspacing conductive band covers a part of the anode conductive layer; and a fluorescent layer located on the anode conductive layer, to serve as a source of luminescence for a field emission display device. The field emission display device includes the anode plate aforesaid as is also disclosed.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: December 4, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Ying-Hsien Cheng, Cheng-Chung Lee, Wen-Kuei Huang, Wei-Yi Lin, Jia-Chong Ho, Yu-Yang Chang, Ming-Chun Hsiao, Yun-Chiao Hsiao
  • Publication number: 20070264478
    Abstract: Substrate structures for display devices and fabrication methods thereof The substrate structure comprises a substrate, an interfacial layer disposed on the substrate, and a patterned paste layer applied on the interfacial layer, wherein a contact angle of the interface between the patterned paste layer and the interfacial layer exceeds 35 degrees.
    Type: Application
    Filed: September 22, 2006
    Publication date: November 15, 2007
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jane-Hway Liao, Wei-Ling Lin, Yu-Yang Chang
  • Publication number: 20070164648
    Abstract: A method for fabricating a cathode plate of a field emission display is disclosed. A patterned electrode layer is formed on a surface of the substrate, and emitters for absorbing a light source are formed on the patterned electrode layer. Next, a dielectric layer is formed over the substrate, and a patterned gate layer is formed on the dielectric layer. Thereafter, a backside exposure process is carried out using the emitters as a mask, and portions of the dielectric layer not masked by the emitters react with a light used in the backside exposure process. Next, portions of the dielectric layer not exposed to the light and portions of the gate layer are removed to form via holes and gate holes.
    Type: Application
    Filed: March 21, 2006
    Publication date: July 19, 2007
    Inventors: Liang-You Jiang, Yu-Yang Chang, Lih-Hsiung Chan
  • Publication number: 20070161261
    Abstract: Methods for fabricating carbon nano-tube (CNT) powders and field emission display devices. Carbon nano-tube powders are deposited and gathered in a vacuum chamber. A physical surface treatment is performed on the carbon nano-tube powders. The carbon nano-tube powders are mixed into a paste and screen printed on a substrate, wherein the physical surface treatment comprises laser radiation, ion-beam bombardment, high energy particle bombardment, or electron-beam bombardment.
    Type: Application
    Filed: July 24, 2006
    Publication date: July 12, 2007
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Lih-Hsiung Chan, Yau-Chen Jiang, Liang-You Jiang, Yu-Yang Chang
  • Publication number: 20070159059
    Abstract: An anode plate for a field emission display device (FED) is disclosed, which has a substrate; an anode conductive layer formed on the substrate; at least one interspacing conductive band having a plurality of internal gaps for connecting the anode conductive layer and external cable lines, wherein the interspacing conductive band covers a part of the anode conductive layer; and a fluorescent layer located on the anode conductive layer, to serve as a source of luminescence for a field emission display device. The field emission display device includes the anode plate aforesaid as is also disclosed.
    Type: Application
    Filed: February 20, 2007
    Publication date: July 12, 2007
    Applicant: Industrial Technology Research Institute
    Inventors: Ying-Hsien Chen, Cheng-Chung Lee, Wen-Kuei Huang, Wei-Yi Lin, Jia-Chong Ho, Yu-Yang Chang, Ming-Chun Hsiao, Yun-Chiao Hsiao
  • Publication number: 20070092682
    Abstract: A recordable medium includes an inscription layer and at least one contrast inverting layer. The inscription layer has at least a first sub-layer and a second sub-layer that combine upon application of a write power. The inscription layer has a reflectivity R1 with respect to a read beam before application of the write power and a reflectivity R2 after application of the write power, and R1<R2. The at least one contrast inverting layer does not combine with the first and second sub-layers of the inscription layer upon application of the write power. The at least one contrast inverting layer and the inscription layer together have a reflectivity R3 before application of the write power and a reflectivity R4 after application of the write power, and R3>R4.
    Type: Application
    Filed: October 20, 2005
    Publication date: April 26, 2007
    Inventors: Geoffrey Shuy, Cheng-Ji Lu, Hsin-Cheng Lai, Fang-Yu Lee, Yu-Yang Chang
  • Publication number: 20070049154
    Abstract: A method of fabricating a field emission display device and a cathode plate thereof is provided. By using a sandblasting process, an electrode layer on the cathode plate is patterned and a portion of the substrate fogged up to produce light diffusion effects. Since the electrodes and the light diffusion layer are formed in the same step, the process of fabricating the cathode plate is simplified.
    Type: Application
    Filed: September 8, 2005
    Publication date: March 1, 2007
    Inventors: Yu-Yang Chang, Wei-Yi Lin, Kwan-Sin Ho, Te-Hao Tsou
  • Publication number: 20070046866
    Abstract: A field emission display module. A white field emission display (FED) comprises a plurality of dots (pixels) arranged in matrix, generating different gray levels according to external display data. A color filter display is disposed on the white field emission display, generating color images with the gray levels generated by the white field emission display.
    Type: Application
    Filed: November 18, 2005
    Publication date: March 1, 2007
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Chung Lee, Yu-Yang Chang, Liang-You Jiang, Yau-Chen Jiang, Lih-Hsiung Chan