Patents by Inventor Yu Yang

Yu Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240004913
    Abstract: In an approach for using an open source of existing text labeling models to label sentences that need to be clustered with multiple external tags and then to use the tags as auxiliary information to perform the clustering at a dual level, a processor receives a set of text, wherein the set of text contains one or more sentences. A processor tags each sentence of the set of text with one or more tags using a plurality of open-source text classification models. A processor performs a preliminary clustering of one or more nodes under strict conditions using a canopy clustering algorithm.
    Type: Application
    Filed: June 29, 2022
    Publication date: January 4, 2024
    Inventors: Zhong Fang Yuan, Tong Liu, Wen Wang, Li Juan Gao, Xiang Yu Yang
  • Publication number: 20240004374
    Abstract: A fault detection method comprises the following steps. Receiving a first original sequence comprising a plurality of first data. Receiving a second original sequence comprising a plurality of second data. Aligning the first original sequence with the second original sequence according to trends of value changing of the first data and the second data. Performing an average operation on the aligned first original sequence and second original sequence to establish a standard sequence. Performing a difference operation between the first original sequence and the standard sequence to obtain a first total difference value. Performing a difference operation between the second original sequence and the standard sequence to obtain a second total difference value. When the first total difference value and/or the second total difference value is greater than an upper limit value, determining that the first original sequence and/or the second total difference value is abnormal.
    Type: Application
    Filed: July 27, 2022
    Publication date: January 4, 2024
    Inventors: Yung-Yu YANG, Kang-Ping LI, Chih-Kuan CHANG, Chung-Chih HUNG, Chen-Hui HUANG, Nai-Ying LO, Shih-Wei HUANG
  • Patent number: 11863368
    Abstract: Embodiments of this application provide a method for subscribing to event streams. The method includes: A first device generates a first message used to subscribe to event streams, where the first message includes a group identifier, and the group identifier corresponds to a plurality of event streams; and the first device sends the first message to a second device, to obtain data of the plurality of event streams corresponding to the group identifier.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: January 2, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jianbing Wang, Xiaopeng Qin, Yu Yang, Qin Wu
  • Patent number: 11858918
    Abstract: The present disclosure provides GLP-1R agonists, and compositions, methods, and kits thereof. Such compounds are generally useful for treating a GLP-1R mediated disease or condition in a human.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: January 2, 2024
    Assignee: GILEAD SCIENCES, INC.
    Inventors: Megan K. Armstrong, James S. Cassidy, Elbert Chin, Chienhung Chou, Jeromy J. Cottell, Chao-I Hung, Kavoos Kolahdouzan, David W. Lin, Michael L. Mitchell, Ezra Roberts, Scott D. Schroeder, Nathan D. Shapiro, James G. Taylor, Rhiannon Thomas-Tran, Nathan E. Wright, Zheng-Yu Yang
  • Patent number: 11860227
    Abstract: A delay estimation system estimates a delay of a DUT for an emulation system. The delay estimation system receives logic blocks of the DUT and a combinatorial path connecting one or more of the logic blocks. The system applies a delay model to a feature vector representing the combinatorial path, where the delay model can determine a delay of the combinatorial path. The delay model may be a machine learning model. The system generates a timing graph using the determined delay and provides the timing graph to a compiler to perform placement and routing of the DUT.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: January 2, 2024
    Assignee: Synopsys, Inc.
    Inventors: Yanhua Yi, Yu Yang, Jiajun Fan, Vinod Kumar Nakkala, Vijay Sundaresan, Jianfeng Huang
  • Publication number: 20230419163
    Abstract: Training data models using machine learning can include training a computer data model of data distribution using a training data set. The training data set includes training data and additional training data, and the training data and the additional training data being represented by layers of data representing the data distribution of the training data set. The computer data model using the additional training data is iteratively trained for each of the layers of the training data set. Statistical noise is added randomly to each of the layers of the training data set. Data variations are detected in each of the layers of the additional training data. The data variations are diluted in each of the additional layers of the training data, and the computer data model is retrained for the training data set using the diluted data variations in each of the layers of the additional training data.
    Type: Application
    Filed: June 28, 2022
    Publication date: December 28, 2023
    Inventors: Zhong Fang Yuan, Tong Liu, Wen Wang, Xiang Yu Yang, Cheng Gang Hu
  • Publication number: 20230419077
    Abstract: A computer-implemented process for modifying a training dataset includes the following operations. The training dataset is benchmarked using a State Of The Art (SOTA) neural network to determine a benchmark for the training dataset. The training set is divided into a plurality of slices. A sequence of a plurality of atomic operations are selected using a selection strategy generator operating on one of the plurality of slices. The sequence of the plurality of atomic operations is applied to modify the one of the plurality of slices to generate a revised one of the plurality of slices. Reverse reinforcement learning is performed on the revised one of the plurality of slices using the benchmark and the SOTA neural network. The training dataset is modified by replacing the one of the plurality of slices with the revised one of the plurality of slices to generate a modified training dataset.
    Type: Application
    Filed: June 23, 2022
    Publication date: December 28, 2023
    Inventors: Zhong Fang Yuan, Tong Liu, Wen Wang, Hai Bo Zou, Xiang Yu Yang
  • Publication number: 20230421802
    Abstract: An embodiment of an adaptive video encoder may include technology to determine headset-related information including at least one of focus-related information and motion-related information, and determine one or more video encode parameters based on the headset-related information. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: June 30, 2023
    Publication date: December 28, 2023
    Applicant: Intel Corporation
    Inventors: Yunbiao Lin, Changliang Wang, Ce Wang, Yongfa Zhou, Bo Zhao, Ping Liu, Jianwei Yang, Zhan Lou, Yu Yang, Yating Wang, Wenyi Tang, Bo Qiu
  • Patent number: 11855174
    Abstract: A high electron mobility transistor (HEMT) includes a substrate, a channel layer disposed on the substrate, a barrier layer disposed on the channel layer, a first passivation layer disposed on the barrier layer, a plurality of trenches through at least a portion of the first passivation layer, and a conductive plate structure disposed on the first passivation layer. The conductive plate structure includes a base portion over the trenches and a plurality of protruding portions extending from a lower surface of the base portion and into the trenches.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: December 26, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Yu Yang, Hsun-Wen Wang
  • Patent number: 11854942
    Abstract: A semiconductor arrangement includes a first dielectric feature passing through a semiconductive layer and a first dielectric layer over a substrate. The semiconductor arrangement includes a conductive feature passing through the semiconductive layer and the first dielectric layer and electrically coupled to the substrate. The conductive feature is adjacent the first dielectric feature and electrically isolated from the semiconductive layer by the first dielectric feature.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Josh Lin, Chung-Jen Huang, Yun-Chi Wu, Tsung-Yu Yang
  • Patent number: 11851419
    Abstract: The present disclosure provides GLP-1R agonists, and compositions, methods, and kits thereof. Such compounds are generally useful for treating a GLP-1R mediated disease or condition in a human.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: December 26, 2023
    Assignee: Gilead Sciences, Inc.
    Inventors: Gediminas J. Brizgys, James S. Cassidy, Chienhung Chou, Jeromy J. Cottell, Chao-I Hung, Kavoos Kolahdouzan, James G. Taylor, Nathan E. Wright, Zheng-Yu Yang
  • Patent number: 11856743
    Abstract: A method includes etching a first semiconductor fin and a second semiconductor fin to form first recesses. The first and the second semiconductor fins have a first distance. A third semiconductor fin and a fourth semiconductor fin are etched to form second recesses. The third and the fourth semiconductor fins have a second distance equal to or smaller than the first distance. An epitaxy is performed to simultaneously grow first epitaxy semiconductor regions from the first recesses and second epitaxy semiconductor regions from the second recesses. The first epitaxy semiconductor regions are merged with each other, and the second epitaxy semiconductor regions are separated from each other.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Hsuan Lee, Chia-Ta Yu, Cheng-Yu Yang, Sheng-Chen Wang, Sai-Hooi Yeong, Feng-Cheng Yang, Yen-Ming Chen
  • Patent number: 11855071
    Abstract: Devices and methods of manufacture for a deep trench layout area-saving semiconductor structure for use with bipolar-CMOS-DMOS (BCD) devices. A semiconductor device may comprise a first BCD device formed within a first perimeter of a first BCD layout area, and a deep trench isolation structure defining the first perimeter of the first BCD layout area, in which the deep trench isolation structure may comprise a first rounded corner that may define a first corner of the first BCD layout area. A semiconductor device may comprise, a substrate, BCD device formed on the substrate, and a deep trench isolation structure laterally surrounding the BCD device. The deep trench isolation structure, with respect to a top-down view, may comprise vertical portions, horizontal portions, a “T”-shaped intersection connecting at least one vertical portion and at least one horizontal portion, and a cross-shaped intersection connecting two vertical portions and two horizontal portions.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Tsung-Yu Yang, Po-Wei Liu
  • Patent number: 11855734
    Abstract: The present disclosure provides a beam failure processing method and a related device. The method includes: determining, based on a beam failure detection reference signal BFD RS resource group, whether a beam failure occurs in a first cell group, where the BFD RS resource group is configured in a first cell group; and sending a beam failure recovery request message to a network side device in a case that a beam failure occurs in the first cell group.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: December 26, 2023
    Assignee: VIVO MOBILE COMMUNICATION CO., LTD.
    Inventors: Yu Yang, Peng Sun
  • Publication number: 20230405766
    Abstract: A method of making a coated abrasive article includes disposing a precursor make layer on a major surface of the backing, optionally partially curing the precursor make layer to provide a partially cured precursor make layer, disposing abrasive particles; partially embedding abrasive particles in the optionally partially cured precursor make layer; and further curing the optionally partially cured precursor make layer to form a make layer. The precursor make layer comprises components comprising: a) 50 to 97.99 percent by weight of phenol-formaldehyde resin; b) 1 to 49 percent by weight of resorcinol-formaldehyde resin; c) 1 to 49 percent by weight of at least one compound having at least one free-radically polymerizable group; and d) 0.01 to 1 percent by weight of a free-radical initiator. A size layer and/or supersize layer may be disposed over the make layer and abrasive articles. Coated abrasive articles made by the method are also disclosed.
    Type: Application
    Filed: September 22, 2021
    Publication date: December 21, 2023
    Inventors: Junting Li, Yu Yang, Jing Zhang, Michael J. Annen, Ernest L. Thurber, Eric W. Nelson, Mark A. Lukowski, Chunjie Zhang
  • Publication number: 20230408437
    Abstract: The present disclosure provides an electrochemical system, including an electrode unit and a reactive unit electrically coupled to the electrode unit. The electrode unit includes a working electrode and a counter electrode, wherein a current density of the counter electrode is greater than a current density of the working electrode. An implantable biochemical test chip is also provided.
    Type: Application
    Filed: December 21, 2022
    Publication date: December 21, 2023
    Inventors: CHEN-YU YANG, CHIH-LIANG YANG
  • Patent number: 11848628
    Abstract: A flexible clean energy power generation device with high power efficiency, which is a multi-film structure, includes an internal conductive support layer and an ion transport layer. The internal conductive support layer is formed by coating a conductive material onto a hydrophilic substrate; the ion transport layer is formed by coating a polyelectrolyte onto an outer side of the internal conductive support layer. After a solution is dropped on the device, the solution produces a capillary pressure difference by capillary action and evaporation phenomena to drive water molecules and counterions of the solution to move from a wet side to a dry side, thus producing a potential difference. Without an external pressure, the device uses a layered two-dimensional conductive material together with a polyelectrolyte, realizing a self-electrokinetic power generation with high energy output and long-life by capillary action and evaporation phenomena with using pure aqueous solution or other electrolyte solutions.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: December 19, 2023
    Assignee: NATIONAL TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Li-Hsien Yeh, Mengyao Gao, Jie-Yu Yang
  • Patent number: 11848847
    Abstract: An example operation may include one or more of monitoring a plurality of brokers within a cluster to identify current workload attributes of the plurality of brokers, determining a health value of a lead broker within the cluster via execution of a machine learning model on current workload attributes of the lead broker, determining to modify resources assigned to the lead broker based on the determined health value of the lead broker, executing an optimization algorithm on the current workload attributes of the plurality of brokers within the cluster to determine an optimum task distribution, and reallocating tasks amongst the lead broker and the one or more other brokers within the cluster based on the optimum task distribution.
    Type: Grant
    Filed: October 11, 2022
    Date of Patent: December 19, 2023
    Assignee: International Business Machines Corporation
    Inventors: Jun Guo, Yong Wang, Deng Xin Luo, Xiang Yu Yang, Jia Wei He
  • Patent number: 11841724
    Abstract: A module level power electronics (MLPE) photovoltaic system and a method for photovoltaic string control are provided. The method is applied to a control unit in the MLPE photovoltaic system. The control unit detects an output current of each photovoltaic string in the MLPE photovoltaic system, and then controls, for photovoltaic strings connected in parallel to a same inverter in the MLPE photovoltaic system, a voltage of a photovoltaic string with larger output current to be reduced, or controls a voltage of a photovoltaic string with smaller output current to be increased, so that backflow current can be reduced to preset range tolerable for MLPE device. The method is from a perspective of the MLPE photovoltaic system, the backflow current is limited by controlling voltage change of associated photovoltaic string without additional hardware cost, effectively protecting MLPE device in the MLPE photovoltaic system.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: December 12, 2023
    Assignee: Sungrow Power Supply Co., Ltd.
    Inventors: Yu Yang, Yuqi Peng, Jun Xu
  • Publication number: 20230391747
    Abstract: The present disclosure provides GLP-1R agonists, and compositions, methods, and kits thereof. Such compounds are generally useful for treating a GLP-1R mediated disease or condition in a human.
    Type: Application
    Filed: May 10, 2023
    Publication date: December 7, 2023
    Inventors: Stephen E. Ammann, Gediminas J. Brizgys, James S. Cassidy, Elbert Chin, Chienhung Chou, Jeromy J. Cottell, Michael Graupe, Chao-I Hung, Kavoos Kolahdouzan, Scott D. Schroeder, Nathan D. Shapiro, Daniel G. Shore, Suzanne M. Szewczyk, James G. Taylor, Rhiannon Thomas-Tran, Nathan E. Wright, Zheng-Yu Yang, Sheila M. Zipfel