Patents by Inventor Yuan Cheng

Yuan Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11793816
    Abstract: Disclosed are methods and compositions for treating cell proliferative diseases and disorders such as cancers. Particularly disclosed are methods and composition for treating cancers such as glioblastoma by administering a therapeutic agent that inhibits the biological activity of the autophagy related 4B cysteine peptidase (ATG4B) protein in conjunction with additional therapeutic agents or treatments.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: October 24, 2023
    Assignee: Northwestern University
    Inventors: Shi-Yuan Cheng, Bo Hu, Tianzhi Huang
  • Publication number: 20230326842
    Abstract: A chip package and method for fabricating the same are provided that includes a power delivery network (PDN) with non-uniform electrical conductance. The electrical conductance through each current path of the PDN may be selected to balance the distribution of current flow across the current paths through the chip package, thus compensating for areas of high and low current draw found in conventional designs.
    Type: Application
    Filed: April 11, 2022
    Publication date: October 12, 2023
    Inventors: Li-Sheng WENG, Chun-Yuan CHENG, Chao-Chin LEE
  • Patent number: 11782428
    Abstract: A transport system is provided. The transport system includes a stocker configured to store an assigned wafer carrier and having a gate port. The transport system also includes a semiconductor apparatus configured to transmit a request signal including a processed time according to a processing wafer carrier loaded on the semiconductor apparatus. The transport system further includes a vehicle configured to transport the assigned wafer carrier from the gate port to the semiconductor apparatus and a control system configured to control the vehicle. When the control system receives the request signal, the control system controls the stocker to transport the assigned wafer carrier inside of the stocker to the gate port at a start time, which is earlier than the processed time, and the control system controls the vehicle to transport the assigned wafer carrier from the gate port to the semiconductor apparatus.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: October 10, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Pin Huang, Wen-Chi Chien, Yuh-Dean Tsai, Bing-Yuan Cheng
  • Patent number: 11769662
    Abstract: Embodiments are directed to a method for minimizing electrostatic charges in a semiconductor substrate. The method includes depositing photoresist on a semiconductor substrate to form a photoresist layer on the semiconductor substrate. The photoresist layer is exposed to radiation. The photoresist layer is developed using a developer solution. The semiconductor substrate is cleaned with a first cleaning liquid to wash the developer solution from the photoresist layer. A tetramethylammonium hydroxide (TMAH) solution is applied to the semiconductor substrate to reduce charges accumulated in the semiconductor substrate.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: September 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Lin Chang, Chih-Chien Wang, Chihy-Yuan Cheng, Sz-Fan Chen, Chien-Hung Lin, Chun-Chang Chen, Ching-Sen Kuo, Feng-Jia Shiu
  • Publication number: 20230299196
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a source region and a drain region arranged over and/or within a substrate. Further, a shallow trench isolation (STI) structure is arranged within the substrate and between the source and drain regions. A gate electrode is arranged over the substrate, over the STI structure, and between the source and drain regions. A portion of the gate electrode extends into the STI structure such that a bottommost surface of the portion of the gate electrode is arranged between a topmost surface of the STI structure and a bottommost surface of the STI structure.
    Type: Application
    Filed: May 26, 2023
    Publication date: September 21, 2023
    Inventors: Yuan-Cheng Yang, Yun-Chi Wu, Shih-Jung Tu
  • Publication number: 20230297754
    Abstract: An integrated circuit includes a first active region of a first set of transistors of a first type, a second active region of a second set of transistors of the first type, a third active region of a third set of transistors of the first type, a fourth active region of a fourth set of transistors of the first type and a fifth active region of a fifth set of transistors of a second type. The first, second, fourth and fifth active region have a first width in a second direction, and are on a first level. The third active region is on the first level, and has a second width different from the first width. The second active region is adjacent to the first boundary, and is separated from the first active region in the second direction. The fourth active region is adjacent to the second boundary.
    Type: Application
    Filed: May 15, 2023
    Publication date: September 21, 2023
    Inventors: Po-Sheng WANG, Chao Yuan CHENG, Chien-Chi TIEN, Yangsyu LIN
  • Publication number: 20230290704
    Abstract: A package structure includes first and second package components, an underfill layer disposed between the first and second package components, and a metallic layer. The first package component includes semiconductor dies, a first insulating encapsulation laterally encapsulating the semiconductor dies, and a redistribution structure underlying first surfaces of the semiconductor dies and the first insulating encapsulation. The second package component underlying the first package component is electrically coupled to the semiconductor dies through the redistribution structure. The underfill layer extends to cover a sidewall of the first package component, the metallic layer overlying second surfaces of the semiconductor dies and the first insulating encapsulation, and a peripheral region of the second surface of the first insulating encapsulation is accessibly exposed by the metallic layer, where the first surfaces are opposite to the second surfaces.
    Type: Application
    Filed: March 14, 2022
    Publication date: September 14, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Po-Yuan Cheng, Pu Wang, Li-Hui Cheng
  • Publication number: 20230284403
    Abstract: The present invention discloses a smart clothing and its device mount, wherein the device mount includes an upper casing and a lower casing, a circuit board is arranged between the upper casing and the lower casing, and a metal contact of the top surface of the circuit board penetrates through the upper casing to form a plurality of metal contact points, and the cable interface of the bottom surface of the circuit board passes through the lower casing, and the bottom surface of the lower casing is formed with individual cable grooves toward each cable interface for guiding the transmission wire to insert into the cable interface along the cable groove, and the device mount is combined with a soft gasket on the clothing body and is equipped with a waterproof protective layer to avoid damage to the circuit components and transmission wire during cleaning; when the device mount is installed with the electronic device, the motion status can be monitored.
    Type: Application
    Filed: May 20, 2022
    Publication date: September 7, 2023
    Inventors: Wen-Sung FAN, Kai-Yuan CHENG, Chih-Wei TU, Pei-Wen LIAO, Ming-Hui YAO, Tzong-Yow HO
  • Patent number: 11747099
    Abstract: A device implementable on a firearm includes a monolithic upper receiver, comprising an upper receiver portion and a handguard portion, which is configured to accommodate non-proprietary barrel assemblies dimensioned according to United States military standard (mil-spec) barrel assembly dimensions and non-proprietary bolt carrier groups (BCGs) dimensioned according to mil-spec BCG dimensions. The device also includes a charging handle assembly configured to be coupled to an operating rod of a gas system of the firearm and forward of a BCG of the firearm. The device further includes a barrel locking system including a locking plate and a locking screw. When the locking screw is screwed into a threaded hole on the locking plate, the locking plate engages with a side of a barrel extension of the barrel assembly in a radial directions perpendicular to a longitudinal axis of the barrel assembly.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: September 5, 2023
    Assignee: Strike IP, LLC
    Inventors: Shanyao Lee, Chien Yuan Cheng
  • Patent number: 11740047
    Abstract: A firearm muzzle attachment mechanism includes a muzzle device; a tapering adapter having an outer tapering end configured to connect with the muzzle device; a hollow adapter having an internally threaded portion and configured to receive the muzzle device; a muzzle attachment having an inner tapering end configured to connect with the outer tapering end of the tapering adapter; and a means for providing tension being received in a receiving slot formed on the muzzle attachment.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: August 29, 2023
    Inventors: Shanyao Lee, Chien-Yuan Cheng
  • Patent number: 11732266
    Abstract: The present invention relates to RNAi constructs for reducing expression of the ASGR1 gene. Methods of using such RNAi constructs to treat or prevent cardiovascular disease, such as coronary artery disease and myocardial infarction, and to reduce serum non-HDL cholesterol levels are also described.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: August 22, 2023
    Assignee: AMGEN INC.
    Inventors: Michael Ollmann, Yang Li, Jun Zhang, Oliver Homann, Leslie P. Miranda, Justin K. Murray, Bin Wu, Oh Kyu Yoon, John Gordon Allen, Chawita Netirojjanakul, Yuan Cheng
  • Publication number: 20230245865
    Abstract: A processing chamber includes a grid and a first disk. The grid includes a plurality of holes arranged in the processing chamber. The grid partitions the processing chamber into a first chamber in which plasma is generated and a second chamber in which a pedestal is configured to support a substrate. The first disk is arranged in the second chamber. The first disk is movable between the grid and the substrate when supported on the pedestal.
    Type: Application
    Filed: May 17, 2022
    Publication date: August 3, 2023
    Inventors: Chih-Min LIN, Shuogang HUANG, Seokmin YUN, Chih-Yang CHANG, Chih-Ming CHANG, Shih-Yuan CHENG
  • Publication number: 20230240018
    Abstract: An electronic device, including a circuit board and a back plate, is provided. The circuit board has a first opening. The back plate includes a bottom portion, a protruding portion, and a column. The protruding portion protrudes from the bottom portion, and the column is located on the protruding portion. In a first direction, the column has a first outer diameter and a second outer diameter. A first width of the first opening is less than the first outer diameter and greater than the second outer diameter to limit the movement of the circuit board. The electronic device of the disclosure limits the movement of the circuit board through the column of the back plate, so as to reduce the number of screws used, thereby achieving the effects of reducing costs and/or reducing man-hours for locking the screws.
    Type: Application
    Filed: December 22, 2022
    Publication date: July 27, 2023
    Applicant: Innolux Corporation
    Inventors: Wen-Hung Lee, Hsin-Cheng Chen, Yuan-Cheng Liu, Meng-Syuan Wu
  • Publication number: 20230239793
    Abstract: A method for supporting Sidelink (SL) Discontinuous Reception (DRX) operation is provided. A User Equipment (UE) maintains SL DRX configuration which includes one of a transmission pattern and a reception pattern that the UE expects to perform transmission and reception to a peer UE. The UE exchanges the SL DRX configuration with the peer UE. Based on the exchange of the SL DRX configuration, the UE determines when to perform transmission or reception to or from the peer UE during an SL DRX operation. Based on the determination, the UE performs transmission or reception to or from the peer UE during the SL DRX operation.
    Type: Application
    Filed: August 3, 2021
    Publication date: July 27, 2023
    Inventors: Guan-Yu LIN, Tao CHEN, Ahmet Umut UGURLU, Ming-Yuan CHENG
  • Patent number: 11701424
    Abstract: Anti-PVRIG and anti-TIGIT antibodies are provided.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: July 18, 2023
    Assignee: COMPUGEN LTD.
    Inventors: Mark White, Sandeep Kumar, Christopher Chan, Spencer Liang, Lance Stapleton, Andrew W. Drake, Yosi Gozlan, Ilan Vaknin, Shirley Sameah-Greenwald, Liat Dassa, Zohar Tiran, Gad S. Cojocaru, Maya Kotturi, Hsin-Yuan Cheng, Kyle Hansen, David Nisim Giladi, Einav Safyon, Eran Ophir, Leonard Presta, Richard Theolis, Radhika Desai, Patrick Wall
  • Patent number: 11705761
    Abstract: A wireless charging transmit end includes a dual-polarized antenna which includes at least one dual-polarized element and a signal processing apparatus. Each dual-polarized element includes a first linearly polarized element and a second linearly polarized element that are mutually orthogonal and respectively receive a first wireless signal and a second wireless signal from the receive end. The signal processing apparatus obtains a first energy signal and a second energy signal based on a waveform relationship between the first wireless signal and the second wireless signal. The first energy signal is sent to the receive end by the first linearly polarized element, and the second energy signal is sent to the receive end by the second linearly polarized element. The first energy signal and the second energy signal are combined into an energy signal matching the receive end.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: July 18, 2023
    Assignee: Huawei Digital Power Technologies Co., Ltd.
    Inventors: Yuan Cheng, Zhiwei Leng, Haijun Qin
  • Patent number: 11705515
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a source region and a drain region arranged over and/or within a substrate. Further, a shallow trench isolation (STI) structure is arranged within the substrate and between the source and drain regions. A gate electrode is arranged over the substrate, over the STI structure, and between the source and drain regions. A portion of the gate electrode extends into the STI structure such that a bottommost surface of the portion of the gate electrode is arranged between a topmost surface of the STI structure and a bottommost surface of the STI structure.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: July 18, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yuan-Cheng Yang, Yun-Chi Wu, Shih-Jung Tu
  • Publication number: 20230214795
    Abstract: a virtual currency automatic exchange method of virtual currency teller machine, adopted to an operator to buy/sell at least one kind of virtual currency through a mobile processing device and import/export a cash corresponding to the virtual currency to the operator, wherein the virtual currency teller machine has a mining machine for hash operations or other accounting and operations to obtain and store the virtual currency, a connection interface unit and a processing unit, wherein the processing unit is signally connected to the mining machine and the connection interface unit, comprising the steps of: (a) connecting the connection interface unit with the mobile processing device; (b) the processing unit determining whether the virtual currency can be bought/sold; and (c) the processing unit controlling the mining machine to transfer out/in the virtual currency and receive/pay to the cash if yes.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 6, 2023
    Applicant: NuMiner Technologies Ltd.
    Inventor: YUAN-CHENG HSU
  • Publication number: 20230213306
    Abstract: A firearm launcher for holding a projectile includes a launcher body attached to a firearm barrel; and a tension member cooperated with the launcher body. In one embodiment, the tension member is connected with the projectile.
    Type: Application
    Filed: January 5, 2022
    Publication date: July 6, 2023
    Applicant: Strike IP, LLC
    Inventors: Shanyao Lee, Chien-Yuan Cheng
  • Publication number: 20230196595
    Abstract: Medical imaging systems, methods, and devices are disclosed herein. In some embodiments, an imaging system includes (i) a camera array configured to capture intraoperative image data of a surgical scene in substantially real-time and (ii) a processing device communicatively coupled to the camera array. The processing device can be configured to synthesize a three-dimensional (3D) image corresponding to a virtual perspective of the scene based on the intraoperative image data from the cameras. The imaging system is further configured to receive and/or store initial image data, such as medical scan data corresponding to a portion of a patient in the scene. The processing device can register the initial image data to the intraoperative image data, and overlay the registered initial image data over the corresponding portion of the 3D image of the scene to present a mediated-reality view.
    Type: Application
    Filed: December 19, 2022
    Publication date: June 22, 2023
    Inventors: Robert Bruce Grupp, JR., Samuel R. Browd, James Andrew Youngquist, Nava Aghdasi, Theodores Lazarakis, Tze-Yuan Cheng, Adam Gabriel Jones