Patents by Inventor Yuan-Chih Hsieh

Yuan-Chih Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140103462
    Abstract: A method includes forming a Micro-Electro-Mechanical System (MEMS) device on a front surface of a substrate. After the step of forming the MEMS device, a through-opening is formed in the substrate, wherein the through-opening is formed from a backside of the substrate. The through-opening is filled with a dielectric material, which insulates a first portion of the substrate from a second portion of the substrate. An electrical connection is formed on the backside of the substrate. The electrical connection is electrically coupled to the MEMS device through the first portion of the substrate.
    Type: Application
    Filed: December 18, 2013
    Publication date: April 17, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Te-Hao Lee, Yuan-Chih Hsieh
  • Publication number: 20140054779
    Abstract: The present disclosure provides various embodiments of a via structure and method of manufacturing same. In an example, a via structure includes a via having via sidewall surfaces defined by a semiconductor substrate. The via sidewall surfaces have a first portion and a second portion. A conductive layer is disposed in the via on the first portion of the via sidewall surfaces, and a dielectric layer is disposed on the second portion of the via sidewall surfaces. The dielectric layer is disposed between the second portion of the via sidewall surfaces and the conductive layer. In an example, the dielectric layer is an oxide layer.
    Type: Application
    Filed: November 6, 2013
    Publication date: February 27, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yuan-Chih Hsieh, Li-Cheng Chu, Ming-Tung Wu, Ping-Yin Liu, Lan-Lin Chao, Chia-Shiung Tsai
  • Publication number: 20140051336
    Abstract: A grinding wheel for wafer edge trimming includes a head having an open side and an abrasive end bonded around an edge of the open side of the head. The abrasive end is arranged to have multiple simultaneous contacts around a wafer edge during the wafer edge trimming.
    Type: Application
    Filed: September 28, 2012
    Publication date: February 20, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Xin-Hua HUANG, Ping-Yin LIU, Yuan-Chih HSIEH, Lan-Lin CHAO, Chia-Shiung TSAI
  • Patent number: 8648468
    Abstract: Provided is a wafer level packaging. The packaging includes a first semiconductor wafer having a transistor device and a first bonding layer that includes a first material. The packaging includes a second semiconductor wafer having a second bonding layer that includes a second material different from the first material, one of the first and second materials being aluminum -based, and the other thereof being titanium-based. Wherein a portion of the second wafer is diffusively bonded to the first wafer through the first and second bonding layers.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: February 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Richard Chu, Martin Liu, Chia-Hua Chu, Yuan-Chih Hsieh, Chung-Hsien Lin, Lan-Lin Chao, Chun-Wen Cheng, Mingo Liu
  • Patent number: 8647962
    Abstract: The present disclosure provides a method of bonding a plurality of substrates. In an embodiment, a first substrate includes a first bonding layer. The second substrate includes a second bonding layer. The first bonding layer includes silicon; the second bonding layer includes aluminum. The first substrate and the second substrate are bonded forming a bond region having an interface between the first bonding layer and the second bonding layer. A device having a bonding region between substrates is also provided. The bonding region includes an interface between a layer including silicon and a layer including aluminum.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: February 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Martin Liu, Richard Chu, Hung Hua Lin, Hsin-Ting Huang, Jung-Huei Peng, Yuan-Chih Hsieh, Lan-Lin Chao, Chun-Wen Cheng, Chia-Shiung Tsai
  • Publication number: 20140020818
    Abstract: Systems and methods of separating bonded wafers are disclosed. In one embodiment, a system for separating bonded wafers includes a support for the bonded wafers and means for applying a sheer force to the bonded wafers. The system also includes means for applying a vacuum to the bonded wafers.
    Type: Application
    Filed: July 20, 2012
    Publication date: January 23, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Xin-Hua Huang, Ping-Yin Liu, Hung-Hua Lin, Yuan-Chih Hsieh, Lan-Lin Chao, Chia-Shiung Tsai
  • Patent number: 8633086
    Abstract: A method for forming a support structure for supporting and handling a semiconductor wafer containing vertical FETs formed at the front surface thereof is provided. In one embodiment, a semiconductor wafer is provided having a front surface and a rear surface, wherein the front surface comprises one or more dies separated by dicing lines. The wafer is thinned to a predetermined thickness. A plurality of patterned metal features are formed on a thinned rear surface to provide support for the wafer, wherein each of the plurality of patterned metal features covers substantially one die, leaving the dicing lines substantially uncovered. The wafer is thereafter diced along the dicing lines to separate the one or more dies for later chip packaging.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: January 21, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Alex Kalnitsky, Hsiao-Chin Tuan, Liang-Kai Han, Uway Tseng, Yuan-Chih Hsieh, Hung-Hua Lin
  • Patent number: 8623768
    Abstract: A method includes forming a Micro-Electro-Mechanical System (MEMS) device on a front surface of a substrate. After the step of forming the MEMS device, a through-opening is formed in the substrate, wherein the through-opening is formed from a backside of the substrate. The through-opening is filled with a dielectric material, which insulates a first portion of the substrate from a second portion of the substrate. An electrical connection is formed on the backside of the substrate. The electrical connection is electrically coupled to the MEMS device through the first portion of the substrate.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: January 7, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Te-Hao Lee, Yuan-Chih Hsieh
  • Publication number: 20130344640
    Abstract: An integrated circuit device is provided. The integrated circuit device can include a substrate; a first radiation-sensing element disposed over a first portion of the substrate; and a second radiation-sensing element disposed over a second portion of the substrate. The first portion comprises a first radiation absorption characteristic, and the second portion comprises a second radiation absorption characteristic different from the first radiation absorption characteristic.
    Type: Application
    Filed: August 30, 2013
    Publication date: December 26, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Hsuan Hsu, Yuan-Chih Hsieh, Dun-Nian Yaung, Chung-Yi Yu
  • Patent number: 8598687
    Abstract: The present disclosure provides various embodiments of a via structure and method of manufacturing same. In an example, a via structure includes a via having via sidewall surfaces defined by a semiconductor substrate. The via sidewall surfaces have a first portion and a second portion. A conductive layer is disposed in the via on the first portion of the via sidewall surfaces, and a dielectric layer is disposed on the second portion of the via sidewall surfaces. The dielectric layer is disposed between the second portion of the via sidewall surfaces and the conductive layer. In an example, the dielectric layer is an oxide layer.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: December 3, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yuan-Chih Hsieh, Richard Chu, Ming-Tung Wu, Martin Liu, Lan-Lin Chao, Chia-Shiung Tsai
  • Patent number: 8580594
    Abstract: The present disclosure provides a method including providing a first substrate; and forming a microelectromechanical system (MEMS) device on a first surface of the first substrate. A bond pad is formed on at least one bonding site on the first surface of the first substrate. The bonding site is recessed from the first surface. Thus, a top surface of the bond pad may lie below the plane of the top surface of the substrate. A device with recessed connective element(s) (e.g., bond pad) is also described. In further embodiments, a protective layer is formed on the recessed connective element during dicing of a substrate.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: November 12, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Ting Huang, Jung-Huei Peng, Shang-Ying Tsai, Yao-Te Huang, Ming-Tung Wu, Ping-Yin Liu, Xin-Hua Huang, Yuan-Chih Hsieh
  • Publication number: 20130285170
    Abstract: A MEMS device is described. The device includes a micro-electro-mechanical systems (MEMS) substrate including a first bonding layer, a semiconductor substrate including a second bonding layer, and a cap including a third bonding layer, the cap coupled to the semiconductor substrate by bonding the second bonding layer to the third bonding layer. The first bonding layer includes silicon, the semiconductor substrate is electrically coupled to the MEMS substrate by bonding the first bonding layer to the second bonding layer, and the MEMS substrate is hermetically sealed between the cap and the semiconductor substrate.
    Type: Application
    Filed: June 27, 2013
    Publication date: October 31, 2013
    Inventors: Chung-Hsien Lin, Chia-Hua Chu, Li-Cheng Chu, Yuan-Chih Hsieh, Chun-Wen Cheng
  • Publication number: 20130208371
    Abstract: A method of forming of biological sensing structures including a portion of a substrate is recessed to form a plurality of mesas in the substrate. Each of the plurality of mesas has a top surface and a sidewall surface. A first light reflecting layer is deposited over the top surface and the sidewall surface of each mesa. A filling material is formed over a first portion of the first light reflecting layer. A stop layer is deposited over the filling material and a second portion of the first light reflecting layer. A sacrificial layer is formed over the stop layer and is planarized exposing the stop layer. A first opening is formed in the stop layer and the first light reflecting layer. A second light reflecting layer is deposited over the first opening. A second opening is formed in the second light reflecting layer.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 15, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hung-Hua LIN, Li-Cheng CHU, Ming-Tung WU, Yuan-Chih HSIEH, Lan-Lin CHAO, Chia-Shiung TSAI
  • Publication number: 20130203199
    Abstract: A method includes bonding a first bond layer to a second bond layer through eutectic bonding. The step of bonding includes heating the first bond layer and the second bond layer to a temperature higher than a eutectic temperature of the first bond layer and the second bond layer, and performing a pumping cycle. The pumping cycle includes applying a first force to press the first bond layer and the second bond layer against each other. After the step of applying the first force, a second force lower than the first force is applied to press the first bond layer and the second bond layer against each other. After the step of applying the second force, a third force higher than the second force is applied to press the first bond layer and the second bond layer against each other.
    Type: Application
    Filed: February 2, 2012
    Publication date: August 8, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Xin-Hua Huang, Ping-Yin Liu, Li-Cheng Chu, Yuan-Chih Hsieh, Lan-Lin Chao, Chun-Wen Cheng, Chia-Shiung Tsai
  • Patent number: 8486744
    Abstract: The present disclosure provides a method for fabricating a MEMS device including multiple bonding of substrates. In an embodiment, a method includes providing a micro-electro-mechanical systems (MEMS) substrate including a first bonding layer, providing a semiconductor substrate including a second bonding layer, and providing a cap including a third bonding layer. The method further includes bonding the MEMS substrate to the semiconductor substrate at the first and second bonding layers, and bonding the cap to the semiconductor substrate at the second and third bonding layers to hermetically seal the MEMS substrate between the cap and the semiconductor substrate. A MEMS device fabricated by the above method is also provided.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: July 16, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Hsien Lin, Chia-Hua Chu, Li-Cheng Chu, Yuan-Chih Hsieh, Chun-Wen Cheng
  • Publication number: 20130140650
    Abstract: A method includes forming a Micro-Electro-Mechanical System (MEMS) device on a front surface of a substrate. After the step of forming the MEMS device, a through-opening is formed in the substrate, wherein the through-opening is formed from a backside of the substrate. The through-opening is filled with a dielectric material, which insulates a first portion of the substrate from a second portion of the substrate. An electrical connection is formed on the backside of the substrate. The electrical connection is electrically coupled to the MEMS device through the first portion of the substrate.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 6, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Te-Hao Lee, Yuan-Chih Hsieh
  • Patent number: 8445380
    Abstract: The present disclosure provides various embodiments of a via structure and method of manufacturing same. In an example, a method for forming a via structure includes forming a via in a semiconductor substrate, wherein via sidewalls of the via are defined by the semiconductor substrate; forming a dielectric layer on the via sidewalls; removing the dielectric layer from a portion of the via sidewalls; and forming a conductive layer to fill the via, wherein the conductive layer is disposed over the dielectric layer and the portion of the via sidewalls. In an example, the dielectric layer is an oxide layer.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: May 21, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yuan-Chih Hsieh, Richard Chu, Ming-Tung Wu, Martin Liu, Lan-Lin Chao, Chia-Shiung Tsai
  • Publication number: 20130099355
    Abstract: A method includes forming a MEMS device, forming a bond layer adjacent the MEMS device, and forming a protection layer over the bond layer.
    Type: Application
    Filed: October 24, 2011
    Publication date: April 25, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Liu, Xin-Hua Huang, Hsin-Ting Huang, Yuan-Chih Hsieh, Jung-Huei Peng, Lan-Lin Chao, Chia-Shiung Tsai, Chun-Wen Cheng
  • Patent number: 8405169
    Abstract: A device is provided which includes a transparent substrate. An opaque layer is disposed on the transparent substrate. A conductive layer disposed on the opaque layer. The opaque layer and the conductive layer form a handling layer, which may be used to detect and/or align the transparent wafer during fabrication processes. In an embodiment, the conductive layer includes a highly-doped silicon layer. In an embodiment, the opaque layer includes a metal. In embodiment, the device may include a MEMs device.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: March 26, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ren Cheng, Yi-Hsien Chang, Allen Timothy Chang, Ching-Ray Chen, Li-Cheng Chu, Hung-Hua Lin, Yuan-Chih Hsieh, Lan-Lin Chao
  • Publication number: 20130037891
    Abstract: The present disclosure provides a method including providing a first substrate; and forming a microelectromechanical system (MEMS) device on a first surface of the first substrate. A bond pad is formed on at least one bonding site on the first surface of the first substrate. The bonding site is recessed from the first surface. Thus, a top surface of the bond pad may lie below the plane of the top surface of the substrate. A device with recessed connective element(s) (e.g., bond pad) is also described. In further embodiments, a protective layer is formed on the recessed connective element during dicing of a substrate.
    Type: Application
    Filed: August 9, 2011
    Publication date: February 14, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
    Inventors: Hsin-Ting Huang, Jung-Huei Peng, Shang-Ying Tsai, Yao-Te Huang, Ming-Tung Wu, Ping-Yin Liu, Xin-Hua Huang, Yuan-Chih Hsieh