Patents by Inventor Yuan Liao

Yuan Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240006525
    Abstract: A method for manufacturing a high electron mobility transistor device includes providing a substrate. A channel material, a barrier material, a polarization adjustment material and a conductive material are formed on the substrate. A hard mask layer is formed on the conductive material. The conductive material is patterned to form a conductive layer by using the hard mask layer as a mask. A plurality of protection layers is formed on sidewalls of the hard mask layer and the conductive layer. The polarization adjustment material is patterned to form a polarization adjustment layer by using the plurality of protection layers and the hard mask as masks. The plurality of protection layers is removed. A portion of the conductive layer is laterally removed to form a first gate conductive layer.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 4, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Yuan Yu Chung, Bo-Yu Chen, You-Jia Chang, Lung-En Kuo, Kun-Yuan Liao, Chun-Lung Chen
  • Publication number: 20240007750
    Abstract: A monitor device is provided, including: a fixing seat, for fixing to a structure; a casing, with an accommodating space, upper end of the longitudinal axis of the casing rotatably connected to the fixing seat; a first optoelectronic device, disposed on the lower end of the casing; a second photoelectric device and a third photoelectric device, respectively rotatably disposed at a first position and a second position outside the casing; a transmission mechanism, disposed in the accommodating space of the casing, and the transmission mechanism including: an angle rotation mechanism, connected to the fixing seat to drive the casing to rotate in a first direction relative to the fixing seat; and a second angle rotation mechanism connected to and driving the first, the second and the third optoelectronic device to rotate synchronously in a second direction; wherein the first direction and the second direction are orthogonal to each other.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Inventor: Cheng Yuan Liao
  • Publication number: 20230378169
    Abstract: The present disclosure provides a semiconductor device and a method of manufacturing a semiconductor device. The semiconductor device comprises a substrate, a first gate electrode, a second gate electrode, a first doped region, a second doped region, a third doped region, and a first interconnection structure. The substrate comprises a well region of a first conductive type. The first and second gate electrodes are disposed on the substrate. The first, second, and third doped regions are embedded within the well region and are of the first conductive type. The first interconnection structure electrically connects the first gate electrode and the second gate electrode. The first doped region and the second doped region are disposed on opposite sides of the first gate electrode.
    Type: Application
    Filed: May 18, 2022
    Publication date: November 23, 2023
    Inventors: HO-HSIANG CHEN, CHI-HSIEN LIN, YING-TA LU, HSIEN-YUAN LIAO, HSIU-WEN WU, CHIAO-HAN LEE, TZU-JIN YEH
  • Publication number: 20230378910
    Abstract: A band-pass filter (BPF) includes first and second windings. The first winding includes first and second terminals, a first outer extending portion extending from the first terminal, a second outer extending portion extending from the second terminal, and a first conductive structure configured to electrically connect the first and second outer extending portions to each other at a location opposite the first and second terminals. The second winding includes third and fourth terminals positioned between the first and second terminals, and a second conductive structure electrically connected to the third and fourth terminals and extending between the first conductive structure and each of the first and second outer extending portions.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Inventors: Chi-Hsien LIN, Ho-Hsiang CHEN, Hsien-Yuan LIAO, Tzu-Jin YEH, Ying-Ta LU
  • Patent number: 11817385
    Abstract: An integrated circuit includes an inductor that includes a first set of conductive lines in a first metal layer, and is over a substrate, and a guard ring. The guard ring includes a first conductive line in a second metal layer, and extending in a first direction, a second conductive line extending in a second direction, and a first staggered line coupled between the first conductive line and the second conductive line. The first staggered line includes a second set of conductive lines in the second metal layer, and extends in the first direction, a third set of conductive lines in a third metal layer, and extends in the second direction, and a first set of vias coupling the second and third set of conductive lines together. All metal lines in the third metal layer that are part of the guard ring extend in the second direction.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: November 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chiao-Han Lee, Chi-Hsien Lin, Ho-Hsiang Chen, Hsien-Yuan Liao, Tzu-Jin Yeh, Ying-Ta Lu
  • Publication number: 20230354715
    Abstract: A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a passivation layer on the first MTJ and the second MTJ, and an ultra low-k (ULK) dielectric layer on the passivation layer. Preferably, a top surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the passivation layer directly on top of the first MTJ.
    Type: Application
    Filed: June 27, 2023
    Publication date: November 2, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Publication number: 20230341111
    Abstract: A light box structure includes a bracket and a board. The bracket is in an arc shape and has a first surface and a second surface opposite to each other. The board has a plurality of magnetic positioning posts. The magnetic positioning posts have at least two different heights. The board is attracted and attached on the first surface of the bracket through the magnetic positioning posts.
    Type: Application
    Filed: December 30, 2022
    Publication date: October 26, 2023
    Inventors: Li-Yuan LIAO, Chien-Hsin LIN, Ming-Chun HSU, Yu-Chin WU
  • Publication number: 20230335232
    Abstract: Methods, systems, and apparatus for identifying an adverse event. In one aspect, a method includes obtaining first patient data; applying a machine learning model to the first patient data to identify information indicative of a first adverse event in the first patient data, in which the machine learning model is configured to: identify one or more named entities present in the first patient data; identify information indicative of the first adverse event based on the identified named entities; and output annotated patient data; obtaining feedback data on the annotated patient data, in which the feedback data is usable to refine the machine learning model; applying the refined machine learning model to second patient data to identify information indicative of a second adverse event in the second patient data; and providing information indicative of the second adverse events identified in the second patient data.
    Type: Application
    Filed: April 15, 2022
    Publication date: October 19, 2023
    Inventors: Hui Jin, Daozhou Yao, Yubo He, Lei Chen, Huiying Sun, Yuan Liao, Zhenxing Li, Yue Wang
  • Publication number: 20230320229
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and form a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Application
    Filed: May 10, 2023
    Publication date: October 5, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 11777446
    Abstract: An oscillator includes a forward stage including first and second terminals and a transformer-coupled band-pass filter (BPF) coupled between the first and second terminals and including a coupling device between the first and second terminals, and a transformer including first and second windings in a metal layer of an IC. The first winding includes a first conductive structure coupled to the first terminal and a second conductive structure coupled to a voltage node, a third conductive structure including first and second extending portions connected to the first and second conductive structures. The second winding includes a fourth conductive structure including a third extending portion coupled to the voltage node, and a fourth extending portion coupled to the second terminal. The third extending portion is between the second conductive structure and the first extending portion, and the fourth extending portion is between the first conductive structure and the second extending portion.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: October 3, 2023
    Inventors: Chi-Hsien Lin, Ho-Hsiang Chen, Hsien-Yuan Liao, Tzu-Jin Yeh, Ying-Ta Lu
  • Patent number: 11778922
    Abstract: A method for fabricating semiconductor device includes first forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, performing an atomic layer deposition (ALD) process or a high-density plasma (HDP) process to form a passivation layer on the first MTJ and the second MTJ, performing an etching process to remove the passivation layer adjacent to the first MTJ and the second MTJ, and then forming an ultra low-k (ULK) dielectric layer on the passivation layer.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: October 3, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 11761048
    Abstract: A method for treating and phosphatizing a metal board without using acid includes the following steps: performing a degreasing step to remove grease and dirt from a surface of the metal board with a degreasing agent; performing a blast-peening step by blasting and peening polygon blast-peening granules on the metal board through a centrifugal impeller to remove an oxidized layer; performing a washing step to clean remaining powders from the metal board after the blast-peening step; performing a phosphatizing step to form a protective phosphate coating on the metal board; performing another washing step to wash off remaining phosphatizing agents from the metal board; performing a rustproofing step to apply a rustproofing agent on the metal board; and performing a drying step to dry the metal board.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: September 19, 2023
    Inventors: Tai-An Liao, Kao-Hsiung Liao, Ping-Yuan Liao, Tsai-Ming Kuo
  • Patent number: 11753780
    Abstract: The present disclosure discloses a mid-span axial force-free connecting device for an earth-anchored cable-stayed bridge and a method for mounting same. The mid-span axial force-free connecting device for an earth-anchored cable-stayed bridge includes an externally sleeved large steel box girder and an internally embedded small steel box girder. A plurality of bearing beams are arranged on the inner periphery of the externally sleeved large steel box girder. Transverse spherical bearings or vertical spherical bearings are arranged on the bearing beams. The internally embedded small steel box girder is fixedly supported in the externally sleeved large steel box girder through a plurality of transverse spherical bearings and vertical spherical bearings. In the same section, the transverse spherical bearings are symmetrically arranged, and the vertical spherical bearings are also symmetrically arranged.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: September 12, 2023
    Assignees: HUBEI COMMUNICATIONS PLANNING AND DESIGN INSTITUTE CO., LTD., HUBEI JIAOTOU SHIXI EXPRESSWAY CO., LTD.
    Inventors: Jianhui Zhan, Yuan Liao, Wangxing Ding, Yan Yang, Yuqing Liu, Feng Shen, Zhaohui Liu, Shoufeng Tang, Ming Zhang, Jinxia Zhao, Yajun Zhang, Bo Yao, Shan Pei, Qifen Wei, Zuowei Qin, Xiaoqing Liu, Wuzhou Hu, Jing Liu, Xingzhi Chen, Hua Chen, Wei Jiang
  • Publication number: 20230282644
    Abstract: A cell layout design for an integrated circuit. In one embodiment, the integrated circuit includes a dual-gate cell forming two transistors connected with each other via a common source/drain terminal. The dual-gate cell includes an active region, two gate lines extending across the active region, at least one first gate via disposed on one or both of the two gate lines and overlapped with the active region, and second gate vias disposed on one or both of the two gate lines and located outside the active region.
    Type: Application
    Filed: June 30, 2022
    Publication date: September 7, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ho-Hsiang CHEN, Chi-Hsien LIN, Ying-Ta LU, Hsien-Yuan LIAO, Hsiu-Wen WU, Chiao-Han LEE, Tzu-Jin YEH
  • Patent number: 11737370
    Abstract: A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a passivation layer on the first MTJ and the second MTJ, and an ultra low-k (ULK) dielectric layer on the passivation layer. Preferably, a top surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the passivation layer directly on top of the first MTJ.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: August 22, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 11736064
    Abstract: A differential oscillator includes a differential circuit and a transformer-coupled band-pass filter (BPF) coupled between first and second output nodes. The BPF includes a coupling device coupled between the output nodes and a transformer including first and second windings in a metal layer of an IC. The first winding includes first and second conductive structures coupled to the first output node and a voltage node, respectively, and a third conductive structure including first and second extending portions connected to the first and second conductive structures, respectively. The second winding includes a fourth conductive structure including a third extending portion coupled to the voltage node and a fourth extending portion coupled to the second output node. The third extending portion is between the second conductive structure and the first extending portion, and the fourth extending portion is between the first conductive structure and the second extending portion.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: August 22, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chi-Hsien Lin, Ho-Hsiang Chen, Hsien-Yuan Liao, Tzu-Jin Yeh, Ying-Ta Lu
  • Publication number: 20230251898
    Abstract: A federated computing method, an electronic device and a storage medium. Metadata to be processed is obtained from each participant based on a task identifier (ID) to be executed. n data slices corresponding to each participant are obtained by dividing the metadata, where n is a positive integer greater than 1. n data sets are generated based on the n data slices corresponding to each participant. n data processing services corresponding to the task ID are called to process each data set using each of the data processing services. A federated computing result corresponding to the task ID is determined based on a processing result of each of the data processing services.
    Type: Application
    Filed: November 12, 2021
    Publication date: August 10, 2023
    Inventors: Shilei JI, Yuan LIAO, Haiping HUANG, Ji LIU
  • Publication number: 20230228045
    Abstract: The present disclosure discloses a mid-span axial force-free connecting device for an earth-anchored cable-stayed bridge and a method for mounting same. The mid-span axial force-free connecting device for an earth-anchored cable-stayed bridge includes an externally sleeved large steel box girder and an internally embedded small steel box girder. A plurality of bearing beams are arranged on the inner periphery of the externally sleeved large steel box girder. Transverse spherical bearings or vertical spherical bearings are arranged on the bearing beams. The internally embedded small steel box girder is fixedly supported in the externally sleeved large steel box girder through a plurality of transverse spherical bearings and vertical spherical bearings. In the same section, the transverse spherical bearings are symmetrically arranged, and the vertical spherical bearings are also symmetrically arranged.
    Type: Application
    Filed: January 9, 2023
    Publication date: July 20, 2023
    Applicants: Hubei Communications Planning and Design Institute Co., Ltd., Hubei Jiaotou Shixi Expressway Co., Ltd.
    Inventors: Jianhui Zhan, Yuan Liao, Wangxing Ding, Yan Yang, Yuqing Liu, Feng Shen, Zhaohui Liu, Shoufeng Tang, Ming Zhang, Jinxia Zhao, Yajun Zhang, Bo Yao, Shan Pei, Qifen Wei, Zuowei Qin, Xiaoqing Liu, Wuzhou Hu, Jing Liu, Xingzhi Chen, Hua Chen, Wei Jiang
  • Patent number: 11706993
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and forming a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Grant
    Filed: December 27, 2020
    Date of Patent: July 18, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: D987647
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: May 30, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yuan Liao, Jiaqi Zhou