Patents by Inventor Yuan Yin

Yuan Yin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250014485
    Abstract: An informational plaque mounting system includes a support bracket including a base having a rear side and a front side, and at least one first pivot component at the front side; an informational plaque including a plaque front side and a plaque rear side, and at least one second pivot component at the plaque rear side; wherein the at least one second pivot component is matingly engageable with the at least one first pivot component such that the informational plaque is supported on the support bracket and pivotable relative to the support bracket for varying an angular orientation of the informational plaque relative to the support bracket.
    Type: Application
    Filed: June 11, 2024
    Publication date: January 9, 2025
    Inventors: Beth A. CASEY, Dale G. MALOTT, Hong Yuan YIN, Edward P. BUSAM
  • Patent number: 12074137
    Abstract: A multi-chip package and a manufacturing method thereof are provided. The multi-chip package includes a redistribution circuit structure; a first semiconductor chip disposed on the redistribution structure and having a first active surface on which a first conductive post is disposed; a second semiconductor chip disposed above the first semiconductor chip and having a second active surface on which a first conductor is disposed; and a first encapsulant disposed on the redistribution circuit structure and encapsulating at least the first semiconductor chip, wherein the first conductive post and the first conductor are aligned and bonded to each other to electrically connect the first semiconductor chip and the second semiconductor chip.
    Type: Grant
    Filed: February 9, 2023
    Date of Patent: August 27, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Min Lin, Ang-Ying Lin, Sheng-Tsai Wu, Chao-Jung Chen, Tzu-Hsuan Ni, Shin-Yi Huang, Yuan-Yin Lo
  • Patent number: 11993603
    Abstract: A medicament with excellent JAK kinase (Janus Kinase) inhibitory activity can be used to prevent, treat and/or improve an autoimmune disease (e.g., psoriasis, rheumatoid arthritis, inflammatory bowel disease, Sjogren's syndrome, Behcet's disease, multiple sclerosis, systemic lupus erythematosus and the like). The present invention also provides a pharmaceutically acceptable composition containing the compound and a method for preparing these compounds.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: May 28, 2024
    Assignees: INSTITUTE OF MATERIA MEDICA, CHINESE ACADEMY OF MEDICAL SCIENCES & PEKING UNION MEDICAL COLLEGE, CHINA PARMACEUTICAL UNIVERSITY
    Inventors: Tiantai Zhang, Dayong Zhang, Chengjuan Chen, Yuan Yin, Runan Yu, Lei Shu
  • Publication number: 20240002394
    Abstract: The present disclosure provides a deuterium-modified thienopyridone compound, a preparation method therefor, a pharmaceutical composition thereof, and a medical use thereof. The deuterium-modified thienopyridone compound is shown in formula I, and has been shown to inhibit HPK1 kinase activity, being capable of achieving an anti-tumour effect.
    Type: Application
    Filed: November 24, 2021
    Publication date: January 4, 2024
    Inventors: Yinsheng ZHANG, Yong GAO, Yuan YIN, Wei SHI, Damin ZHAO, Gaoyuan ZHU, Xiaojin WANG, Yanpeng JI
  • Publication number: 20230357242
    Abstract: Provided is a compound as an Akt kinase inhibitor. The present invention specifically relates to a compound of formula (I) or a pharmaceutically acceptable salt thereof, a preparation method therefor, a pharmaceutical composition containing the compound, and the use thereof in the preparation of a drug for treating Akt kinase-related diseases.
    Type: Application
    Filed: September 30, 2021
    Publication date: November 9, 2023
    Inventors: Yinsheng ZHANG, Yong GAO, Wei SHI, Damin ZHAO, Yuan YIN
  • Publication number: 20230187409
    Abstract: A multi-chip package and a manufacturing method thereof are provided. The multi-chip package includes a redistribution circuit structure; a first semiconductor chip disposed on the redistribution structure and having a first active surface on which a first conductive post is disposed; a second semiconductor chip disposed above the first semiconductor chip and having a second active surface on which a first conductor is disposed; and a first encapsulant disposed on the redistribution circuit structure and encapsulating at least the first semiconductor chip, wherein the first conductive post and the first conductor are aligned and bonded to each other to electrically connect the first semiconductor chip and the second semiconductor chip.
    Type: Application
    Filed: February 9, 2023
    Publication date: June 15, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Min Lin, Ang-Ying Lin, Sheng-Tsai Wu, Chao-Jung Chen, Tzu-Hsuan Ni, Shin-Yi Huang, Yuan-Yin Lo
  • Patent number: 11646270
    Abstract: A multi-chip package and a manufacturing method thereof are provided. The multi-chip package includes: an interposer including a wiring structure and an interposer via electrically connected to the wiring structure; a plurality of semiconductor chips located on a first surface of the interposer and electrically connected to each other through the interposer; an encapsulant located on the first surface of the interposer and encapsulating at least a portion of the plurality of semiconductor chips; and a redistribution circuit structure located on a second surface of the interposer opposite to the first surface, wherein the plurality of semiconductor chips are electrically connected to the redistribution circuit structure through at least the interposer.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: May 9, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Ang-Ying Lin, Yu-Min Lin, Shin-Yi Huang, Sheng-Tsai Wu, Yuan-Yin Lo, Tzu-Hsuan Ni, Chao-Jung Chen
  • Patent number: 11587905
    Abstract: A multi-chip package and a manufacturing method thereof are provided. The multi-chip package includes a redistribution circuit structure; a first semiconductor chip disposed on the redistribution structure and having a first active surface on which a first conductive post is disposed; a second semiconductor chip disposed above the first semiconductor chip and having a second active surface on which a first conductor is disposed; and a first encapsulant disposed on the redistribution circuit structure and encapsulating at least the first semiconductor chip, wherein the first conductive post and the first conductor are aligned and bonded to each other to electrically connect the first semiconductor chip and the second semiconductor chip.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: February 21, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Min Lin, Ang-Ying Lin, Sheng-Tsai Wu, Chao-Jung Chen, Tzu-Hsuan Ni, Shin-Yi Huang, Yuan-Yin Lo
  • Patent number: 11569217
    Abstract: An image sensor package and a manufacturing method thereof are provided. The image sensor package includes a redistribution circuit structure; an image sensing chip disposed on the redistribution circuit structure and having a sensing surface, on which a sensing area and a first conductive pillar arranged in the periphery of the sensing area are disposed; a lid covering the sensing area; an encapsulant disposed on the redistribution circuit structure and encapsulating at least part of the image sensing chip and the cover; and a top tier semiconductor chip disposed above the image sensing chip and having an active surface on which a first conductor is disposed. The first conductor overlaps the image sensing chip in a direction perpendicular to the sensing surface. The first conductive pillar and the first conductor are aligned and bonded to each other to electrically connect the image sensing chip and the top tier semiconductor chip.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: January 31, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Sheng-Tsai Wu, Yu-Min Lin, Yuan-Yin Lo, Ang-Ying Lin, Tzu-Hsuan Ni, Chao-Jung Chen, Shin-Yi Huang
  • Patent number: 11479689
    Abstract: The present disclosure provides an anti-fogging material and a manufacturing method thereof. The anti-fogging material includes a crosslinked polymer obtained by curing an anti-fogging composition, wherein the anti-fogging composition includes an ionic compound, a hard compound with two or more acrylate functional groups at the terminus thereof, and a surface active compound.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: October 25, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Li-Ching Wang, Yuan-Yin Chen
  • Patent number: 11424190
    Abstract: A multi-chip package and a manufacturing method thereof are provided. The multi-chip package includes: an interposer including a dielectric body, a plurality of semiconductor bodies separated by the dielectric body, a through via penetrating through the dielectric body, and a wiring structure located in each of the plurality of semiconductor bodies; a plurality of semiconductor chips located side by side on a first surface of the interposer and electrically connected to the wiring structure; an encapsulant located on the first surface of the interposer and encapsulating at least a portion of the plurality of semiconductor chips; and a redistribution circuit structure located on a second surface of the interposer opposite to the first surface of the interposer and electrically connected to the plurality of semiconductor chips through the through via.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: August 23, 2022
    Assignee: Industrial Technology Research Institute
    Inventors: Chao-Jung Chen, Yu-Min Lin, Sheng-Tsai Wu, Shin-Yi Huang, Ang-Ying Lin, Tzu-Hsuan Ni, Yuan-Yin Lo
  • Publication number: 20220204804
    Abstract: The present disclosure provides an anti-fogging material and a manufacturing method thereof. The anti-fogging material includes a crosslinked polymer obtained by curing an anti-fogging composition, wherein the anti-fogging composition includes an ionic compound, a hard compound with two or more acrylate functional groups at the terminus thereof, and a surface active compound.
    Type: Application
    Filed: December 31, 2020
    Publication date: June 30, 2022
    Inventors: Li-Ching Wang, Yuan-Yin Chen
  • Publication number: 20220130812
    Abstract: An image sensor package and a manufacturing method thereof are provided. The image sensor package includes a redistribution circuit structure; an image sensing chip disposed on the redistribution circuit structure and having a sensing surface, on which a sensing area and a first conductive pillar arranged in the periphery of the sensing area are disposed; a lid covering the sensing area; an encapsulant disposed on the redistribution circuit structure and encapsulating at least part of the image sensing chip and the cover; and a top tier semiconductor chip disposed above the image sensing chip and having an active surface on which a first conductor is disposed. The first conductor overlaps the image sensing chip in a direction perpendicular to the sensing surface. The first conductive pillar and the first conductor are aligned and bonded to each other to electrically connect the image sensing chip and the top tier semiconductor chip.
    Type: Application
    Filed: January 5, 2022
    Publication date: April 28, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Sheng-Tsai Wu, Yu-Min Lin, Yuan-Yin Lo, Ang-Ying Lin, Tzu-Hsuan Ni, Chao-Jung Chen, Shin-Yi Huang
  • Patent number: 11288219
    Abstract: A USB switching circuit includes a first multiplexer, a second multiplexer coupled with the first multiplexer through transmission paths, and a voltage regulation circuit coupled with the first and second multiplexers. The first multiplexer distributes first data signals to the transmission paths according to first control signals. The second multiplexer distributes a second data signal to the transmission paths according to second control signals. The voltage regulation circuit sets a maximum voltage and a minimum voltage of the first data signals to corresponding to a common voltage. The maximum voltage of the first data signals is not higher than a maximum voltage of the second control signals, or the minimum voltage of the first data signals is not lower than a minimum voltage of the second control signals. The first data signals and the second data signal are generated according to different communication protocols.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: March 29, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Kai-Yuan Yin, Wen-Bin Wu, Leaf Chen, Bo-Yu Chen
  • Publication number: 20220048914
    Abstract: A medicament with excellent JAK kinase (Janus Kinase) inhibitory activity can be used to prevent, treat and/or improve an autoimmune disease (e.g., psoriasis, rheumatoid arthritis, inflammatory bowel disease, Sjogren's syndrome, Behcet's disease, multiple sclerosis, systemic lupus erythematosus and the like). The present invention also provides a pharmaceutically acceptable composition containing the compound and a method for preparing these compounds.
    Type: Application
    Filed: September 5, 2019
    Publication date: February 17, 2022
    Inventors: Dayong ZHANG, Tiantai ZHANG, Yuan YIN, Chengjuan CHEN, Runan YU, Lei SHU
  • Patent number: 11251174
    Abstract: An image sensor package and a manufacturing method thereof are provided. The image sensor package includes a redistribution circuit structure; an image sensing chip disposed on the redistribution circuit structure and having a sensing surface, on which a sensing area and a first conductive pillar arranged in the periphery of the sensing area are disposed; a lid covering the sensing area; an encapsulant disposed on the redistribution circuit structure and encapsulating at least part of the image sensing chip and the cover; and a top tier semiconductor chip disposed above the image sensing chip and having an active surface on which a first conductor is disposed. The first conductor overlaps the image sensing chip in a direction perpendicular to the sensing surface. The first conductive pillar and the first conductor are aligned and bonded to each other to electrically connect the image sensing chip and the top tier semiconductor chip.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: February 15, 2022
    Assignee: Industrial Technology Research Institute
    Inventors: Sheng-Tsai Wu, Yu-Min Lin, Yuan-Yin Lo, Ang-Ying Lin, Tzu-Hsuan Ni, Chao-Jung Chen, Shin-Yi Huang
  • Patent number: 11199264
    Abstract: An intelligent regulation system for a mechanical seal, the system comprising: a monitoring device for measuring a signal correlated with a seal in real time; a control device, comprising a state determination module, a feasible region analysis module, an evaluation module and an optimizing module, wherein the state determination module unscrambles the signal obtained by the monitoring device to estimate the state of the seal; the feasible region analysis module determines, according to a current state, a state that the seal can reach by means of the regulating effect of a regulating device; the evaluation module evaluates a value for the state of the seal; and the optimizing module searches a feasible region, where the seal is regulated, for a regulating method with a relatively high value to the greatest extent, and accordingly sends an instruction to the regulating device; and the regulating device for actively applying an action to the seal according to the instruction given by the control device.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: December 14, 2021
    Inventors: Weifeng Huang, Xiangfeng Liu, Yuan Yin, Ying Liu, Decai Li, Yongjian Li, Shuangfu Suo, Zixi Wang, Xiaohong Jia, Fei Guo
  • Patent number: 11125642
    Abstract: A real-time monitoring and analysis method for a mechanical seal. In the method, an acoustic emission signal generated by a friction pair at a mechanical seal end surface is measured; a specific acoustic source generate signals on a plurality of specific frequency bands on an acoustic scale. In a seal operating process motion causes the acoustic emission signal to change on a dynamic time scale equivalent to a period of rotation. In a long-term seal service process, cumulative performance changes occur on a service time scale due to running-in, wear, and/or aging of elastic elements; for this feature, the long-term change process of the acoustic emission signal needs to be considered. Analysis is performed, on multiple scales, in combination with auxiliary information and with determined physical characterization quantities passed to scales of longer time, thereby determining the real-time working state of the seal and providing a performance change expectation of the seal.
    Type: Grant
    Filed: November 23, 2018
    Date of Patent: September 21, 2021
    Inventors: Weifeng Huang, Xiangfeng Liu, Yuan Yin, Ying Liu, Decai Li, Yongjian Li, Shuangfu Suo, Zixi Wang, Xiaohong Jia, Fei Guo
  • Publication number: 20210246986
    Abstract: An intelligent regulation system for a mechanical seal, the system comprising: a monitoring device for measuring a signal correlated with a seal in real time; a control device, comprising a state determination module, a feasible region analysis module, an evaluation module and an optimizing module, wherein the state determination module unscrambles the signal obtained by the monitoring device to estimate the state of the seal; the feasible region analysis module determines, according to a current state, a state that the seal can reach by means of the regulating effect of a regulating device; the evaluation module evaluates a value for the state of the seal; and the optimizing module searches a feasible region, where the seal is regulated, for a regulating method with a relatively high value to the greatest extent, and accordingly sends an instruction to the regulating device; and the regulating device for actively applying an action to the seal according to the instruction given by the control device.
    Type: Application
    Filed: July 16, 2018
    Publication date: August 12, 2021
    Inventors: Weifeng HUANG, Xiangfeng LIU, Yuan YIN, Ying LIU, Decai LI, Yongjian LI, Shuangfu SUO, Zixi WANG, Xiaohong JIA, Fei GUO
  • Patent number: D976852
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: January 31, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Sheng-Tsai Wu, Hsin-Han Lin, Yuan-Yin Lo, Kuo-Shu Kao, Tai-Jyun Yu, Han-Lin Wu, Yen-Ting Lin