Patents by Inventor Yuankai Zheng

Yuankai Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8089132
    Abstract: A magnetic memory unit includes a tunneling barrier separating a free magnetic element and a reference magnetic element. A first phonon glass electron crystal layer is disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element. A second phonon glass electron crystal layer also be disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element to provide a Peltier effect on the free magnetic element and the reference magnetic element.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: January 3, 2012
    Assignee: Seagate Technology LLC
    Inventors: Yuankai Zheng, Haiwen Xi, Dimitar V. Dimitrov, Dexin Wang
  • Publication number: 20110298068
    Abstract: A magnetic tunnel junction having a compsensation element is disclosed. The magnetic tunnel junction includes a reference element, and a compensation element having an opposite magnetization moment to a magnetization moment of the reference element. A free magnetic layer is between the reference element and the compensation element, and an electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic layer from the reference element. The free magnetic layer includes Co100-X-YFeXBY wherein X is a value being greater than 30 and Y is a value being greater than 15.
    Type: Application
    Filed: August 16, 2011
    Publication date: December 8, 2011
    Applicant: SEAGATE TECHNOLOGY LLC.
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov, Dexin Wang, Wei Tian, Xiaobin Wang, Xiaohua Lou
  • Patent number: 8054675
    Abstract: Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: November 8, 2011
    Assignee: Seagate Technology LLC
    Inventors: Haiwen Xi, Hongyue Liu, Xiaobin Wang, Yong Lu, Yiran Chen, Yuankai Zheng, Dimitar V. Dimitrov, Dexin Wang, Hai Li
  • Publication number: 20110260274
    Abstract: A magnetic cell includes a ferromagnetic free layer having a free magnetization orientation direction and a first ferromagnetic pinned reference layer having a first reference magnetization orientation direction that is parallel or anti-parallel to the free magnetization orientation direction. A first oxide barrier layer is between the ferromagnetic free layer and the first ferromagnetic pinned reference layer. The magnetic cell further includes a second ferromagnetic pinned reference layer having a second reference magnetization orientation direction that is orthogonal to the first reference magnetization orientation direction. The ferromagnetic free layer is between the first ferromagnetic pinned reference layer and the second ferromagnetic pinned reference layer.
    Type: Application
    Filed: July 5, 2011
    Publication date: October 27, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Zheng Gao, Wenzhong Zhu, Wonjoon Jung, Haiwen Xi
  • Patent number: 8045366
    Abstract: Spin-transfer torque memory includes a composite free magnetic element, a reference magnetic element having a magnetization orientation that is pinned in a reference direction, and an electrically insulating and non-magnetic tunneling barrier layer separating the composite free magnetic element from the magnetic reference element. The free magnetic element includes a hard magnetic layer exchanged coupled to a soft magnetic layer. The composite free magnetic element has a magnetization orientation that can change direction due to spin-torque transfer when a write current passes through the spin-transfer torque memory unit.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: October 25, 2011
    Assignee: Seagate Technology LLC
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov, Dexin Wang, Haiwen Xi, Kaizhong Gao, Olle Heinonen, Wenzhong Zhu
  • Patent number: 8039913
    Abstract: A magnetic stack with a multilayer free layer having a switchable magnetization orientation, the free layer comprising a first ferromagnetic portion and a second ferromagnetic portion with an electrically conducting non-magnetic intermediate layer between the first portion and the second portion. The magnetic stack also includes a first ferromagnetic reference layer having a pinned magnetization orientation, a first non-magnetic spacer layer between the free layer and the first reference layer, a second ferromagnetic reference layer having a pinned magnetization orientation, and a second non-magnetic spacer layer between the free layer and the second reference layer.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: October 18, 2011
    Assignee: Seagate Technology LLC
    Inventors: Yuankai Zheng, Zheng Gao, Xuebing Feng
  • Patent number: 8035177
    Abstract: A magnetic stack having a ferromagnetic free layer, a metal oxide layer that is antiferromagnetic at a first temperature and non-magnetic at a second temperature higher than the first temperature, a ferromagnetic pinned reference layer, and a non-magnetic spacer layer between the free layer and the reference layer. During a writing process, the metal oxide layer is non-magnetic. For magnetic memory cells, such as magnetic tunnel junction cells, the metal oxide layer provides reduced switching currents.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: October 11, 2011
    Assignee: Seagate Technology LLC
    Inventors: Xiaohua Lou, Yuankai Zheng, Wenzhong Zhu, Wei Tian, Zheng Gao
  • Publication number: 20110242883
    Abstract: Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation.
    Type: Application
    Filed: June 15, 2011
    Publication date: October 6, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov, Haiwen Xi
  • Publication number: 20110228597
    Abstract: Apparatus and associated method for writing data to a non-volatile memory cell, such as spin-torque transfer random access memory (STRAM). In accordance with some embodiments, a resistive sense element (RSE) has a heat assist region, magnetic tunneling junction (MTJ), and pinned region. When a first logical state is written to the MTJ with a spin polarized current, the pinned and heat assist regions each have a substantially zero net magnetic moment. When a second logical state is written to the MTJ with a static magnetic field, the pinned region has a substantially zero net magnetic moment and the heat assist region has a non-zero net magnetic moment.
    Type: Application
    Filed: May 27, 2011
    Publication date: September 22, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Xiaohua Lou, Haiwen Xi, Michael Xuefei Tang
  • Patent number: 8023316
    Abstract: A magnetic tunnel junction having a compensation element is disclosed. The magnetic tunnel junction includes a synthetic antiferromagnetic reference element, and a synthetic antiferromagnetic compensation element having an opposite magnetization moment to a magnetization moment of the synthetic antiferromagnetic reference element. A free magnetic layer is between the synthetic antiferromagnetic reference element and the synthetic antiferromagnetic compensation element, and an electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic layer from the synthetic antiferromagnetic reference element. The free magnetic layer includes Co100-X-YFeXBY wherein X is a value being greater than 30 and Y is a value being greater than 15.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: September 20, 2011
    Assignee: Seagate Technology LLC
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov, Dexin Wang, Wei Tian, Xiaobin Wang, Xiaohua Lou
  • Publication number: 20110221016
    Abstract: Flux-closed spin-transfer torque memory having a specular insulative spacer is disclosed. A flux-closed spin-transfer torque memory unit includes a multilayer free magnetic element including a first free magnetic layer anti-ferromagnetically coupled to a second free magnetic layer through an electrically insulating and electronically reflective layer. An electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic element from a reference magnetic layer.
    Type: Application
    Filed: May 25, 2011
    Publication date: September 15, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov
  • Patent number: 8004883
    Abstract: Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: August 23, 2011
    Assignee: Seagate Technology LLC
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov, Haiwen Xi
  • Patent number: 7999337
    Abstract: Apparatus and associated method for writing data to a non-volatile memory cell, such as spin-torque transfer random access memory (STRAM). In accordance with some embodiments, a resistive sense element (RSE) has a heat assist region, magnetic tunneling junction (MTJ), and pinned region. When a first logical state is written to the MTJ with a spin polarized current, the pinned and heat assist regions each have a substantially zero net magnetic moment. When a second logical state is written to the MTJ with a static magnetic field, the pinned region has a substantially zero net magnetic moment and the heat assist region has a non-zero net magnetic moment.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: August 16, 2011
    Assignee: Seagate Technology LLC
    Inventors: Yuankai Zheng, Xiaohua Lou, Haiwen Xi, Michael Xuefei Tang
  • Patent number: 7999338
    Abstract: A magnetic cell includes a ferromagnetic free layer having a free magnetization orientation direction and a first ferromagnetic pinned reference layer having a first reference magnetization orientation direction that is parallel or anti-parallel to the free magnetization orientation direction. A first oxide barrier layer is between the ferromagnetic free layer and the first ferromagnetic pinned reference layer. The magnetic cell further includes a second ferromagnetic pinned reference layer having a second reference magnetization orientation direction that is orthogonal to the first reference magnetization orientation direction. The ferromagnetic free layer is between the first ferromagnetic pinned reference layer and the second ferromagnetic pinned reference layer.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: August 16, 2011
    Assignee: Seagate Technology LLC
    Inventors: Yuankai Zheng, Zheng Gao, Wenzhong Zhu, Wonjoon Jung, Haiwen Xi
  • Publication number: 20110194337
    Abstract: A method and apparatus for writing data to a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM) memory cell. In some embodiments, a selected resistive state is written to a magnetic tunneling structure by applying a succession of indeterminate write pulses thereto until the selected resistive state is verified.
    Type: Application
    Filed: April 21, 2011
    Publication date: August 11, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Xiaobin Wang, Yong Lu, Haiwen Xi, Yuankai Zheng, Yiran Chen, Harry Hongyue Liu, Dimitar Dimitrov, Wei Tian, Brian Seungwhan Lee
  • Publication number: 20110194335
    Abstract: A magnetic memory unit includes a tunneling barrier separating a free magnetic element and a reference magnetic element. A first phonon glass electron crystal layer is disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element. A second phonon glass electron crystal layer also be disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element to provide a Peltier effect on the free magnetic element and the reference magnetic element.
    Type: Application
    Filed: April 19, 2011
    Publication date: August 11, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Haiwen Xi, Dimitar V. Dimitrov, Dexin Wang
  • Patent number: 7985994
    Abstract: Flux-closed spin-transfer torque memory having a specular insulative spacer is disclosed. A flux-closed spin-transfer torque memory unit includes a multilayer free magnetic element including a first free magnetic layer anti-ferromagnetically coupled to a second free magnetic layer through an electrically insulating and electronically reflective layer. An electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic element from a reference magnetic layer.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: July 26, 2011
    Assignee: Seagate Technology LLC
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov
  • Patent number: 7969771
    Abstract: Various embodiments of the present invention are generally directed to an apparatus and method associated with a semiconductor device with thermally coupled phase change layers. The semiconductor device comprises a first phase change layer selectively configurable in a relatively low resistance crystalline phase and a relatively high resistance amorphous phase, and a second phase change layer thermally coupled to the first phase change layer. The second phase change layer is characterized as a metal-insulator transition material. A programming pulse is applied to the semiconductor device from a first electrode layer to a second electrode layer to provide the first phase change layer with a selected resistance.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: June 28, 2011
    Assignee: Seagate Technology LLC
    Inventors: Haiwen Xi, Michael Xuefei Tang, Yuankai Zheng, Patrick Ryan
  • Publication number: 20110149641
    Abstract: Apparatus and associated method for writing data to a non-volatile memory cell, such as spin-torque transfer random access memory (STRAM). In accordance with some embodiments, a resistive sense element (RSE) has a heat assist region, magnetic tunneling junction (MTJ), and pinned region. When a first logical state is written to the MTJ with a spin polarized current, the pinned and heat assist regions each have a substantially zero net magnetic moment. When a second logical state is written to the MTJ with a static magnetic field, the pinned region has a substantially zero net magnetic moment and the heat assist region has a non-zero net magnetic moment.
    Type: Application
    Filed: March 3, 2011
    Publication date: June 23, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Xiaohua Lou, Haiwen Xi, Michael Xuefei Tang
  • Publication number: 20110149642
    Abstract: Apparatus and associated method for writing data to a non-volatile memory cell, such as spin-torque transfer random access memory (STRAM). In accordance with some embodiments, a resistive sense element (RSE) has a heat assist region, magnetic tunneling junction (MTJ), and pinned region. When a first logical state is written to the MTJ with a spin polarized current, the pinned and heat assist regions each have a substantially zero net magnetic moment. When a second logical state is written to the MTJ with a static magnetic field, the pinned region has a substantially zero net magnetic moment and the heat assist region has a non-zero net magnetic moment.
    Type: Application
    Filed: March 3, 2011
    Publication date: June 23, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Xiaohua Lou, Haiwen Xi, Michael Xuefei Tang