Patents by Inventor Yuankai Zheng

Yuankai Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110134682
    Abstract: Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell.
    Type: Application
    Filed: February 16, 2011
    Publication date: June 9, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Haiwen Xi, Hongyue Liu, Xiaobin Wang, Yong Lu, Yiran Chen, Yuankai Zheng, Dimitar V. Dimitrov, Dexin Wang, Hai Li
  • Patent number: 7952917
    Abstract: Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: May 31, 2011
    Assignee: Seagate Technology LLC
    Inventors: Haiwen Xi, Hongyue Liu, Xiaobin Wang, Yong Lu, Yiran Chen, Yuankai Zheng, Dimitar V. Dimitrov, Dexin Wang, Hai Li
  • Patent number: 7940551
    Abstract: Spin-transfer torque memory having a specular insulative spacer is disclosed. The spin-transfer torque memory unit includes a free magnetic layer, a reference magnetic layer, an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the reference magnetic layer, an electrode layer, and an electrically insulating and electronically reflective layer separating the electrode layer and the free magnetic layer.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: May 10, 2011
    Assignee: Seagate Technology, LLC
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov, Wei Tian, Dexin Wang, Zheng Gao, Xiaobin Wang
  • Patent number: 7936598
    Abstract: A magnetic memory cell having a ferromagnetic free layer and a ferromagnetic pinned reference layer, each having an out-of-plane magnetic anisotropy and an out-of-plane magnetization orientation and switchable by spin torque. The cell includes a ferromagnetic assist layer proximate the free layer, the assist layer having a low magnetic anisotropy less than about 500 Oe. The assist layer may have in-plane or out-of-plane anisotropy.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: May 3, 2011
    Assignee: Seagate Technology
    Inventors: Yuankai Zheng, Zheng Gao, Wonjoon Jung, Xuebing Feng, Xiaohua Lou, Haiwen Xi
  • Patent number: 7936592
    Abstract: A method and apparatus for writing data to a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM) memory cell. In some embodiments, a selected resistive state is written to a magnetic tunneling structure by applying a succession of indeterminate write pulses thereto until the selected resistive state is verified.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: May 3, 2011
    Assignee: Seagate Technology LLC
    Inventors: Xiaobin Wang, Yong Lu, Haiwen Xi, Yuankai Zheng, Yiran Chen, Harry Hongyue Liu, Dimitar Dimitrov, Wei Tan, Brian Seungwhan Lee
  • Publication number: 20110085373
    Abstract: Self-reference reading a magnetic tunnel junction data cell methods are disclosed. An illustrative method includes applying a read voltage across a magnetic tunnel junction data cell and forming a read current. The magnetic tunnel junction data cell has a first resistance state. The read voltage is sufficient to switch the magnetic tunnel junction data cell resistance. The method includes detecting the read current and determining if the read current remains constant during the applying step. If the read current remains constant during the applying step, then the first resistance state of the magnetic tunnel junction data cell is the resistance state that the read voltage was sufficient to switch the magnetic tunnel junction data cell to.
    Type: Application
    Filed: December 15, 2010
    Publication date: April 14, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Yiran Chen, Xiaobin Wang, Zheng Gao, Dimitar V. Dimitrov, Wenzhong Zhu, Yong Lu
  • Publication number: 20110058412
    Abstract: A magnetic tunnel junction having a ferromagnetic free layer and a ferromagnetic pinned reference layer, each having an out-of-plane magnetic anisotropy and an out-of-plane magnetization orientation, the ferromagnetic free layer switchable by spin torque. The magnetic tunnel junction includes a ferromagnetic assist layer proximate the free layer, the assist layer having a low magnetic anisotropy less than 700 Oe and positioned to apply a magnetic field on the free layer.
    Type: Application
    Filed: November 11, 2010
    Publication date: March 10, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Haiwen Xi, Wonjoon Jung, Xuebing Feng, Xiaohua Lou, Zheng Gao
  • Publication number: 20110049658
    Abstract: Magnetic tunnel junctions having a specular insulative spacer are disclosed. The magnetic tunnel junction includes a free magnetic layer, a reference magnetic layer, an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the reference magnetic layer, and an electrically insulating and electronically reflective layer positioned to reflect at least a portion of electrons back into the free magnetic layer.
    Type: Application
    Filed: November 11, 2010
    Publication date: March 3, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov, Wei Tian, Dexin Wang, Zheng Gao, Xiaobin Wang
  • Publication number: 20110019465
    Abstract: A magnetic tunnel junction having a compensation element is disclosed. The magnetic tunnel junction includes a synthetic antiferromagnetic reference element, and a synthetic antiferromagnetic compensation element having an opposite magnetization moment to a magnetization moment of the synthetic antiferromagnetic reference element. A free magnetic layer is between the synthetic antiferromagnetic reference element and the synthetic antiferromagnetic compensation element, and an electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic layer from the synthetic antiferromagnetic reference element. The free magnetic layer includes Co100-X-YFeXBY wherein X is a value being greater than 30 and Y is a value being greater than 15.
    Type: Application
    Filed: October 7, 2010
    Publication date: January 27, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov, Dexin Wang, Wei Tian, Xiaobin Wang, Xiaohua Lou
  • Patent number: 7876604
    Abstract: Self-reference reading a magnetic tunnel junction data cell methods are disclosed. An illustrative method includes applying a read voltage across a magnetic tunnel junction data cell and forming a read current. The magnetic tunnel junction data cell has a first resistance state. The read voltage is sufficient to switch the magnetic tunnel junction data cell resistance. The method includes detecting the read current and determining if the read current remains constant during the applying step. If the read current remains constant during the applying step, then the first resistance state of the magnetic tunnel junction data cell is the resistance state that the read voltage was sufficient to switch the magnetic tunnel junction data cell to.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: January 25, 2011
    Assignee: Seagate Technology LLC
    Inventors: Yuankai Zheng, Yiran Chen, Xiaobin Wang, Zheng Gao, Dimitar V. Dimitrov, Wenzhong Zhu, Yong Lu
  • Publication number: 20110007430
    Abstract: Apparatus and associated method for writing data to a non-volatile memory cell, such as spin-torque transfer random access memory (STRAM). In accordance with some embodiments, a resistive sense element (RSE) has a heat assist region, magnetic tunneling junction (MTJ), and pinned region. When a first logical state is written to the MTJ with a spin polarized current, the pinned and heat assist regions each have a substantially zero net magnetic moment. When a second logical state is written to the MTJ with a static magnetic field, the pinned region has a substantially zero net magnetic moment and the heat assist region has a non-zero net magnetic moment.
    Type: Application
    Filed: July 13, 2009
    Publication date: January 13, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Xiaohua Lou, Haiwen Xi, Michael Xuefei Tang
  • Publication number: 20110006385
    Abstract: A magnetic cell includes a ferromagnetic free layer having a free magnetization orientation direction and a first ferromagnetic pinned reference layer having a first reference magnetization orientation direction that is parallel or anti-parallel to the free magnetization orientation direction. A first oxide barrier layer is between the ferromagnetic free layer and the first ferromagnetic pinned reference layer. The magnetic cell further includes a second ferromagnetic pinned reference layer having a second reference magnetization orientation direction that is orthogonal to the first reference magnetization orientation direction. The ferromagnetic free layer is between the first ferromagnetic pinned reference layer and the second ferromagnetic pinned reference layer.
    Type: Application
    Filed: July 13, 2009
    Publication date: January 13, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Zheng Gao, Wenzhong Zhu, Wonjoon Jung, Haiwen Xi
  • Patent number: 7826256
    Abstract: Spin-transfer torque memory having a compensation element is disclosed. The spin-transfer torque memory unit includes a synthetic antiferromagnetic reference element, a synthetic antiferromagnetic compensation element, a free magnetic layer between the synthetic antiferromagnetic reference element and the synthetic antiferromagnetic compensation element, and an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the synthetic antiferromagnetic reference element. The free magnetic layer has a saturation moment value greater than 1100 emu/cc.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: November 2, 2010
    Assignee: Seagate Technology LLC
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov, Dexin Wang, Wei Tian, Xiaobin Wang, Xiaohua Lou
  • Patent number: 7826255
    Abstract: Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell.
    Type: Grant
    Filed: September 15, 2008
    Date of Patent: November 2, 2010
    Assignee: Seagate Technology LLC
    Inventors: Haiwen Xi, Hongyue Liu, Xiaobin Wang, Yong Lu, Yiran Chen, Yuankai Zheng, Dimitar V. Dimitrov, Dexin Wang, Hai Li
  • Publication number: 20100271870
    Abstract: A magnetic memory cell having a ferromagnetic free layer and a ferromagnetic pinned reference layer, each having an out-of-plane magnetic anisotropy and an out-of-plane magnetization orientation and switchable by spin torque. The cell includes a ferromagnetic assist layer proximate the free layer, the assist layer having a low magnetic anisotropy less than about 500 Oe. The assist layer may have in-plane or out-of-plane anisotropy.
    Type: Application
    Filed: April 28, 2009
    Publication date: October 28, 2010
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Haiwen Xi, Wonjoon Jung, Xuebing Feng, Xiaohua Lou, Zheng Gao
  • Publication number: 20100254174
    Abstract: A resistive sense memory and method of writing data thereto. In accordance with various embodiments, the resistive sense memory comprises a first reference layer with a fixed magnetic orientation in a selected direction coupled to a first tunneling barrier, a second reference layer with a fixed magnetic orientation in the selected direction coupled to a second tunneling barrier, and a recording structure disposed between the first and second tunneling barriers comprising first and second free layers. A selected logic state is written to the resistive sense memory by applying a programming input to impart complementary first and second programmed magnetic orientations to the respective first and second free layers.
    Type: Application
    Filed: April 2, 2009
    Publication date: October 7, 2010
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Xiaohua Lou, Zheng Gao, Wei Tian, Dimitar V. Dimitrov, Dexin Wang
  • Publication number: 20100238712
    Abstract: Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell.
    Type: Application
    Filed: June 4, 2010
    Publication date: September 23, 2010
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Haiwen Xi, Hongyue Liu, Xiaobin Wang, Yong Lu, Yiran Chen, Yuankai Zheng, Dimitar V. Dimitrov, Dexin Wang, Hai Li
  • Publication number: 20100220518
    Abstract: Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation.
    Type: Application
    Filed: May 18, 2010
    Publication date: September 2, 2010
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov, Haiwen Xi
  • Publication number: 20100195380
    Abstract: A method and apparatus for writing data to a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM) memory cell. In some embodiments, a selected resistive state is written to a magnetic tunneling structure by applying a succession of indeterminate write pulses thereto until the selected resistive state is verified.
    Type: Application
    Filed: February 3, 2009
    Publication date: August 5, 2010
    Applicant: Seagate Technology LLC
    Inventors: Xiaobin Wang, Yong Lu, Haiwen Xi, Yuankai Zheng, Yiran Chen, Harry Hongyue Liu, Dimitar Dimitrov, Wei Tian, Brian Seungwhan Lee
  • Patent number: 7746687
    Abstract: Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: June 29, 2010
    Assignee: Seagate Technology, LLC
    Inventors: Yuankai Zheng, Dimitar V. Dimitrov, Haiwen Xi