Abstract: An apparatus that includes a magnetic structure including a reference layer; and a free layer; an exchange coupling spacer layer; and a stabilizing layer, wherein the exchange coupling spacer layer is between the magnetic structure and the stabilizing layer and exchange couples the free layer of the magnetic structure to the stabilizing layer.

Abstract: Magnetic spin-torque memory cells, often referred to as magnetic tunnel junction cells, which have magnetic anisotropies (i.e., magnetization orientation at zero field and zero current) of the associated ferromagnetic layers aligned perpendicular to the wafer plane, or “out-of-plane”. A memory cell may have a ferromagnetic free layer, a first pinned reference layer and a second pinned reference layer, each having a magnetic anisotropy perpendicular to the substrate. The free layer has a magnetization orientation perpendicular to the substrate that is switchable by spin torque from a first orientation to an opposite second orientation.

Abstract: Self-reference reading a magnetic tunnel junction data cell methods are disclosed. An illustrative method includes applying a read voltage across a magnetic tunnel junction data cell and forming a read current. The magnetic tunnel junction data cell has a first resistance state. The read voltage is sufficient to switch the magnetic tunnel junction data cell resistance. The method includes detecting the read current and determining if the read current remains constant during the applying step. If the read current remains constant during the applying step, then the first resistance state of the magnetic tunnel junction data cell is the resistance state that the read voltage was sufficient to switch the magnetic tunnel junction data cell to.

Abstract: Spin-transfer torque memory includes a composite free magnetic element, a reference magnetic element having a magnetization orientation that is pinned in a reference direction, and an electrically insulating and non-magnetic tunneling barrier layer separating the composite free magnetic element from the magnetic reference element. The free magnetic element includes a hard magnetic layer exchanged coupled to a soft magnetic layer. The composite free magnetic element has a magnetization orientation that can change direction due to spin-torque transfer when a write current passes through the spin-transfer torque memory unit.

Abstract: A ferroelectric memory cell that has a magnetoelectric element between a first electrode and a second electrode, the magnetoelectric element comprising a ferromagnetic material layer and a multiferroic material layer with an interface therebetween. The magnetization orientation of the ferromagnetic material layer and the multiferroic material layer may be in-plane or out-of-plane. FeRAM memory devices are also provided.

Abstract: A magnetic stack with a multilayer free layer having a switchable magnetization orientation, the free layer comprising a first ferromagnetic portion and a second ferromagnetic portion with an electrically conducting non-magnetic intermediate layer between the first portion and the second portion. The magnetic stack also includes a first ferromagnetic reference layer having a pinned magnetization orientation, a first non-magnetic spacer layer between the free layer and the first reference layer, a second ferromagnetic reference layer having a pinned magnetization orientation, and a second non-magnetic spacer layer between the free layer and the second reference layer.

Abstract: A magnetic stack having a ferromagnetic free layer, a ferromagnetic pinned reference layer, a non-magnetic spacer layer between the free layer and the reference layer, and a variable layer proximate the free layer. The variable layer is antiferromagnetic at a first temperature and paramagnetic at a second temperature higher than the first temperature. During a writing process, the variable layer is paramagnetic. For magnetic memory cells, such as magnetic tunnel junction cells, the variable layer provides reduced switching currents.

Abstract: A magnetic memory unit includes a tunneling barrier separating a free magnetic element and a reference magnetic element. A first phonon glass electron crystal layer is disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element. A second phonon glass electron crystal layer also be disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element to provide a Peltier effect on the free magnetic element and the reference magnetic element.

Abstract: A magnetic stack having a ferromagnetic free layer, a metal oxide layer that is antiferromagnetic at a first temperature and non-magnetic at a second temperature higher than the first temperature, a ferromagnetic pinned reference layer, and a non-magnetic spacer layer between the free layer and the reference layer. During a writing process, the metal oxide layer is non-magnetic. For magnetic memory cells, such as magnetic tunnel junction cells, the metal oxide layer provides reduced switching currents.

Abstract: Spin-transfer torque memory having a compensation element is disclosed. The spin-transfer torque memory unit includes a synthetic antiferromagnetic reference element, a synthetic antiferromagnetic compensation element, a free magnetic layer between the synthetic antiferromagnetic reference element and the synthetic antiferromagnetic compensation element, and an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the synthetic antiferromagnetic reference element. The free magnetic layer has a saturation moment value greater than 1100 emu/cc.

Abstract: Flux-closed spin-transfer torque memory having a specular insulative spacer is disclosed. A flux-closed spin-transfer torque memory unit includes a multilayer free magnetic element including a first free magnetic layer anti-ferromagnetically coupled to a second free magnetic layer through an electrically insulating and electronically reflective layer. An electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic element from a reference magnetic layer.

Abstract: Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation.

Abstract: Spin-transfer torque memory having a specular insulative spacer is disclosed. The spin-transfer torque memory unit includes a free magnetic layer, a reference magnetic layer, an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the reference magnetic layer, an electrode layer, and an electrically insulating and electronically reflective layer separating the electrode layer and the free magnetic layer.

Abstract: Various embodiments of the present invention are generally directed to an apparatus and method associated with a semiconductor device with thermally coupled phase change layers. The semiconductor device comprises a first phase change layer selectively configurable in a relatively low resistance crystalline phase and a relatively high resistance amorphous phase, and a second phase change layer thermally coupled to the first phase change layer. The second phase change layer is characterized as a metal-insulator transition material. A programming pulse is applied to the semiconductor device from a first electrode layer to a second electrode layer to provide the first phase change layer with a selected resistance.

Abstract: Variable write and read methods for resistance random access memory (RRAM) are disclosed. The methods include initializing a write sequence and verifying the resistance state of the RRAM cell. If a write pulse is needed, then two or more write pulses are applied through the RRAM cell to write the desired data state to the RRAM cell. Each subsequent write pulse has substantially the same or greater write pulse duration. Subsequent write pulses are applied to the RRAM cell until the RRAM cell is in the desired data state or until a predetermined number of write pulses have been applied to the RRAM cell. A read method is also disclosed where subsequent read pulses are applied through the RRAM cell until the read is successful or until a predetermined number of read pulses have been applied to the RRAM cell.

Abstract: A memory cell for a magnetic memory device comprising a first hard magnetic later having a first fixed magnetization vector; a second hard magnetic later having a second fixed magnetization vector; a first soft magnetic layer having a first alterable magnetization vector and disposed adjacent to the first hard magnetic layer and a second soft magnetic layer having a second alterable magnetization vector and disposed adjacent to the second hard magnetic layer, the first and the second soft magnetic layers are magnetostatically coupled antiparallel to each other to form a flux-closed structure. An electrically conductive layer is disposed between the two soft magnetic layers for passing an electric current therethrough to perform the read and write operations. A magnetic memory device made thereof possesses a higher thermal stability against external thermal fluctuations and in the meantime has a lower power dissipation in writing operations.

Abstract: A magnetic memory device includes a plurality of transistors (316, 317) formed on a substrate and a common magnetic memory block (312) including a multiple effective magnetoresistive elements (318, 319), a ferromagnetic recording (312), a non-magnetic space (232), and a free magnetic reading (322) layer formed above the transistors (316, 317). An extended common digital line (315) is located above a common magnetic memory block (312) which is electrically connected with a respective source/drain electrode of the transistors (316, 317) through each a contact at a respective active area. The specific magnetization state of the ferromagnetic recording layer at the active areas can be changed by a heating process and applying an external field induced from the common digital line (315), the bit (309, 311) or word (307) lines.

Abstract: A magnetoresistive memory cell includes a magnetic tunnel junction (MTJ). The MTJ includes a magnetic layer having a pinned magnetic moment, a tunneling layer, and a free layer. The free layer includes first and second ferromagnetic layers having respective first and second free magnetic moments, which are anti-ferromagnetically coupled to each other and align with a preferred axis of alignment in the absence of an applied magnetic field. The MTJ has an electrical resistance dependent on the direction of one of the free magnetic moments. The memory cell also includes a guide layer formed of a ferromagnetic material providing a guiding magnetic moment, which is configured and positioned so that the guiding magnetic moment is more strongly magnetically coupled to the second free magnetic moment than to the first free magnetic moment, and is aligned with the axis in the absence of the applied magnetic field.

Abstract: A memory cell (310) for a magnetic memory device (300) includes a free layer (311), a cap layer, an antiferromagnetic layer, and a synthetic antiferromagnetic layer which comprises two or more than two ferromagnetic layers that are antiferromagnetically coupled through non-magnetic space layers. The synthetic antiferromagnetic layer is pinned by antiferromagnetic layer. The antiferromagnetic layer and the synthetic antiferromagnetic layer form a synthetic antiferromagnetic pinned (SAFP) recording layer. The magnetization of the SAFP recording layer can be changed by combining a heating process and an external field induced from currents flowing along the bit line (320) and the word line (330). Therefore, a MRAM with high density, high thermal stability, low power dissipation and high heat tolerance can be achieved after introducing the SAFP recording layer due to the high volume and anisotropy energy of the SAFP recording layer.

Abstract: A magnetic memory device includes a plurality of transistors (316, 317) formed on a substrate and a common magnetic memory block (312) including multiple effective magnetoresistive elements (318, 319), a ferromagnetic recording (321), a non-magnetic space (323), and a free magnetic reading (322) layer formed above the transistors (316, 317). An extended common digital line (315) is located above the common magnetic memory block (312). The common magnetic memory block (312) is electrically connected with a respective source/drain electrode of the transistors (316, 317) through each a contact at a respective active area. The specific magnetization state of the ferromagnetic recording layer at the active areas can be changed by a heating process and applying an external field induced from the common digital line (315) and the bit (309, 311) or word (307) or word (307) lines.