Patents by Inventor Yuichi Matsuda

Yuichi Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150254102
    Abstract: A master server assigns a first process to each of a plurality of slave servers. When the master server receives one or more completion notifications of one or more first tasks of a first process related to a second task of a second process that is assigned to each of the plurality of slave servers and that is executed by using one or more execution results of the one or more first tasks, the master server estimates a processing amount of the second task. The master server sends information related to the estimated processing amount to the slave servers to each of which the second task is assigned.
    Type: Application
    Filed: February 26, 2015
    Publication date: September 10, 2015
    Applicant: FUJITSU LIMITED
    Inventors: Haruyasu UEDA, Yuichi MATSUDA, Takamitsu MAEDA
  • Publication number: 20150137849
    Abstract: A probe card includes a first insulation layer, a contact terminal arranged on the first insulation layer, and a wiring pattern arranged on an upper surface of the first insulation layer. The wiring pattern includes a rewire connected to the contact terminal and a first pad connected to the rewire. The probe card further includes a wiring substrate. The wiring substrate includes an interlayer insulation layer, a wiring layer, and a cavity defined in central portions of the interlayer insulation layer and the wiring layer. The wiring substrate is spaced apart from the first insulation layer arranged in the cavity. The cavity is filled with a second insulation layer. A conductive wire is arranged in the second insulation layer to electrically connect the first contact terminal and the wiring layer. The second insulation layer has a lower elasticity than the interlayer insulation layer.
    Type: Application
    Filed: October 16, 2014
    Publication date: May 21, 2015
    Applicant: Shinko Electric Industries Co., LTD.
    Inventors: Michio Horiuchi, Ryo Fukasawa, Yuichi Matsuda, Yasue Tokutake
  • Publication number: 20150128150
    Abstract: A system uses a plurality of nodes to perform a first process on an input data set and a second process on a result of the first process. In response to specification of an input data set including a first segment and a second segment on which the first process was previously performed, the system selects, from the plurality of nodes, a first node and a second node storing at least a part of the result of the first process previously performed on the second segment. The first node performs the first process on the first segment. The second node performs the second process on at least a part of the result of the first process on the first segment transferred from the first node, and at least the part of the result, which is stored in the second node, of the first process on the second segment.
    Type: Application
    Filed: January 9, 2015
    Publication date: May 7, 2015
    Inventors: Haruyasu Ueda, YUICHI MATSUDA
  • Patent number: 9006586
    Abstract: One embodiment provides a wiring substrate including: a core substrate having an insulative base member, the insulative base member having a first surface and a second surface, a plurality of linear conductors penetrating through the insulative base member from the first surface to the second surface; an inorganic material layer joined to at least one of the first surface and the second surface of the insulative base member; and a penetration line penetrating through the inorganic material layer, wherein one end of the penetration line is electrically connected to a corresponding part of the linear conductors, without intervention of a bump.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: April 14, 2015
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Tomoo Yamasaki
  • Publication number: 20150022230
    Abstract: A probe card includes a wiring substrate including an opening portion, a first connection pad, and a second connection pad arranged in an opposite area to the first connection pad, a resin portion formed in the opening portion, a first wire buried in the resin portion, in which one end is connected to the first connection pad and other end constitutes a first contact terminal, and a second wire buried in the resin portion, in which one end is connected to the second connection pad and other end constitutes a second contact terminal, wherein the first and second wires extend on one line, and the first and second contact terminals are arranged on the one line, and the first and second contact terminals are gathered to be separated such that the first and second contact terminals touch one electrode pad of a text object with a pair.
    Type: Application
    Filed: July 10, 2014
    Publication date: January 22, 2015
    Inventors: Ryo FUKASAWA, Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Mitsuhiro AIZAWA
  • Publication number: 20150022229
    Abstract: A probe card, includes, a wiring substrate having an opening portion and including a first connection pad and a second connection pad, the first connection pad being arranged at a periphery of the opening portion, the second connection pad being arranged to be adjacent to the first connection pad, a resin portion formed inside the opening portion of the wiring substrate, a first wire buried in the resin portion and having one end connected to the first connection pad and the other end constituting a first contact terminal protruding from a lower face of the resin portion, and a second wire buried in the resin portion and having one end connected to the second connection pad and the other end constituting a second contact terminal protruding from the lower face of the resin portion, wherein diameters of the first contact terminal and the second contact terminal are equal to diameters of the first wire and the second wire in the resin portion, and the first contact terminal and the second contact terminal are g
    Type: Application
    Filed: July 10, 2014
    Publication date: January 22, 2015
    Inventors: Ryo FUKASAWA, Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Mitsuhiro AIZAWA
  • Publication number: 20140372611
    Abstract: An assigning method includes: identifying a distance between one or more first nodes to which first processing is assigned and one or more second nodes to which second processing to be performed on a processing result of the first processing is assignable, the first and second nodes being included in a plurality of nodes that are capable of performing communication; and determining a third node to which the second processing is to be assigned, based on the distance identified by the identifying, the third node being included in the one or more second nodes.
    Type: Application
    Filed: April 18, 2014
    Publication date: December 18, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi Matsuda, Haruyasu Ueda
  • Publication number: 20140347833
    Abstract: An electronic component device, includes, a plurality of wiring layers including a component connection pad in a center part and an external connection pad in a periphery, an insulating layer formed on the wiring layers, and the insulating layer in which the component connection pad and the external connection pad are exposed, a frame member arranged on the insulating layer, and the frame member in which an opening portion is provided in an area of the center part in which the component connection pad is arranged, and a connection hole is provided on the external connection pad, an electronic component arranged in the opening portion of the frame member and connected to the component connection pad, a sealing resin formed in the opening portion of the frame member and sealing the electronic component, and a metal bonding material formed on the external connection pad in the connection hole.
    Type: Application
    Filed: April 24, 2014
    Publication date: November 27, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio HORIUCHI, Ryo FUKASAWA, Yuichi MATSUDA, Yasue TOKUTAKE
  • Publication number: 20140262465
    Abstract: A wiring substrate includes, an insulating substrate in which a plurality of penetration conductors are provided, the penetration conductors penetrating in a thickness direction of the insulating substrate, a first connection pad arranged on one face of the insulating substrate, a second connection pad arranged to correspond to the first connection pad on other face of the insulating substrate, a first metal layer arranged to surround the first connection pad, a second metal layer arranged to correspond to the first metal layer, the second metal layer surrounding the second connection pad, the plurality of penetration conductors connecting the first connection pad and the second connection pad, and connecting the first metal layer and the second metal layer, and an elastic body formed in a part of the insulating substrate between the first and second connection pads, and the first and second metal layers.
    Type: Application
    Filed: March 10, 2014
    Publication date: September 18, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio HORIUCHI, Ryo FUKASAWA, Yuichi MATSUDA, Yasue TOKUTAKE
  • Patent number: 8832496
    Abstract: A computer-readable non-transitory recording medium storing therein an information managing program causing a computer to execute extracting from among events that have occurred at objects under management and having dependence relations, combinations of a first event that has occurred at a source-of-dependence object and a second event that has occurred at a dependent object dependent on the source-of-dependence object; judging for each extracted combination, whether a dependence relation exists between the first event and the second event, by using the difference between the time of occurrence of the first event and that of the second event; determining from among the events and based on a judgment result obtained at the judging, an event that has occurred at an object that is a source-of-dependence object but not a dependent object, to be an event to be stored; and storing to a database, information related to the event to be stored.
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: September 9, 2014
    Assignee: Fujitsu Limited
    Inventors: Yuichi Matsuda, Yuji Nomura
  • Publication number: 20140125372
    Abstract: A probe card includes a wiring substrate including an opening portion and a connection pad arranged on an upper face of the wiring substrate located on the periphery of the opening portion, a resin portion formed in the opening portion of the wiring substrate, and the resin portion formed of a material having elasticity, a contact terminal arranged to protrude from the lower face of the resin portion, and wire buried in the resin portion and connecting the contact terminal and the connection pad, wherein the contact terminal is formed of an end part of the wire, and is formed integrally with the wire.
    Type: Application
    Filed: October 28, 2013
    Publication date: May 8, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Ryo FUKASAWA, Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Mitsuhiro AIZAWA
  • Publication number: 20140117539
    Abstract: A wiring substrate includes a core layer, first and second wiring layers, and a first insulating layer. The core layer has one and another surfaces and includes a plate-shaped member formed of an aluminum oxide and multiple linear conductors penetrating the plate-shaped member in a thickness direction of the plate-shaped member. The first wiring layer is formed on the one surface of the core layer. The second wiring layer is formed on the other surface of the core layer. The first insulating layer has a same thickness as the first wiring layer and is formed in an area of the one surface of the core layer on which the first wiring layer is not formed. The first and second wiring layers are positioned superposing each other in a plan view. The first and second wiring layers are electrically connected by way of the multiple linear conductors.
    Type: Application
    Filed: October 28, 2013
    Publication date: May 1, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuko KARASAWA, Kazue Ban, Ryo Fukasawa, Yuichi Matsuda, Michio Horiuchi, Yasue Tokutake
  • Patent number: 8664764
    Abstract: One embodiment provides a semiconductor device having: a core substrate having first and second surfaces and an accommodation hole penetrating therethrough; a semiconductor element accommodated in the accommodation hole so that a front surface thereof is on the first surface side; a first metal film formed on a back surface of the semiconductor element; a second metal film formed on the second surface of the core substrate; an insulating layer covering the first and second metal films; and a third metal film formed on the insulating layer, via parts thereof penetrating through the insulating layer to respectively reach the first and second metal films.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: March 4, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda
  • Patent number: 8638542
    Abstract: A capacitor includes a dielectric substrate and a large number of filamentous conductors formed to penetrate through the dielectric substrate in a thickness direction thereof. An electrode is connected to only respective one ends of a plurality of filamentous conductors constituting one of groups each composed of a plurality of filamentous conductors. The electrode is disposed in at least one position on each of both surfaces of the dielectric substrate, or in at least two positions on one of the surfaces. Further, an insulating layer is formed on each of both surfaces of the dielectric substrate so as to cover regions between the electrodes, and a conductor layer is formed on the corresponding insulating layer integrally with a desired number of electrodes.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: January 28, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Yukio Shimizu, Tomoo Yamasaki, Yuta Sakaguchi
  • Publication number: 20130326535
    Abstract: A non-transitory computer-readable recording medium storing a program causing a processor to execute a process, the process includes detecting input of data into a memory to which data is inputted in sequence, the data being a processing object of first processing; allocating the first processing, of which a processing object is the data, with respect to any node in a communicable node group; determining whether or not the data is provided with tail information, the tail information indicating tail data of a series of data that are processing objects of the first processing, when detecting input of the data; and allocating second processing, of which a processing object is a processing result of the first processing that is executed with respect to each piece of data of the series of data, to any node of the node group when determining that the data is provided with the tail information.
    Type: Application
    Filed: May 23, 2013
    Publication date: December 5, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi MATSUDA, Haruyasu UEDA
  • Publication number: 20130081796
    Abstract: A thermal interface material includes a metal foil, which has a first surface and an opposite second surface, and a plurality of rod conductors each having a side surface extending in a thickness direction of the metal foil. The rod conductors are arranged on at least one of the first and second surfaces of the metal foil in a planar direction that is perpendicular to the thickness direction. A resin layer covers at least the first surface and the second surface of the metal foil and the side surfaces of the rod conductors.
    Type: Application
    Filed: September 13, 2012
    Publication date: April 4, 2013
    Applicant: Shinko Electric Industries Co., LTD.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda
  • Publication number: 20130048350
    Abstract: A base member includes: a core layer including: a plate-like body, made of aluminum oxide; and plural linear conductors, which penetrate through the plate-like body in a thickness direction of the plate-like body; a bonding layer, formed on at least one of a first surface and a second surface of the core layer; and a silicon layer or a glass layer, formed on the bonding layer.
    Type: Application
    Filed: August 17, 2012
    Publication date: February 28, 2013
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda
  • Patent number: 8362369
    Abstract: A wiring board includes a core substrate having a structure including an insulating base material and a large number of filamentous conductors densely provided in the insulating base material and piercing the insulating base material in a thickness direction thereof. Pads made of portions of wiring layers are oppositely disposed on both surfaces of the core substrate and electrically connected to opposite ends of a plurality of filamentous conductors in such a manner that the pads share the filamentous conductors. A wiring connection between one surface side and the other surface side of the core substrate is made through the pads. The insulating base material is made of an inorganic dielectric. Pads made of portions of the wiring layers are disposed on both surfaces of the core substrate and electrically connected only to corresponding one end sides of different groups each formed of a plurality of filamentous conductors.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: January 29, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Masao Nakazawa
  • Publication number: 20120327626
    Abstract: One embodiment provides a wiring substrate including: a core substrate having an insulative base member, the insulative base member having a first surface and a second surface, a plurality of linear conductors penetrating through the insulative base member from the first surface to the second surface; an inorganic material layer joined to at least one of the first surface and the second surface of the insulative base member; and a penetration line penetrating through the inorganic material layer, wherein one end of the penetration line is electrically connected to a corresponding part of the linear conductors, without intervention of a bump.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 27, 2012
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Tomoo Yamasaki
  • Publication number: 20120313245
    Abstract: One embodiment provides a semiconductor device having: a core substrate having first and second surfaces and an accommodation hole penetrating therethrough; a semiconductor element accommodated in the accommodation hole so that a front surface thereof is on the first surface side; a first metal film formed on a back surface of the semiconductor element; a second metal film formed on the second surface of the core substrate; an insulating layer covering the first and second metal films; and a third metal film formed on the insulating layer, via parts thereof penetrating through the insulating layer to respectively reach the first and second metal films.
    Type: Application
    Filed: June 11, 2012
    Publication date: December 13, 2012
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA