Patents by Inventor Yuji Kishida

Yuji Kishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9772310
    Abstract: To provide a biosensor including a suctioning mechanism while using a detection element such as a surface acoustic wave device, included are: a first cover member 1 including an element-accommodating recess 5 on an upper face thereof; a detection element 3 including an element substrate 10, and at least one detection unit 13 located on the upper face of the element substrate 10 to perform detection of an analyte; and a second cover member 2 joined to the first cover member 1 and covering the detection element 3, and including an inflow port 14 from which the analyte flows in and a groove 15 extending from the inflow port 14 to at least above the detection unit.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: September 26, 2017
    Assignee: KYOCERA CORPORATION
    Inventors: Atsuomi Fukuura, Toru Fukano, Yuji Kishida, Hiroyasu Tanaka, Hideharu Kurioka
  • Patent number: 9741588
    Abstract: A method of manufacturing a thin-film transistor substrate which includes a thin-film transistor includes: forming a planarization layer comprising polyimide material above the thin-film transistor; and heating the thin-film transistor at a temperature of 240° C. or lower after the planarization layer is formed.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: August 22, 2017
    Assignee: JOLED INC.
    Inventors: Yuji Kishida, Toshiaki Yoshitani
  • Publication number: 20170155104
    Abstract: This battery pack is assembled by welding an opening portion (20) of a waterproof bag (2) to provide an insertion opening (23) that is smaller than the total opening width (W) but allows a battery core pack (1) to be inserted, inserting the battery core pack (1) into the waterproof bag (2), then, closing the opening portion (20) of the waterproof bag (2), and placing the waterproof bag (2), in which the battery core pack (1) has been placed, into an external case (3). In this way, this battery pack can be assembled efficiently, with the battery core pack having been given a waterproof structure by the waterproof bag (2) while in an ideal state.
    Type: Application
    Filed: March 9, 2015
    Publication date: June 1, 2017
    Inventors: Haruhiko YONEDA, Masami HAINO, Yuji KISHIDA, Takeaki WAKABAYASHI
  • Publication number: 20170016858
    Abstract: A sensor apparatus according to an embodiment of the present invention includes an element substrate, an element electrode located on an upper surface of the element substrate, an insulating member covering at least a part of the element electrode, and a detection part that includes an immobilizing film located on the upper surface of the element substrate or an upper surface of the insulating member, and performs a detection of a detection object contained in a specimen. A surface roughness of the immobilizing film is smaller than a surface roughness of the element electrode. In a sensor apparatus of other embodiment of the present invention, an amount of oxygen in a surface layer part of the immobilizing film is smaller than an amount of oxygen in a surface layer part of the element electrode.
    Type: Application
    Filed: January 27, 2015
    Publication date: January 19, 2017
    Inventors: Kyohei KOBAYASHI, Yuji KISHIDA
  • Publication number: 20160372605
    Abstract: A thin-film transistor includes: a gate electrode; a channel layer not adjacent to the gate electrode; a channel protection layer exposing portion of the channel layer, a source electrode contacting the channel layer at portion of an exposed portion of the channel layer, and a drain electrode contacting the channel layer at portion of the exposed portion, in respective order. The channel layer includes oxide semiconductor. Surface of the channel protection layer includes upper surface and side surface extending from the upper surface to the exposed portion. The drain electrode has: a rising portion extending from above the exposed region to the channel layer along the side surface; and an upper surface covering portion continuous with the rising portion and extending onto portion of the upper surface. The upper surface covering portion has a facing portion facing a channel region and being 2.5 ?m or less in channel length direction.
    Type: Application
    Filed: June 20, 2014
    Publication date: December 22, 2016
    Applicant: JOLED INC.
    Inventors: Yuji KISHIDA, Toshiaki YOSHITANI
  • Patent number: 9508866
    Abstract: A thin-film transistor includes: a gate electrode; a channel layer not adjacent to the gate electrode; a channel protection layer exposing portion of the channel layer; a source electrode contacting the channel layer at portion of an exposed portion of the channel layer; and a drain electrode contacting the channel layer at portion of the exposed portion, in respective order. The channel layer includes oxide semiconductor. Surface of the channel protection layer includes upper surface and side surface extending from the upper surface to the exposed portion. The drain electrode has: a rising portion extending from above the exposed region to the channel layer along the side surface; and an upper surface covering portion continuous with the rising portion and extending onto portion of the upper surface. The upper surface covering portion has a facing portion facing a channel region and being 2.5 ?m or less in channel length direction.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: November 29, 2016
    Assignee: JOLED INC.
    Inventors: Yuji Kishida, Toshiaki Yoshitani
  • Publication number: 20160254280
    Abstract: A thin-film transistor includes: an oxide semiconductor layer; an insulating layer formed above the oxide semiconductor layer; and a source electrode and a drain electrode which are located at least partially on the insulating layer and are connected to the oxide semiconductor layer via an opening formed in the insulating layer. The thin-film transistor satisfies a relational expression L1?5.041 exp(5×10?18N), where L1 (?m) is one of protrusion widths of the oxide semiconductor layer in a channel width direction with respect to the source electrode or the drain electrode and N (cm?3) is a carrier density of the oxide semiconductor layer.
    Type: Application
    Filed: July 17, 2014
    Publication date: September 1, 2016
    Applicant: JOLED INC.
    Inventors: Mami NONOGUCHI, Tomoaki IZUMI, Hiroshi HAYASHI, Yuji KISHIDA
  • Publication number: 20160204139
    Abstract: A thin film transistor substrate includes: a gate electrode and a first electrode of a capacitor formed above a substrate so as to be arranged along a plane of the substrate; a gate insulating film formed on the gate electrode; a semiconductor layer formed on the gate insulating film; an insulating layer formed on the semiconductor layer and above the first electrode so as to expose portions of the semiconductor layer; a source electrode and a drain electrode formed above the insulating layer so as to be connected to the semiconductor layer at the exposed portions of the semiconductor layer; and a second electrode of the capacitor formed above the insulating layer, at a position opposite the first electrode, and the insulating layer above the gate electrode is thicker than the insulating layer above the first electrode.
    Type: Application
    Filed: May 27, 2014
    Publication date: July 14, 2016
    Applicant: JOLED INC.
    Inventors: Yuji KISHIDA, Takahiro KAWASHIMA, Yoshiaki NAKAZAKI
  • Publication number: 20160118244
    Abstract: A thin-film transistor includes: a gate electrode; a source electrode; a drain electrode; a channel layer that is in contact with the source electrode and the drain electrode, and includes oxide semiconductor; and a gate insulating layer that is disposed between the gate electrode and the channel layer, and is in contact with the gate electrode and the channel layer, wherein a region of the gate insulating layer that is in contact with the channel layer is a silicon compound film, and the silicon compound film contains silicon, nitrogen, and oxygen, and is formed by performing plasma processing for introducing, into a film containing silicon and one of nitrogen and oxygen, the other of nitrogen and oxygen.
    Type: Application
    Filed: February 27, 2014
    Publication date: April 28, 2016
    Applicant: JOLED INC.
    Inventors: Hiroshi HAYASHI, Yoshiaki NAKAZAKI, Yuji KISHIDA
  • Patent number: 9178075
    Abstract: A thin-film semiconductor device includes a gate electrode formed above a substrate; a gate insulating film formed to cover the gate electrode; a semiconductor layer formed above the gate insulating film and having a channel region; a channel protective layer formed above the semiconductor layer and containing an organic material which includes silicon, oxygen, and carbon; an interfacial layer which is formed in contact with the channel protective layer between the semiconductor layer and the channel protective layer, and which includes carbon as a major component, the carbon originating from the organic material; and a source electrode and a drain electrode which are electrically connected to the semiconductor layer.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: November 3, 2015
    Assignees: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD., JOLED INC.
    Inventors: Takahiro Kawashima, Hisao Nagai, Eiichi Satoh, Yuji Kishida, Genshiro Kawachi
  • Patent number: 9087904
    Abstract: A thin-film transistor includes: a gate electrode above a substrate; a gate insulating layer above the gate electrode; a semiconductor layer opposed to the gate electrode with the gate insulating layer therebetween; a protective layer above the semiconductor layer and comprising an organic material; and a source electrode and a drain electrode each of which has at least a portion located above the protective layer. The protective layer includes an altered layer which has at least a portion contacting the semiconductor layer, and which is generated by alteration of a surface layer of the protective layer in a region exposed from the source electrode and the drain electrode. A relational expression of Log10 Nt?0.0556?+16.86 is satisfied where Nt (cm?3) represents a defect density of the semiconductor layer and ? (°) represents a taper angle of an edge portion of the protective layer.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: July 21, 2015
    Assignee: JOLED INC.
    Inventors: Yuji Kishida, Eiichi Satoh, Takahiro Kawashima
  • Publication number: 20150200113
    Abstract: A method of manufacturing a thin-film transistor substrate which includes a thin-film transistor includes: forming a planarization layer comprising polyimide material above the thin-film transistor; and heating the thin-film transistor at a temperature of 240° C. or lower after the planarization layer is formed.
    Type: Application
    Filed: December 23, 2014
    Publication date: July 16, 2015
    Applicant: PANASONIC CORPORATION
    Inventors: Yuji KISHIDA, Toshiaki YOSHITANI
  • Patent number: 9012914
    Abstract: A method for manufacturing a thin-film transistor includes: preparing a substrate; forming a gate electrode above the substrate; forming a gate insulating layer above the gate electrode; forming a semiconductor film above the gate insulating layer; forming, above the semiconductor film, a protective layer comprising an organic material; forming a source electrode and a drain electrode which are opposed to each other and each of which has at least a portion located above the protective layer; forming a semiconductor layer patterned, by performing dry etching on the semiconductor film; and performing, in a hydrogen atmosphere, plasma treatment on an altered layer which (i) is a surface layer of the protective layer exposed from the source electrode and the drain electrode and altered by the dry etching, and (ii) has at least a portion contacting a surface of the semiconductor layer.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: April 21, 2015
    Assignee: Panasonic Corporation
    Inventors: Yuji Kishida, Kenichirou Nishida, Mitsutaka Matsumoto
  • Patent number: 8993383
    Abstract: A method for manufacturing a thin-film transistor, includes: preparing a substrate; forming a gate electrode above the substrate; forming a gate insulating layer above the gate electrode; forming a semiconductor film above the gate insulating layer; forming, above the semiconductor film, a protective layer comprising an organic material; forming a source electrode and a drain electrode above the protective layer; forming a semiconductor layer patterned, by performing dry etching on the semiconductor film; removing at least a portion of a region of an altered layer, the region contacting the semiconductor layer, the altered layer being a surface layer of the protective layer that is altered by the dry etching; and forming a passivation layer having a major component identical to a major component of the protective layer so as to contact the semiconductor layer in a region in which the altered layer has been removed.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: March 31, 2015
    Assignee: Panasonic Corporation
    Inventors: Yuji Kishida, Kazuhiro Yokota, Arinobu Kanegae
  • Publication number: 20140224002
    Abstract: To provide a biosensor including a suctioning mechanism while using a detection element such as a surface acoustic wave device, included are: a first cover member 1 including an element-accommodating recess 5 on an upper face thereof; a detection element 3 including an element substrate 10, and at least one detection unit 13 located on the upper face of the element substrate 10 to perform detection of an analyte; and a second cover member 2 joined to the first cover member 1 and covering the detection element 3, and including an inflow port 14 from which the analyte flows in and a groove 15 extending from the inflow port 14 to at least above the detection unit.
    Type: Application
    Filed: July 30, 2012
    Publication date: August 14, 2014
    Applicant: KYOCERA COPRORATION
    Inventors: Atsuomi Fukuura, Toru Fukano, Yuji Kishida, Hiroyasu Tanaka, Hideharu Kurioka
  • Patent number: 8766260
    Abstract: A substrate; a gate electrode formed above the substrate; a gate insulating film formed above the gate electrode; a crystalline silicon semiconductor layer formed above the gate insulating film; an amorphous silicon semiconductor layer formed above the crystalline silicon semiconductor layer; an organic protective film made of an organic material and formed above the amorphous silicon semiconductor layer; and a source electrode and a drain electrode formed above the amorphous silicon semiconductor layer interposing the organic protective film are included, and a charge density of the negative carriers in the amorphous silicon semiconductor layer is at least 3×1011 cm?2.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: July 1, 2014
    Assignees: Panasonic Corporation, Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Yuji Kishida, Takahiro Kawashima, Arinobu Kanegae, Genshirou Kawashi
  • Publication number: 20140167165
    Abstract: A thin-film transistor includes: a gate electrode above a substrate; a gate insulating layer above the gate electrode; a semiconductor layer opposed to the gate electrode with the gate insulating layer therebetween; a protective layer above the semiconductor layer and comprising an organic material; and a source electrode and a drain electrode each of which has at least a portion located above the protective layer. The protective layer includes an altered layer which has at least a portion contacting the semiconductor layer, and which is generated by alteration of a surface layer of the protective layer in a region exposed from the source electrode and the drain electrode. A relational expression of Log10 Nt?0.0556?+16.86 is satisfied where Nt (cm?3) represents a defect density of the semiconductor layer and ? (°) represents a taper angle of an edge portion of the protective layer.
    Type: Application
    Filed: May 29, 2013
    Publication date: June 19, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Yuji Kishida, Eiichi Satoh, Takahiro Kawashima
  • Publication number: 20140159044
    Abstract: A method for manufacturing a thin-film transistor, includes: preparing a substrate; forming a gate electrode above the substrate; forming a gate insulating layer above the gate electrode; forming a semiconductor film above the gate insulating layer; forming, above the semiconductor film, a protective layer comprising an organic material; forming a source electrode and a drain electrode above the protective layer; forming a semiconductor layer patterned, by performing dry etching on the semiconductor film; removing at least a portion of a region of an altered layer, the region contacting the semiconductor layer, the altered layer being a surface layer of the protective layer that is altered by the dry etching; and forming a passivation layer having a major component identical to a major component of the protective layer so as to contact the semiconductor layer in a region in which the altered layer has been removed.
    Type: Application
    Filed: May 29, 2013
    Publication date: June 12, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Yuji Kishida, Kazuhiro Yokota, Arinobu Kanegae
  • Publication number: 20140124783
    Abstract: A method for manufacturing a thin-film transistor includes: preparing a substrate; forming a gate electrode above the substrate; forming a gate insulating layer above the gate electrode; forming a semiconductor film above the gate insulating layer; forming, above the semiconductor film, a protective layer comprising an organic material; forming a source electrode and a drain electrode which are opposed to each other and each of which has at least a portion located above the protective layer; forming a semiconductor layer patterned, by performing dry etching on the semiconductor film; and performing, in a hydrogen atmosphere, plasma treatment on an altered layer which (i) is a surface layer of the protective layer exposed from the source electrode and the drain electrode and altered by the dry etching, and (ii) has at least a portion contacting a surface of the semiconductor layer.
    Type: Application
    Filed: May 29, 2013
    Publication date: May 8, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Yuji Kishida, Kenichirou Nishida, Mitsutaka Matsumoto
  • Publication number: 20130320339
    Abstract: A thin-film semiconductor device includes a gate electrode formed above a substrate; a gate insulating film formed to cover the gate electrode; a semiconductor layer formed above the gate insulating film and having a channel region; a channel protective layer formed above the semiconductor layer and containing an organic material which includes silicon, oxygen, and carbon; an interfacial layer which is formed in contact with the channel protective layer between the semiconductor layer and the channel protective layer, and which includes carbon as a major component, the carbon originating from the organic material; and a source electrode and a drain electrode which are electrically connected to the semiconductor layer.
    Type: Application
    Filed: February 27, 2012
    Publication date: December 5, 2013
    Applicants: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD., PANASONIC CORPORATION
    Inventors: Takahiro Kawashima, Hisao Nagai, Eiichi Satoh, Yuji Kishida, Genshiro Kawachi