Patents by Inventor Yuji Yano

Yuji Yano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11943425
    Abstract: A display device according to an embodiment of the present disclosure includes: a transparent screen; one or more imaging units; and a video projection unit that acquires positional information regarding a predetermined subject included in each of captured images obtained by the one or more imaging units and then irradiates the transparent screen with video light on the basis of the positional information to cause predetermined video to appear on the transparent screen for the subject.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: March 26, 2024
    Assignee: SONY GROUP CORPORATION
    Inventors: Tomoya Yano, Yuji Nakahata, Akira Tanaka
  • Patent number: 11886086
    Abstract: A light control sheet including a first transparent electrode layer, a second transparent electrode layer, a light control layer including a resin layer formed between the first transparent electrode layer and the second transparent electrode layer, the resin layer including voids dispersed therein and filled with a liquid crystal composition including liquid crystal molecules, and a first orientation layer formed between the first transparent electrode layer and the light control layer such that a haze of the light control layer is increased by applying a voltage to the first transparent electrode layer. The light control layer has a first surface in contact with the first orientation layer, and an area ratio of the voids at the first surface is 49% or more where the area ratio is a percentage of a total area of all the voids to an area of the first surface.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: January 30, 2024
    Assignee: TOPPAN Inc.
    Inventors: Kaori Morinaga, Taisuke Enya, Yuji Yano, Masayuki Takahashi
  • Publication number: 20230403039
    Abstract: A transmission circuit includes a first terminal configured so that a first voltage is applied thereto, a second terminal, a third terminal, and a fourth terminal configured so that a second voltage lower than the first voltage is applied thereto. The transmission circuit further includes a first variable resistor portion provided between the first terminal and the second terminal, a first current restriction portion configured to restrict a current flowing from the first terminal to the second terminal, a second variable resistor portion provided between the third terminal and the fourth terminal, a second current restriction portion configured to restrict a current flowing from the third terminal to the fourth terminal, and a control portion configured to control, based on transmission data, the respective resistance values of the first variable resistor portion and the second variable resistor portion.
    Type: Application
    Filed: August 16, 2023
    Publication date: December 14, 2023
    Inventors: Yuji YANO, Toru MUKAI
  • Publication number: 20230396288
    Abstract: A delay signal generation circuit includes first to nth (n representing a natural number equal to or larger than 2) delay circuits and first to nth output terminals. The delay signal generation circuit is configured such that, in a first mode, an input signal passes through the first to kth (k representing a natural number equal to or larger than 1 but equal to or smaller than n) delay circuits in order and reaches the kth output terminal, and in a second mode, the input signal passes through the kth to nth delay circuits in reverse order and reaches the kth output terminal.
    Type: Application
    Filed: August 17, 2023
    Publication date: December 7, 2023
    Inventors: Yuji YANO, Toru MUKAI
  • Publication number: 20230266629
    Abstract: A light control sheet including a first transparent electrode layer, a second transparent electrode layer, a light control layer including a resin layer formed between the first transparent electrode layer and the second transparent electrode layer, the resin layer including voids dispersed therein and filled with a liquid crystal composition including liquid crystal molecules, and a first orientation layer formed between the first transparent electrode layer and the light control layer such that a haze of the light control layer is increased by applying a voltage to the first transparent electrode layer. The light control layer has a first surface in contact with the first orientation layer, and an area ratio of the voids at the first surface is 49% or more where the area ratio is a percentage of a total area of all the voids to an area of the first surface.
    Type: Application
    Filed: April 27, 2023
    Publication date: August 24, 2023
    Applicant: TOPPAN Inc.
    Inventors: Kaori MORINAGA, Taisuke ENYA, Yuji YANO, Masayuki TAKAHASHI
  • Patent number: 11609488
    Abstract: A screen including a light control sheet which includes a front surface and a rear surface and has a transparent state and an opaque state, and a transparent reflective layer that faces the rear surface. The front surface is positioned such that light from a projection device is applied in the opaque state. The opaque state includes a state in which an average diffuse reflectance of visible light applied to the front surface is 10% or more and less than 20%.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: March 21, 2023
    Assignee: TOPPAN Inc.
    Inventors: Kei Saito, Sohei Abe, Yuji Yano, Saori Matsuyama
  • Patent number: 11456743
    Abstract: There is provided a differential signal transmission circuit that includes a first output terminal, a second output terminal connected to the first output terminal via a load resistor, a high-side transistor formed of a p-channel MOSFET and connected between an application terminal of a power supply voltage and the first output terminal, a low-side transistor formed of an n-channel MOSFET and connected between an application terminal of a ground potential and the second output terminal, a high-side pre-driver configured to drive the high-side transistor, a low-side pre-driver configured to drive the low-side transistor, a first resistance part connected between an output end of the high-side pre-driver and a gate of the high-side transistor, and a second resistance part connected between an output end of the low-side pre-driver and a gate of the low-side transistor.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: September 27, 2022
    Assignee: Rohm Co., Ltd.
    Inventor: Yuji Yano
  • Publication number: 20220113617
    Abstract: A screen including a light control sheet which includes a front surface and a rear surface and has a transparent state and an opaque state, and a transparent reflective layer that faces the rear surface. The front surface is positioned such that light from a projection device is applied in the opaque state. The opaque state includes a state in which an average diffuse reflectance of visible light applied to the front surface is 10% or more and less than 20%.
    Type: Application
    Filed: December 23, 2021
    Publication date: April 14, 2022
    Applicant: TOPPAN Inc.
    Inventors: Kei SAITO, Sohei ABE, Yuji YANO, Saori MATSUYAMA
  • Publication number: 20210013884
    Abstract: There is provided a differential signal transmission circuit that includes a first output terminal, a second output terminal connected to the first output terminal via a load resistor, a high-side transistor formed of a p-channel MOSFET and connected between an application terminal of a power supply voltage and the first output terminal, a low-side transistor formed of an n-channel MOSFET and connected between an application terminal of a ground potential and the second output terminal, a high-side pre-driver configured to drive the high-side transistor, a low-side pre-driver configured to drive the low-side transistor, a first resistance part connected between an output end of the high-side pre-driver and a gate of the high-side transistor, and a second resistance part connected between an output end of the low-side pre-driver and a gate of the low-side transistor.
    Type: Application
    Filed: July 7, 2020
    Publication date: January 14, 2021
    Applicant: ROHM CO., LTD.
    Inventor: Yuji YANO
  • Patent number: 10297291
    Abstract: The present invention provides a semiconductor device that can reduce the power consumption. The semiconductor device includes a plurality of sub-blocks each including a memory cell array, and a plurality of sub-search units corresponding to the respective sub-blocks. Of the data stored in each row of the memory cell array, each sub-block searches for data that matches the input search data according to a search instruction, and outputs a search result indicating hit or miss for each row. Each sub-search unit includes a flag data generation part that generates flag data for presearch to compare with part of the input search data based on the data stored in the corresponding memory cell array, and a search part that compares part of the input search data with the flag data generated by the flag data generation part, and outputs the search instruction to the corresponding sub-block based on the comparison result.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: May 21, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Takeo Miki, Yuji Yano, Hideaki Abe
  • Patent number: 9904252
    Abstract: Whether a bright state or a dark state is established is determined each time a motor is driven one step, based on a presence or absence of a passing of light through a detection hole disposed in a detection wheel that rotates associated with rotations of a hand wheel coupled with the motor. A switching position X is identified at which the dark state is switched to the bright state when the dark state is determined and thereafter the bright state is determined. A position one step after the identified switching position X is set to be a reference position X+1 of the hand wheel. The reference positions X+1 and X?1 can thereby be set after a driving mechanism is assembled.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: February 27, 2018
    Assignee: CITIZEN WATCH CO., LTD.
    Inventors: Akira Kato, Kazuya Imamura, Shoichiro Morita, Yuji Yano
  • Publication number: 20180025755
    Abstract: The present invention provides a semiconductor device that can reduce the power consumption. The semiconductor device includes a plurality of sub-blocks each including a memory cell array, and a plurality of sub-search units corresponding to the respective sub-blocks. Of the data stored in each row of the memory cell array, each sub-block searches for data that matches the input search data according to a search instruction, and outputs a search result indicating hit or miss for each row. Each sub-search unit includes a flag data generation part that generates flag data for presearch to compare with part of the input search data based on the data stored in the corresponding memory cell array, and a search part that compares part of the input search data with the flag data generated by the flag data generation part, and outputs the search instruction to the corresponding sub-block based on the comparison result.
    Type: Application
    Filed: May 9, 2017
    Publication date: January 25, 2018
    Inventors: Takeo MIKI, Yuji YANO, Hideaki ABE
  • Patent number: 9711592
    Abstract: A diode includes: a p-type semiconductor substrate; an n-type semiconductor layer; a p-type isolation region formed to surround a predetermined region of the n-type semiconductor layer on the p-type semiconductor substrate; an n-type buried layer formed across the p-type semiconductor layer and the n-type semiconductor layer within the predetermined region; an n-type collector wall formed in the n-type semiconductor layer; a p-type anode region and a plurality of n-type cathode regions formed in a diode formation region; and a p-type guard ring formed to surround the diode formation region in a region between the diode formation region of the surface layer of the n-type semiconductor layer and the p-type isolation region. A transistor for reducing a leakage current is formed by the p-type anode region, the p-type guard ring, and an n-type semiconductor between the p-type anode region and the p-type guard ring.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: July 18, 2017
    Assignee: Rohm Co., Ltd.
    Inventor: Yuji Yano
  • Publication number: 20170017206
    Abstract: Whether a bright state or a dark state is established is determined each time a motor is driven one step, based on a presence or absence of a passing of light through a detection hole disposed in a detection wheel that rotates associated with rotations of a hand wheel coupled with the motor. A switching position X is identified at which the dark state is switched to the bright state when the dark state is determined and thereafter the bright state is determined. A position one step after the identified switching position X is set to be a reference position X+1 of the hand wheel. The reference positions X+1 and X?1 can thereby be set after a driving mechanism is assembled.
    Type: Application
    Filed: September 29, 2016
    Publication date: January 19, 2017
    Applicants: CITIZEN HOLDINGS CO., LTD.
    Inventors: Akira KATO, Kazuya IMAMURA, Shoichiro MORITA, Yuji YANO
  • Publication number: 20160148996
    Abstract: A diode includes: a p-type semiconductor substrate; an n-type semiconductor layer; a p-type isolation region formed to surround a predetermined region of the n-type semiconductor layer on the p-type semiconductor substrate; an n-type buried layer formed across the p-type semiconductor layer and the n-type semiconductor layer within the predetermined region; an n-type collector wall formed in the n-type semiconductor layer; a p-type anode region and a plurality of n-type cathode regions formed in a diode formation region; and a p-type guard ring formed to surround the diode formation region in a region between the diode formation region of the surface layer of the n-type semiconductor layer and the p-type isolation region. A transistor for reducing a leakage current is formed by the p-type anode region, the p-type guard ring, and an n-type semiconductor between the p-type anode region and the p-type guard ring.
    Type: Application
    Filed: January 29, 2016
    Publication date: May 26, 2016
    Inventor: Yuji Yano
  • Patent number: 9276061
    Abstract: A diode includes: a p-type semiconductor substrate; an n-type semiconductor layer; a p-type isolation region formed to surround a predetermined region of the n-type semiconductor layer on the p-type semiconductor substrate; an n-type buried layer formed across the p-type semiconductor layer and the n-type semiconductor layer within the predetermined region; an n-type collector wall formed in the n-type semiconductor layer; a p-type anode region and a plurality of n-type cathode regions formed in a diode formation region; and a p-type guard ring formed to surround the diode formation region in a region between the diode formation region of the surface layer of the n-type semiconductor layer and the p-type isolation region. A transistor for reducing a leakage current is formed by the p-type anode region, the p-type guard ring, and an n-type semiconductor between the p-type anode region and the p-type guard ring.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: March 1, 2016
    Assignee: Rohm Co., Ltd.
    Inventor: Yuji Yano
  • Patent number: 9135966
    Abstract: A semiconductor device includes a plurality of memory arrays and a plurality of memory array control circuits. Each of the plurality of memory array control circuits includes a read/write control circuit for controlling a read/write operation for the memory array, and a selection circuit for selecting and activating the memory array based on a clock signal and an output signal from the read/write control circuit.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: September 15, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hisashi Iwamoto, Yuji Yano, Kazunari Inoue
  • Patent number: 9085111
    Abstract: An optical element according to the present invention includes: an optical surface at a center portion thereof; a spacer section having a predetermined thickness on an outer circumference side of the optical surface; a support plate including one or a plurality of through holes penetrating the optical surface, inside a transparent resin material; and a penetrating portion and/or a concave portion for releasing the resin material when forming resin, in a further outer peripheral portion of the support plate.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: July 21, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yuji Yano, Takahiro Nakahashi, Tetsuya Tamiya
  • Publication number: 20150162400
    Abstract: A diode includes: a p-type semiconductor substrate; an n-type semiconductor layer; a p-type isolation region formed to surround a predetermined region of the n-type semiconductor layer on the p-type semiconductor substrate; an n-type buried layer formed across the p-type semiconductor layer and the n-type semiconductor layer within the predetermined region; an n-type collector wall formed in the n-type semiconductor layer; a p-type anode region and a plurality of n-type cathode regions formed in a diode formation region; and a p-type guard ring formed to surround the diode formation region in a region between the diode formation region of the surface layer of the n-type semiconductor layer and the p-type isolation region. A transistor for reducing a leakage current is formed by the p-type anode region, the p-type guard ring, and an n-type semiconductor between the p-type anode region and the p-type guard ring.
    Type: Application
    Filed: December 5, 2014
    Publication date: June 11, 2015
    Inventor: Yuji Yano
  • Patent number: 8866949
    Abstract: An optical element module according to the present invention is provided, in which: a plurality of optical elements are housed within a light shielding holder; a metal light shielding plate is interposed at least between respective planarized surfaces of a spacer section of an upper optical element and a spacer section of a lower optical element; the light shielding plate includes an opening formed at a position corresponding to an optical surface of the optical element; and the light shielding plate includes a cut section, which is formed by cutting a part of a peripheral edge of the light shielding plate.
    Type: Grant
    Filed: August 26, 2010
    Date of Patent: October 21, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yuji Yano, Hideyuki Kurimoto