Abstract: An optical element according to the present invention is provided, which comprises an optical surface at a center portion thereof; and a spacer section having a predetermined thickness on an outer circumference side of the optical surface, in which a surface height of the spacer section is configured to be higher than a surface height of the optical surface.

Abstract: An optical element according to the present invention includes: an optical surface at a center portion thereof; a spacer section having a predetermined thickness on an outer circumference side of the optical surface; a support plate including one or a plurality of through holes penetrating a portion corresponding to the optical surface, provided inside a transparent resin material, wherein the support plate has light shielding characteristics, an outer circumference portion side of the through hole of the support plate is provided inside the spacer section, and the outer circumference portion side of the through hole is configured to be thicker than a further outer circumference portion side thereof.

Abstract: An optical element according to the present invention includes: an optical surface at a center portion thereof; and a spacer section having a predetermined thickness on an outer circumference side of the optical surface, wherein a bottom portion for positioning an adhesive is provided on a further outer circumference side of the spacer section with a tapered portion interposed therebetween.

Abstract: A bump structure includes a squashed ball provided on an electrode pad, and a wire provided on the squashed ball. The wire is a wire loop that is loop-shaped and is formed so as to protrude from an end part of the squashed ball. This provides high bonding reliability between a bonding pad and the bump structure.

Abstract: A storage device is connected to a large-capacity low-speed memory, and divides a packet received via a network into a plurality of segments for storage. The storage device includes a small-capacity high-speed memory. A selector writes the first predetermined number of segments in the packet to the small-capacity high-speed memory, and subsequent segments to the large-capacity low-speed memory. Accordingly, regardless of from what queue a segment is read out in a segment read mode, occurrence of wasteful time in packet transfer can be prevented, and the capacity of the small-capacity high-speed memory can be reduced even when the number of queues increases.

Abstract: The power transmission device has an internally meshing planetary gear mechanism that has an input shaft, an eccentric body provided on the input shaft, an externally toothed gear eccentrically oscillating via the eccentric body, and an internally toothed gear with which the externally toothed gear internally meshes. The externally toothed gear is assembled to the internally toothed gear in an interference fit.

Abstract: In a manufacturing method of a semiconductor device, a substrate and a plurality of semiconductor chips stacked on the substrate are connected to each other by a ball bonding method adopting a reverse method. Specifically, after first bonding on a bonding pad on the substrate, a gold wire is led to a bonding pad of a semiconductor chip of the bottom layer, and by second bonding, a wire for connecting the substrate and the semiconductor chip of the bottom layer is formed. Similarly, other semiconductor chips are also connected to the substrate from the layer on the bottom. As a result, it is possible to reduce the package size, to provide a sufficient clearance between wires, and to reduce restrictions on combinations of semiconductor chips to be stacked.

Abstract: A semiconductor device has a plurality of external connection lands arranged on a base substrate for an external connection terminal used for electrical connection with an external member. The external connection lands at different arrangement positions have different heights in accordance with a warp of the base substrate which warp the base substrate would have when mounted. Thus, even when the semiconductor device, which attains a thin thickness and a high density, is warped, it is possible to provide a semiconductor device having a high connection yield and high connection reliability between the semiconductor device and a mounting substrate and between the semiconductor devices, and it is possible to provide a layered type semiconductor device using the same, a base substrate and a semiconductor device manufacturing method.

Abstract: A semiconductor device of the present invention includes: a laminate structure, including a semiconductor chip, partially sealed with a resin; and a stress relief section for relieving a stress during resin sealing, provided as a convex section including a plain top surface on an uppermost section of the laminate structure, the stress relief section being provided in an annular shape on a peripheral region of the uppermost section so as to come into contact with the sealing resin. This makes it possible to improve the manufacturing yield of the semiconductor device in which the member of the uppermost section is exposed.

Abstract: A bump structure includes a squashed ball provided on an electrode pad, and a wire provided on the squashed ball. The wire is a wire loop that is loop-shaped and is formed so as to protrude from an end part of the squashed ball. This provides high bonding reliability between a bonding pad and the bump structure.

Abstract: In a manufacturing method of a semiconductor device, a substrate and a plurality of semiconductor chips stacked on the substrate are connected to each other by a ball bonding method adopting a reverse method. Specifically, after first bonding on a bonding pad on the substrate, a gold wire is led to a bonding pad of a semiconductor chip of the bottom layer, and by second bonding, a wire for connecting the substrate and the semiconductor chip of the bottom layer is formed. Similarly, other semiconductor chips are also connected to the substrate from the layer on the bottom. As a result, it is possible to reduce the package size, to provide a sufficient clearance between wires, and to reduce restrictions on combinations of semiconductor chips to be stacked.

Abstract: In a manufacturing method of a semiconductor device, a substrate and a plurality of semiconductor chips stacked on the substrate are connected to each other by a ball bonding method adopting a reverse method. Specifically, after first bonding on a bonding pad on the substrate, a gold wire is led to a bonding pad of a semiconductor chip of the bottom layer, and by second bonding, a wire for connecting the substrate and the semiconductor chip of the bottom layer is formed. Similarly, other semiconductor chips are also connected to the substrate from the layer on the bottom. As a result, it is possible to reduce the package size, to provide a sufficient clearance between wires, and to reduce restrictions on combinations of semiconductor chips to be stacked.

Abstract: A semiconductor device includes: a base substrate; a semiconductor chip formed on the base substrate in such a manner that an adhesive layer is interposed between the semiconductor chip and the base substrate; a resin layer covering at least a portion of the semiconductor chip; and an external connection terminal electrically connected to the base substrate via a wiring layer. The external connection terminal is in the same plane as the surface of the resin layer, and is exposed from the resin layer. With this configuration, it is possible to provide a semiconductor device of a lower stage, and a stacked semiconductor device, each of which is high in connection reliability in a case of stacking plural semiconductor devices, no matter if a connection terminal of a semiconductor device stacked on an upper stage is low.

Abstract: In the present invention, focusing on the point that the number of transistors can be reduced to about ? of that in a prior art due to an absolute-value-of-difference calculating circuit for an associative memory being configured of an addition circuit and a bit inversion circuit. The absolute-value-of-difference calculating circuit is built in a fully-parallel type associative memory as a unit comparison circuit, and all of the outputs of the absolute-value-of-difference calculating circuits for which the number of comparisons thereof are prepared are input to weight comparison circuits, whereby the calculation of the Manhattan distance between the search data and the reference data is carried out. In accordance with the configuration, because a Manhattan distance calculating circuit can be realized by a fewer number of transistors and with a small area, an associative memory apparatus as well can be realized at a low power consumption and with a small area.

Abstract: A semiconductor device of the present invention includes a semiconductor elements on a circuit board of the semiconductor device, interposing an adhesive material between the semiconductor element and the circuit board. Further, a connection use circuit board including an external terminal connecting portion is mounted on an upper surface of the semiconductor element, interposing an adhesive material between the connection use circuit board and the semiconductor element, and a lower surface of the connection use circuit board and the upper surface of the circuit board are connected with each other via an electrically conductive terminal. A space between the circuit board and the connection use circuit board is sealed with sealing resin.

Abstract: In the present invention, focusing on the point that the number of transistors can be reduced to about ? of that in a prior art due to an absolute-value-of-difference calculating circuit for an associative memory being configured of an addition circuit and a bit inversion circuit. The absolute-value-of-difference calculating circuit is built in a fully-parallel type associative memory as a unit comparison circuit, and all of the outputs of the absolute-value-of-difference calculating circuits for which the number of comparisons thereof are prepared are input to weight comparison circuits, whereby the calculation of the Manhattan distance between the search data and the reference data is carried out. In accordance with the configuration, because a Manhattan distance calculating circuit can be realized by a fewer number of transistors and with a small area, an associative memory apparatus as well can be realized at a low power consumption and with a small area.

Abstract: In a manufacturing method of a semiconductor device, a substrate and a plurality of semiconductor chips stacked on the substrate are connected to each other by a ball bonding method adopting a reverse method. Specifically, after first bonding on a bonding pad on the substrate, a gold wire is led to a bonding pad of a semiconductor chip of the bottom layer, and by second bonding, a wire for connecting the substrate and the semiconductor chip of the bottom layer is formed. Similarly, other semiconductor chips are also connected to the substrate from the layer on the bottom. As a result, it is possible to reduce the package size, to provide a sufficient clearance between wires, and to reduce restrictions on combinations of semiconductor chips to be stacked.

Abstract: A wiring substrate of the present invention includes a terminal section, provided on a first surface of an insulating substrate, for wire or flip-chip bondings; a land section, provided on the insulating substrate, for an external connection terminal; wiring patterns, respectively provided on the first surface and a second surface on the other side of the first surface, for making electrical connection between the terminal section and the land section; and a support pattern, provided on the second surface corresponding in position to the terminal section, for improving bondings. The wiring substrate can relieve connection failure in bondings.

Abstract: The invention is directed to a liquid crystal display apparatus comprising: a liquid crystal panel constructed by sandwiching a liquid crystal between a first transparent substrate having a plurality of data lines and a second transparent substrate having a plurality of scanning lines crossing the data lines; a data line driving integrated circuit connected to the plurality of data lines; and a scanning line driving integrated circuit for driving the plurality of scanning lines, wherein the data line driving integrated circuit is mounted on the first transparent electrode substrate, and the scanning line driving integrated circuit is mounted on the second transparent substrate, and wherein an swinging power supply integrated circuit for swinging a power supply potential of the scanning line driving integrated circuit while maintaining a constant amplitude in response to a liquid crystal driving AC signal is provided which is mounted directly on the first transparent substrate or on the second transparent subs

Abstract: In a manufacturing method of a semiconductor device, a substrate and a plurality of semiconductor chips stacked on the substrate are connected to each other by a ball bonding method adopting a reverse method. Specifically, after first bonding on a bonding pad on the substrate, a gold wire is led to a bonding pad of a semiconductor chip of the bottom layer, and by second bonding, a wire for connecting the substrate and the semiconductor chip of the bottom layer is formed. Similarly, other semiconductor chips are also connected to the substrate from the layer on the bottom. As a result, it is possible to reduce the package size, to provide a sufficient clearance between wires, and to reduce restrictions on combinations of semiconductor chips to be stacked.