Abstract: In a crawler type work machine, when switching from a pivot turning mode to a straight travel mode or a slow turning mode, a controller is configured to maintain a rotation speed of the turning motor until after a first timing at which the inside steering clutch begins partial engagement.

Abstract: A semiconductor device including a field-effect transistor having source and drain source regions, first and second gate electrodes and a protective diode connected to the transistor. The first gate electrode is formed over a first gate insulating film in a lower part of a trench. The second gate electrode is formed over a second gate insulating film in an upper part of the trench. The first gate electrode includes a first polysilicon film, and the second gate electrode includes a second polysilicon film, wherein an impurity concentration of the first polysilicon film is lower than an impurity concentration of the second polysilicon film.

Abstract: A semiconductor device including a field-effect transistor having source and drain source regions, first and second gate electrodes and a protective diode connected to the transistor. The first gate electrode is formed over a first gate insulating film in a lower part of a trench. The second gate electrode is formed over a second gate insulating film in an upper part of the trench. The first gate electrode includes a first polysilicon film, and the second gate electrode includes a second polysilicon film, wherein an impurity concentration of the first polysilicon film is lower than an impurity concentration of the second polysilicon film.

Abstract: A semiconductor device including a field-effect transistor having source and drain source regions, first and second gate electrodes and a protective diode connected to the transistor. The first gate electrode is formed over a first gate insulating film in a lower part of a trench. The second gate electrode is formed over a second gate insulating film in an upper part of the trench. The first gate electrode includes a first polysilicon film, and the second gate electrode includes a second polysilicon film, wherein an impurity concentration of the first polysilicon film is lower than an impurity concentration of the second polysilicon film.

Abstract: A semiconductor device including a field-effect transistor having source and drain source regions, first and second gate electrodes and a protective diode connected to the transistor. The first gate electrode is formed over a first gate insulating film in a lower part of a trench. The second gate electrode is formed over a second gate insulating film in an upper part of the trench. The first gate electrode includes a first polysilicon film, and the second gate electrode includes a second polysilicon film, wherein an impurity concentration of the first polysilicon film is lower than an impurity concentration of the second polysilicon film.

Abstract: A semiconductor device having a field-effect transistor, including a trench in a semiconductor substrate, a first insulating film in the trench, an intrinsic polycrystalline silicon film over the first insulating film, and first conductivity type impurities in the intrinsic polycrystalline silicon film to form a first conductive film. The first conductive film is etched to form a first gate electrode in the trench. A second insulating film is also formed in the trench above the first insulating film and the first gate electrode, and a first conductivity type doped polycrystalline silicon film, having higher impurity concentration than the first gate electrode is formed over the second insulating film. The doped polycrystalline silicon film is provided in an upper part of the trench to form a second gate electrode.

Abstract: A semiconductor device having a field-effect transistor, including a trench in a semiconductor substrate, a first insulating film in the trench, an intrinsic polycrystalline silicon film over the first insulating film, and first conductivity type impurities in the intrinsic polycrystalline silicon film to form a first conductive film. The first conductive film is etched to form a first gate electrode in the trench. A second insulating film is also formed in the trench above the first insulating film and the first gate electrode, and a first conductivity type doped polycrystalline silicon film, having higher impurity concentration than the first gate electrode is formed over the second insulating film. The doped polycrystalline silicon film is provided in an upper part of the trench to form a second gate electrode.

Abstract: A semiconductor device having a field-effect transistor, including a trench in a semiconductor substrate, a first insulating film in the trench, an intrinsic polycrystalline silicon film over the first insulating film, and first conductivity type impurities in the intrinsic polycrystalline silicon film to form a first conductive film. The first conductive film is etched to form a first gate electrode in the trench. A second insulating film is also formed in the trench above the first insulating film and the first gate electrode, and a first conductivity type doped polycrystalline silicon film, having higher impurity concentration than the first gate electrode is formed over the second insulating film. The doped polycrystalline silicon film is provided in an upper part of the trench to form a second gate electrode.

Abstract: A semiconductor device having a field-effect transistor, including a trench in a semiconductor substrate, a first insulating film in the trench, an intrinsic polycrystalline silicon film over the first insulating film, and first conductivity type impurities in the intrinsic polycrystalline silicon film to form a first conductive film. The first conductive film is etched to form a first gate electrode in the trench. A second insulating film is also formed in the trench above the first insulating film and the first gate electrode, and a first conductivity type doped polycrystalline silicon film, having higher impurity concentration than the first gate electrode is formed over the second insulating film. The doped polycrystalline silicon film is provided in an upper part of the trench to form a second gate electrode.

Abstract: A method for manufacturing a semiconductor device having a field-effect transistor, including forming a trench in a semiconductor substrate, forming a first insulating film in the trench, forming an intrinsic polycrystalline silicon film over the first insulating film, and introducing first conductive type impurities into the intrinsic polycrystalline silicon film to form a first conductive film. The first conductive film is etched to form a first gate electrode in the trench. Next, a second insulating film is formed in the trench above the first insulating film and the first gate electrode, and a first conductivity type doped polycrystalline silicon film, having higher impurity concentration than the first gate electrode is formed over the second insulating film. The doped polycrystalline silicon film, upper part of the trench ton form a second gate electrode.

Abstract: A method for manufacturing a semiconductor device having a field-effect transistor, including forming a trench in a semiconductor substrate, forming a first insulating film in the trench, forming an intrinsic polycrystalline silicon film over the first insulating film, and introducing first conductive type impurities into the intrinsic polycrystalline silicon film to form a first conductive film. The first conductive film is etched to form a first gate electrode in the trench. Next, a second insulating film is formed in the trench above the first insulating film and the first gate electrode, and a first conductivity type doped polycrystalline silicon film, having higher impurity concentration than the first gate electrode is formed over the second insulating film. The doped polycrystalline silicon film, upper part of the trench ton form a second gate electrode.

Abstract: A method for manufacturing a semiconductor device having a field-effect transistor, including forming a trench in a semiconductor substrate, forming a first insulating film in the trench, forming an intrinsic polycrystalline silicon film over the first insulating film, and introducing first conductive type impurities into the intrinsic polycrystalline silicon film to form a first conductive film. The first conductive film is etched to form a first gate electrode in the trench. Next, a second insulating film is formed in the trench above the first insulating film and the first gate electrode, and a first conductivity type doped polycrystalline silicon film, having higher impurity concentration than the first gate electrode is formed over the second insulating film. The doped polycrystalline silicon film, upper part of the trench ton form a second gate electrode.

Abstract: A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.

Abstract: A method for manufacturing a semiconductor device having a field-effect transistor, including forming a trench in a semiconductor substrate, forming a first insulating film in the trench, forming an intrinsic polycrystalline silicon film over the first insulating film, and introducing first conductive type impurities into the intrinsic polycrystalline silicon film to form a first conductive film. The first conductive film is etched to form a first gate electrode in the trench. Next, a second insulating film is formed in the trench above the first insulating film and the first gate electrode, and a first conductivity type doped polycrystalline silicon film, having higher impurity concentration than the first gate electrode is formed over the second insulating film. The doped polycrystalline silicon film, upper part of the trench ton form a second gate electrode.

Abstract: A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.

Abstract: A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.

Abstract: In a power MISFET having a trench gate structure with a dummy gate electrode, a technique is provided for improving the performance of the power MISFET, while preventing electrostatic breakdown of a gate insulating film therein. A power MISFET having a trench gate structure with a dummy gate electrode, and a protective diode are formed on the same semiconductor substrate. The protective diode is provided between a source electrode and a gate interconnection. In a manufacturing method of such a semiconductor device, a polycrystalline silicon film for the dummy gate electrode and a polycrystalline silicon film for the protective diode are formed simultaneously. A source region of the power MISFET and an n+-type semiconductor region of the protective diode are formed in the same step.

Abstract: In a power MISFET having a trench gate structure with a dummy gate electrode, a technique is provided for improving the performance of the power MISFET, while preventing electrostatic breakdown of a gate insulating film therein. A power MISFET having a trench gate structure with a dummy gate electrode, and a protective diode are formed on the same semiconductor substrate. The protective diode is provided between a source electrode and a gate interconnection. In a manufacturing method of such a semiconductor device, a polycrystalline silicon film for the dummy gate electrode and a polycrystalline silicon film for the protective diode are formed simultaneously. A source region of the power MISFET and an n+-type semiconductor region of the protective diode are formed in the same step.

Abstract: A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.

Abstract: In a power MISFET having a trench gate structure with a dummy gate electrode, a technique is provided for improving the performance of the power MISFET, while preventing electrostatic breakdown of a gate insulating film therein. A power MISFET having a trench gate structure with a dummy gate electrode, and a protective diode are formed on the same semiconductor substrate. The protective diode is provided between a source electrode and a gate interconnection. In a manufacturing method of such a semiconductor device, a polycrystalline silicon film for the dummy gate electrode and a polycrystalline silicon film for the protective diode are formed simultaneously. A source region of the power MISFET and an n+-type semiconductor region of the protective diode are formed in the same step.