Patents by Inventor Yu-Kai Lin

Yu-Kai Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170345
    Abstract: A method of manufacturing a circuit pattern structure, a measurement method, and a circuit pattern structure are provided. The method of manufacturing the circuit pattern structure includes: forming a dielectric layer; forming at least one first pad at least partially in the dielectric layer; forming a second pad adjacent to the at least one first pad and having a height greater than that of the at least one first pad.
    Type: Application
    Filed: November 17, 2022
    Publication date: May 23, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Kai LIN, Chih-Cheng LEE
  • Patent number: 11990836
    Abstract: A power supply system with dynamic current sharing includes a current-sharing bus and a plurality of power supply units connected to each other through the current-sharing bus. The current-sharing bus provides a first current signal. Each power supply unit includes a local current bus for providing a second current signal. The active current-sharing unit compares the first current signal with the second current signal to generate a compensation voltage. The current-averaging unit compares a difference value between an average value of the first current signal and an average value of the second current signal to generate an average voltage. The droop current unit receives the second current signal to generate a droop compensation voltage. The integration calculation unit makes output currents of the power supply units be approximately equal according to the compensation voltage, the average voltage, and the droop compensation voltage.
    Type: Grant
    Filed: April 5, 2022
    Date of Patent: May 21, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chi-Hung Lin, Guo-Hua Wang, Yu-Jie Lin, Hsien-Kai Wang
  • Patent number: 11990507
    Abstract: A high voltage transistor structure including a substrate, a first isolation structure, a second isolation structure, a gate structure, a first source and drain region, and a second source and drain region is provided. The first isolation structure and the second isolation structure are disposed in the substrate. The gate structure is disposed on the substrate, at least a portion of the first isolation structure, and at least a portion of the second isolation structure. The first source and drain region and the second source and drain region are located in the substrate on two sides of the first isolation structure and the second isolation structure. The depth of the first isolation structure is greater than the depth of the second isolation structure.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: May 21, 2024
    Assignee: United Microelectronics Corp.
    Inventors: Chin-Hung Chen, Ssu-I Fu, Chih-Kai Hsu, Chun-Ya Chiu, Chia-Jung Hsu, Yu-Hsiang Lin
  • Patent number: 11987249
    Abstract: Among other things, techniques are described for determining precedence order at a multiway stop. In embodiments, identifications are assigned to tracks, and young tracks are compared to stale tracks. A young track matches a stale track based on one or more factors. An identification of the young track is reassigned to an identification of the stale track, wherein the young track is determined to match the stale track based on the one or more factors. An earliest time of appearance of agents is determined based on identifications and in view of perception obscured areas. A precedence order for navigating through the intersection is determined based on local rules, the identifications, and the earliest time of appearance of agents, and the vehicle proceeds through the multiway stop intersection in accordance with the precedence order.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: May 21, 2024
    Assignee: Motional AD LLC
    Inventors: Scott D. Pendleton, Xiaojun Sun, Shu-Kai Lin, Puneet Singhal, Yu Pan, Lubing Zhou, Laith Sahawneh, Guchan Ozbilgin, Giancarlo Baldan
  • Patent number: 11983351
    Abstract: A touch data transmission method of present disclosure includes: generating a header information by a first controller according to a detected touch event; generating a first checksum information by the first controller according to the header information; storing the header information and the first checksum information to a memory by the first controller; and, storing a plurality of position information of the detected touch event to the memory by the first controller.
    Type: Grant
    Filed: March 14, 2023
    Date of Patent: May 14, 2024
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Chun-Kai Chuang, Jan-Ruei Lin, Yu-Hsiang Lin, I-Sheng Chao
  • Publication number: 20240143112
    Abstract: A touch sensing apparatus includes a panel with touch detection function and a touch detection circuitry. The touch detection circuitry is coupled to the panel, and is configured to detect a touch operation on the panel, record an error event of the touch sensing apparatus, and write the error event into an external storage medium via a data transmission interface thereof.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Inventors: Yu Nian OU, Chun Kai CHUANG, Pei-Yuan HUNG, Yung Hsiang LIN
  • Patent number: 11972077
    Abstract: A resetting system includes a driver that controls a touchscreen, the driver including a driver communication interface that defines a bus for transferring a transfer signal; and an on-screen display (OSD) device that generates an OSD signal representing a predetermined reset image in response to a predetermined event, the OSD signal superimposing over pixels and graphics data to be rendered on the touchscreen; and a host that transfers the transfer signal to or from the driver, the host including a host communication interface that defines the bus for transferring the transfer signal to or from the driver.
    Type: Grant
    Filed: April 29, 2023
    Date of Patent: April 30, 2024
    Assignee: Himax Technologies Limited
    Inventors: Yu-Nian Ou, Chun-Kai Chuang, Pei-Yuan Hung, Yu-Hsiang Lin
  • Publication number: 20240135043
    Abstract: An information handling system includes a printed circuit board, a screw, and a processor. The printed circuit board includes a through hole via. The through hole via includes top and bottom sections plated with a conductive plating material, and a middle section without any conductive plating material. The screw in physical communication with the top, middle, and bottom sections of the through hole via in the printed circuit board. The processor determines whether an electrical circuit is formed between the screw, the top section of the through hole via, and the bottom section of the through hole via. Based on the determination of the electrical circuit being formed, the processor provides an indication that no intrusion has been made into the information handling system.
    Type: Application
    Filed: October 19, 2022
    Publication date: April 25, 2024
    Inventors: Yong-Teng Lin, Bradford Edward Vier, Chun-Kai Tzeng, Chin-Yao Hsu, Yu-Lin Tsai
  • Publication number: 20240128127
    Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, a metal gate adjacent to the isolation structure, a shallow trench isolation (STI around the fin-shaped structure, and a second isolation structure on the STI. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Kai Hsu, Ssu-l Fu, Chun-ya Chiu, Chi-Ting Wu, Chin-HUNG Chen, Yu-Hsiang Lin
  • Publication number: 20240118767
    Abstract: A touchpad has a substrate, a sensing panel and a cover stacked in a sequence. The sensing panel has multiple sensing traces formed thereon. At least one flexible connecting board is connected between the sensing panel and the substrate via its end. The connecting board has multiple extending traces formed thereon, which are thinner than the sensing traces, to form an electrical connection between the sensing traces and the controller on the substrate. The flexible connecting board is used to avoid the problem of trace breakage caused by direct bending of the end of the sensing panel, and the sensing traces are collected by extending traces with smaller line widths so as to reduce the width of the boundary area effectively.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 11, 2024
    Applicant: ELAN MICROELECTRONICS CORPORATION
    Inventor: Yu-Kai LIN
  • Publication number: 20240113187
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having one or more interior surfaces forming a recess within an upper surface of the substrate. Source/drain regions are disposed within the substrate on opposing sides of the recess. A first gate dielectric is arranged along the one or more interior surfaces forming the recess, and a second gate dielectric is arranged on the first gate dielectric and within the recess. A gate electrode is disposed on the second gate dielectric. The second gate dielectric includes one or more protrusions that extend outward from a recessed upper surface of the second gate dielectric and that are arranged along opposing sides of the second gate dielectric.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Jhu-Min Song, Ying-Chou Chen, Yi-Kai Ciou, Chien-Chih Chou, Fei-Yun Chen, Yu-Chang Jong, Chi-Te Lin
  • Publication number: 20240111377
    Abstract: A touch detection circuitry includes an analog-to-digital converter (ADC), a controller, and a packet generator. The ADC is arranged to convert touch signals of a touch panel from analog form into digital form. The controller is electrically connected to the ADC, and is configured to calculate at least one coordinate point and at least one touch size respectively corresponding to at least one touch event on the touch panel based on the touch signals. The packet generator is electrically connected to the controller, and is configured to encapsulate the at least one coordinate point and the at least one touch size into a touch data packet.
    Type: Application
    Filed: June 7, 2023
    Publication date: April 4, 2024
    Inventors: Yu Nian OU, Chun Kai CHUANG, Yu-Hsiang LIN, Chun-Lung TSAI
  • Publication number: 20240079267
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first diffusion barrier layer made of a dielectric material including a metal element, nitrogen, and oxygen and a first protection layer made of a dielectric material including silicon and oxygen and in direct contact with the top surface of the first diffusion barrier layer. The semiconductor device structure also includes a first thickening layer made of a dielectric material including the metal element and oxygen and in direct contact with the top surface of the first protection layer. A maximum metal content in the first thickening layer is greater than that in the first diffusion barrier layer. The semiconductor device structure further includes a conductive feature surrounded by and in direct contact with the first diffusion barrier layer, the first protection layer, and the first thickening layer.
    Type: Application
    Filed: November 9, 2023
    Publication date: March 7, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Cheng SHIH, Tze-Liang LEE, Jen-Hung WANG, Yu-Kai LIN, Su-Jen SUNG
  • Publication number: 20240071504
    Abstract: A memory device is provided, including a memory array, a driver circuit, and recover circuit. The memory array includes multiple memory cells. Each memory cell is coupled to a control line, a data line, and a source line and, during a normal operation, is configured to receive first and second voltage signals. The driver circuit is configured to output at least one of the first voltage signal or the second voltage signal to the memory cells. The recover circuit is configured to output, during a recover operation, a third voltage signal, through the driver circuit to at least one of the memory cells. The third voltage signal is configured to have a first voltage level that is higher than a highest level of the first voltage signal or the second voltage signal, or lower than a lowest level of the first voltage signal or the second voltage signal.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pei-Chun LIAO, Yu-Kai CHANG, Yi-Ching LIU, Yu-Ming LIN, Yih WANG, Chieh LEE
  • Patent number: 11848231
    Abstract: A method for forming a semiconductor device structure is provided. The method includes successively forming a first multi-layer etch stop structure and an insulating layer over a first conductive feature. The insulating layer and the first multi-layer etch stop structure are successively etched to form an opening substantially aligned to the first conductive feature. A second conductive feature is formed in the opening. The formation of the first multi-layer etch stop structure and the second multi-layer etch stop structure includes forming a first metal-containing dielectric layer, forming a silicon-containing dielectric layer over the first metal-containing dielectric layer, and forming a second metal-containing dielectric layer over the silicon-containing dielectric layer. The second metal-containing dielectric layer has a material that is different from the material of the first metal-containing dielectric layer.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: December 19, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Cheng Shih, Tze-Liang Lee, Jen-Hung Wang, Yu-Kai Lin, Su-Jen Sung
  • Publication number: 20230394269
    Abstract: A card having a fingerprint sensor and a manufacturing method of the same are provided. The fingerprint sensor is disposed between a substrate and a protection layer. The protection layer has a first area and a second area thereon. The roughness of the second area is smaller than the roughness of the first area. The second area corresponds to the sensing area of the fingerprint sensor. When the user's finger is wet, the second area may effectively keep the water from remaining on it. Thus, the water does not affect the effect of fingerprint sensing.
    Type: Application
    Filed: May 22, 2023
    Publication date: December 7, 2023
    Applicant: ELAN MICROELECTRONICS CORPORATION
    Inventors: Yu-Kai LIN, Chien-Wen TSAI, Ta-Huang LIU
  • Publication number: 20230384176
    Abstract: A torque sensor includes a sleeve member configured to be mounted on a center shaft, and a tubular sensor body arranged coaxially with the sleeve member. At least one outer surface of the sleeve member includes one or more magnetostrictive elements. The tubular sensor body includes a bobbin for mounting a sensor coil. An induced current in the sensor coil is detected in response to pedaling by a user. The tubular sensor body includes one or more inclined surfaces inclined with respect to a radial direction of the torque sensor, the one or more inclined surfaces being coupled with the sleeve member or the center shaft.
    Type: Application
    Filed: May 24, 2022
    Publication date: November 30, 2023
    Applicant: GIANT MANUFACTURING CO., LTD.
    Inventors: Che-Wei HSU, Tzu-Yang HSIAO, Yu-Kai LIN
  • Patent number: 11769693
    Abstract: A semiconductor structure includes a conductive feature, a first metal-based etch-stop layer over the underlying structure, a metal-free etch-stop layer over the first metal-based etch-stop layer, a second metal-based etch-stop layer over the metal-free etch-stop layer, an interlayer dielectric layer over the second metal-based etch-stop layer, and an interconnect structure extending through the first metal-based etch-stop layer, metal-free etch-stop layer, and the second metal-based etch-stop layer, wherein a bottom portion of the conductive interconnect structure directly contacts the conductive feature. The first metal-based etch-stop layer may include a first metallic component having one of aluminum, tantalum, titanium, or hafnium, and the second metal-based etch-stop layer may include a second metallic component the same as or different from the first metallic component. The first metal-based etch-stop layer and the second metal-based etch-stop layer may both be free of silicon.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: September 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Szu-Ping Tung, Yu-Kai Lin, Jen Hung Wang, Shing-Chyang Pan
  • Publication number: 20230274975
    Abstract: A semiconductor structure including a substrate, a first dielectric layer, a first conductive feature, an etch stop layer, a second dielectric layer and a second conductive feature is provided. The first dielectric layer is disposed over the substrate. The first conductive feature is disposed in the first dielectric layer. The etch stop layer is disposed over the first dielectric layer and the first conductive feature, wherein the etch stop layer comprises a metal-containing layer and a silicon-containing layer, the metal-containing layer is located between the first dielectric layer and the silicon-containing layer, the metal-containing layer comprises a nitride-containing region and an oxide-containing region, and the nitride-containing region contacts the first conductive feature. The second dielectric layer is disposed over the etch stop layer. The second conductive feature penetrates the second dielectric layer and electrically connects with the first conductive feature.
    Type: Application
    Filed: May 1, 2023
    Publication date: August 31, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Kai Lin, Su-Jen Sung, Tze-Liang Lee, Jen-Hung Wang
  • Publication number: 20230260832
    Abstract: Semiconductor devices and methods of manufacture are presented herein in which a etch stop layer is selectively deposited over a conductive contact. A dielectric layer is formed over the etch stop layer and an opening is formed through the dielectric layer and the etch stop layer to expose the conductive contact. Conductive material is then deposited to fill the opening.
    Type: Application
    Filed: June 3, 2022
    Publication date: August 17, 2023
    Inventors: Yu-Kai Lin, Po-Cheng Shih, Jr-Hung Li, Tze-Liang Lee