Patents by Inventor Yukio Nakabayashi
Yukio Nakabayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240072119Abstract: According to one embodiment, a semiconductor device includes a silicon carbide member, a first member, a first layer, and a second layer. The silicon carbide member includes a first region. The first member includes silicon and oxygen. The first layer is provided between the first region and the first member. The first layer includes a bond between silicon and nitrogen. The second layer is provided between the first layer and the first member. The second layer includes a bond between silicon and oxygen and a bond between silicon and nitrogen.Type: ApplicationFiled: February 16, 2023Publication date: February 29, 2024Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yukio NAKABAYASHI, Tatsuo SHIMIZU, Toshihide ITO, Chiharu OTA, Johji NISHIO
-
Patent number: 11848211Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×1021 cm?3. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a first position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×1018 cm?3 and a carbon concentration at the first position is equal to or less than 1×1018 cm?3, and a nitrogen concentration at a second position 1 nm away from the peak to the side of the silicon carbide layer is equal to or less than 1×1018 cm?3.Type: GrantFiled: February 21, 2023Date of Patent: December 19, 2023Assignee: Kabushiki Kaisha ToshibaInventors: Tatsuo Shimizu, Yukio Nakabayashi, Johji Nishio, Chiharu Ota, Toshihide Ito
-
Publication number: 20230387216Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×1021 cm?3. Nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×1018 cm?3, and a carbon concentration at the position is equal to or less than 1×1018 cm?3.Type: ApplicationFiled: August 1, 2023Publication date: November 30, 2023Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo SHIMIZU, Yukio NAKABAYASHI, Johji NISHIO, Chiharu OTA, Toshihide ITO
-
Patent number: 11764269Abstract: This semiconductor device according to an embodiment includes: a silicon carbide layer; a gate electrode; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration not less than 1×1021 cm?3. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region has its peak in the region, and a state density Z1/2 in a portion is not more than 1×1011 cm?3. The portion is within 100 nm from the silicon oxide layer toward the silicon carbide layer. A nitrogen concentration and a carbon concentration in a position 1 nm from the peak toward the silicon oxide layer is not more than 1×1018 cm?3, and a nitrogen concentration in a position 1 nm from the peak toward the silicon carbide layer is not more than 1×1018 cm?3.Type: GrantFiled: September 2, 2022Date of Patent: September 19, 2023Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo Shimizu, Yukio Nakabayashi, Johji Nishio, Chiharu Ota, Toshihide Ito
-
Patent number: 11764270Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×1021 cm?3. Nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×1018 cm?3, and a carbon concentration at the position is equal to or less than 1×1018 cm?3.Type: GrantFiled: August 13, 2020Date of Patent: September 19, 2023Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo Shimizu, Yukio Nakabayashi, Johji Nishio, Chiharu Ota, Toshihide Ito
-
Publication number: 20230207321Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1 × 1021 cm-3. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a first position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1 × 1018 cm-3 and a carbon concentration at the first position is equal to or less than 1 × 1018 cm-3, and a nitrogen concentration at a second position 1 nm away from the peak to the side of the silicon carbide layer is equal to or less than 1 × 1018 cm-3.Type: ApplicationFiled: February 21, 2023Publication date: June 29, 2023Applicant: Kabushiki Kaisha ToshibaInventors: Tatsuo SHIMIZU, Yukio NAKABAYASHI, Johji NISHIO, Chiharu OTA, Toshihide ITO
-
Publication number: 20230197790Abstract: A method for manufacturing a semiconductor device of an embodiment includes performing first ion implantation of implanting aluminum (Al) into a silicon carbide layer in a first projected range and a first dose amount, performing second ion implantation of implanting carbon (C) into the silicon carbide layer in a second projected range and a second dose amount which is a dose amount equal to or more than 10 times the first dose amount, performing a first heat treatment of 1600° C. or more, performing an oxidation treatment of oxidizing the silicon carbide layer, performing an etching process of etching the silicon carbide layer in an atmosphere containing a hydrogen gas, forming a silicon oxide film on the silicon carbide layer, and forming a gate electrode on the silicon oxide film.Type: ApplicationFiled: August 30, 2022Publication date: June 22, 2023Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo SHIMIZU, Yukio NAKABAYASHI, Toshihide ITO, Chiharu OTA, Johji NISHIO
-
Patent number: 11621167Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×1021 cm?3. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a first position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×1018 cm?3 and a carbon concentration at the first position is equal to or less than 1×1018 cm?3, and a nitrogen concentration at a second position 1 nm away from the peak to the side of the silicon carbide layer is equal to or less than 1×1018 cm?3.Type: GrantFiled: January 5, 2022Date of Patent: April 4, 2023Assignee: Kabushiki Kaisha ToshibaInventors: Tatsuo Shimizu, Yukio Nakabayashi, Johji Nishio, Chiharu Ota, Toshihide Ito
-
Publication number: 20230084127Abstract: A semiconductor device manufacturing method of embodiments includes: forming a silicon oxide film on a surface of a silicon carbide layer; performing a first heat treatment in an atmosphere containing nitrogen gas at a temperature equal to or more than 1200° C. and equal to or less than 1600° C.; and performing a second heat treatment in an atmosphere containing nitrogen oxide gas at a temperature equal to or more than 750° C. and equal to or less than 1050° C.Type: ApplicationFiled: March 7, 2022Publication date: March 16, 2023Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo SHIMIZU, Yukio NAKABAYASHI, Toshihide ITO, Chiharu OTA, Shigeto FUKATSU, Johji NISHIO, Ryosuke IIJIMA
-
Publication number: 20230064865Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include preparing a structure body, the structure body including a silicon carbide member and a first film stacked with the silicon carbide member. The first film includes silicon and oxygen. The method can include performing a first treatment of heat-treating the structure body in a first atmosphere including hydrogen. The method can include, after the first treatment, performing a second treatment of heat-treating the structure body in a second atmosphere including nitrogen and oxygen. An oxygen concentration in the second atmosphere is not less than 5 ppm and not more than 1000 ppm.Type: ApplicationFiled: August 2, 2022Publication date: March 2, 2023Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shigeto FUKATSU, Yukio NAKABAYASHI, Tatsuo SHIMIZU, Ryosuke IIJIMA
-
Publication number: 20220416030Abstract: This semiconductor device according to an embodiment includes: a silicon carbide layer; a gate electrode; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration not less than 1×1021 cm?3. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region has its peak in the region, and a state density Z1/2 in a portion is not more than 1×1011 cm?3. The portion is within 100 nm from the silicon oxide layer toward the silicon carbide layer. A nitrogen concentration and a carbon concentration in a position 1 nm from the peak toward the silicon oxide layer is not more than 1×1018 cm?3, and a nitrogen concentration in a position 1 nm from the peak toward the silicon carbide layer is not more than 1×1018 cm?3.Type: ApplicationFiled: September 2, 2022Publication date: December 29, 2022Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo SHIMIZU, Yukio NAKABAYASHI, Johji NISHIO, Chiharu OTA, Toshihide ITO
-
Patent number: 11469301Abstract: This semiconductor device according to an embodiment includes: a silicon carbide layer; a gate electrode; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration not less than 1×1021 cm?3. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region has its peak in the region, and a state density Z1/2 in a portion is not more than 1×1011 cm?3. The portion is within 100 nm from the silicon oxide layer toward the silicon carbide layer. A nitrogen concentration and a carbon concentration in a position 1 nm from the peak toward the silicon oxide layer is not more than 1×1018 cm?3, and a nitrogen concentration in a position 1 nm from the peak toward the silicon carbide layer is not more than 1×1018 cm?3.Type: GrantFiled: February 16, 2021Date of Patent: October 11, 2022Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo Shimizu, Yukio Nakabayashi, Johji Nishio, Chiharu Ota, Toshihide Ito
-
Patent number: 11424326Abstract: According to one embodiment, a semiconductor device includes a silicon carbide member, first, second, and third electrodes, and a first insulating member. The silicon carbide member includes first, second, and third silicon carbide regions. The first silicon carbide region includes first, second, third, and fourth partial regions. The third partial region is between the first and second partial regions. The fourth partial region is between the third partial region and the first electrode. The second silicon carbide region includes first and second semiconductor regions. The third silicon carbide region includes third and fourth semiconductor regions. The first insulating member includes first, second, and third insulating regions. The second electrode is electrically connected to the first silicon carbide region. The third and fourth partial regions are between the second and first electrodes. The third electrode is electrically connected to the second silicon carbide region.Type: GrantFiled: January 26, 2021Date of Patent: August 23, 2022Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Yukio Nakabayashi, Tatsuo Shimizu, Toshihide Ito, Chiharu Ota, Johji Nishio
-
Publication number: 20220130673Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×1021 cm?3. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a first position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×1018 cm?3 and a carbon concentration at the first position is equal to or less than 1×1018 cm?3, and a nitrogen concentration at a second position 1 nm away from the peak to the side of the silicon carbide layer is equal to or less than 1×1018 cm?3.Type: ApplicationFiled: January 5, 2022Publication date: April 28, 2022Applicant: Kabushiki Kaisha ToshibaInventors: Tatsuo Shimizu, Yukio Nakabayashi, Johji Nishio, Chiharu Ota, Toshihide Ito
-
Patent number: 11296220Abstract: A semiconductor device of an embodiment includes: a nitride semiconductor layer including a first GaN region of n-type, a second GaN region of n-type on the first GaN region, a third GaN region of p-type on the first GaN region, a fourth GaN region of p-type sandwiching the second GaN region with the third GaN region, a fifth GaN region of p-type on the third GaN region, a sixth GaN region of p-type sandwiching the second GaN region with the fifth GaN region, a seventh GaN region of n-type on the fifth GaN region, an eighth GaN region of n-type on the sixth GaN region, a trench between the seventh GaN region and the eighth GaN region, the trench having an inclination angle of less than 90 degrees; a gate insulating layer including an aluminum nitride film in the trench; a gate electrode; a first electrode; and a second electrode.Type: GrantFiled: August 26, 2020Date of Patent: April 5, 2022Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo Shimizu, Yukio Nakabayashi
-
Patent number: 11239079Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×1021 cm?3. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a first position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×1018 cm?3 and a carbon concentration at the first position is equal to or less than 1×1018 cm3, and a nitrogen concentration at a second position 1 nm away from the peak to the side of the silicon carbide layer is equal to or less than 1×1018 cm?3.Type: GrantFiled: August 24, 2020Date of Patent: February 1, 2022Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo Shimizu, Yukio Nakabayashi, Johji Nishio, Chiharu Ota, Toshihide Ito
-
Publication number: 20220005925Abstract: This semiconductor device according to an embodiment includes: a silicon carbide layer; a gate electrode; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration not less than 1×1021cm?3. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region has its peak in the region, and a state density Z1/2 in a portion is not more than 1×1011cm?3. The portion is within 100 nm from the silicon oxide layer toward the silicon carbide layer. A nitrogen concentration and a carbon concentration in a position 1 nm from the peak toward the silicon oxide layer is not more than 1×1018cm?3, and a nitrogen concentration in a position 1 nm from the peak toward the silicon carbide layer is not more than 1×1018cm?3.Type: ApplicationFiled: February 16, 2021Publication date: January 6, 2022Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo SHIMIZU, Yukio NAKABAYASHI, Johji NISHIO, Chiharu OTA, Toshihide ITO
-
Publication number: 20210367040Abstract: According to one embodiment, a semiconductor device includes a silicon carbide member, first, second, and third electrodes, and a first insulating member. The silicon carbide member includes first, second, and third silicon carbide regions. The first silicon carbide region includes first, second, third, and fourth partial regions. The third partial region is between the first and second partial regions. The fourth partial region is between the third partial region and the first electrode. The second silicon carbide region includes first and second semiconductor regions. The third silicon carbide region includes third and fourth semiconductor regions. The first insulating member includes first, second, and third insulating regions. The second electrode is electrically connected to the first silicon carbide region. The third and fourth partial regions are between the second and first electrodes. The third electrode is electrically connected to the second silicon carbide region.Type: ApplicationFiled: January 26, 2021Publication date: November 25, 2021Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yukio NAKABAYASHI, Tatsuo SHIMIZU, Toshihide ITO, Chiharu OTA, Johji NISHIO
-
Publication number: 20210296128Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×1021 cm?3. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a first position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×1018 cm?3 and a carbon concentration at the first position is equal to or less than 1×1018 cm3, and a nitrogen concentration at a second position 1 nm away from the peak to the side of the silicon carbide layer is equal to or less than 1×1018 cm?3.Type: ApplicationFiled: August 24, 2020Publication date: September 23, 2021Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo SHIMIZU, Yukio NAKABAYASHI, Johji NISHIO, Chiharu OTA, Toshihide ITO
-
Publication number: 20210296446Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer; a silicon oxide layer; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×1021 cm?3. Nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region have a peak in the region, a nitrogen concentration at a position 1 nm away from the peak to the side of the silicon oxide layer is equal to or less than 1×1018 cm?3, and a carbon concentration at the position is equal to or less than 1×1018 cm?3.Type: ApplicationFiled: August 13, 2020Publication date: September 23, 2021Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tatsuo Shimizu, Yukio Nakabayashi, Johji Nishio, Chiharu Ota, Toshihide Ito