Patents by Inventor Yukiteru Matsui

Yukiteru Matsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11883926
    Abstract: A polishing pad is described. The polishing pad includes a surface having plural recess portions, and a substrate is polished by the surface. In the pad, an average width of the recess portions at one area of the surface in a direction parallel to the surface is 20 ?m or less, and an average density of the recess portions at one area of the surface is 1,300/mm2 or more.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: January 30, 2024
    Assignee: KIOXIA CORPORATION
    Inventors: Takahiko Kawasaki, Yukiteru Matsui, Akifumi Gawase
  • Patent number: 11534886
    Abstract: According to one embodiment, a polishing apparatus includes a holder for holding a polishing pad for polishing a surface of a substrate. A plurality of pressing members are configured to press a back surface side of the polishing pad while held by the holder. A driving unit is configured to selectively move pressing members in a direction towards the surface of the substrate so as to press the back surface side of the polishing pad.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: December 27, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Mikiya Sakashita, Yukiteru Matsui, Akifumi Gawase
  • Publication number: 20220290009
    Abstract: A polishing solution according to an embodiment includes an exothermic agent that generates heat through application of an alternating magnetic field thereto, and a viscosity modifier that undergoes a reversible phase transition between a gel state and a sol state depending on temperature.
    Type: Application
    Filed: September 10, 2021
    Publication date: September 15, 2022
    Applicant: Kioxia Corporation
    Inventors: Mikiya SAKASHITA, Yukiteru MATSUI
  • Publication number: 20220048155
    Abstract: A polishing apparatus includes a first substrate holder capable of holding a substrate coated with a film. The apparatus also includes a first pad holder capable of holding a first pad. The apparatus further includes a first driver configured to translate the first pad on a surface of the film so as to cause the first pad to polish the film.
    Type: Application
    Filed: February 25, 2021
    Publication date: February 17, 2022
    Applicant: Kioxia Corporation
    Inventors: Mikiya SAKASHITA, Akifumi GAWASE, Kohei NAKAMURA, Yukiteru MATSUI
  • Publication number: 20210299814
    Abstract: According to one embodiment, a polishing method includes supplying a polishing agent to be between a polishing pad and to-be-polished surface, then polishing the to-be-polished surface with the polishing agent while rotating at least one of the to-be-polished surface and the polishing pad. The polishing agent includes abrasive grains and an organic polymer. The organic polymer makes a reversible phase transition between a gel state and a sol state depending on temperature.
    Type: Application
    Filed: September 2, 2020
    Publication date: September 30, 2021
    Inventors: Mikiya SAKASHITA, Yumiko Kataoka, Yukiteru Matsui
  • Publication number: 20210260719
    Abstract: A polishing pad is described. The polishing pad includes a surface having plural recess portions, and a substrate is polished by the surface. In the pad, an average width of the recess portions at one area of the surface in a direction parallel to the surface is 20 ?m or less, and an average density of the recess portions at one area of the surface is 1,300/mm2 or more.
    Type: Application
    Filed: May 13, 2021
    Publication date: August 26, 2021
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takahiko KAWASAKI, Yukiteru MATSUI, Akifumi GAWASE
  • Publication number: 20210170542
    Abstract: According to one embodiment, a polishing apparatus includes a holder for holding a polishing pad for polishing a surface of a substrate. A plurality of pressing members are configured to press a back surface side of the polishing pad while held by the holder. A driving unit is configured to selectively move pressing members in a direction towards the surface of the substrate so as to press the back surface side of the polishing pad.
    Type: Application
    Filed: March 2, 2020
    Publication date: June 10, 2021
    Inventors: Mikiya SAKASHITA, Yukiteru MATSUI, Akifumi GAWASE
  • Patent number: 10998283
    Abstract: A semiconductor device production method includes forming a first recess portion in a first insulating film formed on a first substrate and a first conductive layer on the front surface of the first insulating film located inside and outside the first recess portion. In the first recess portion, a first pad is formed having a width of 3 ?m or less and including the first conductive layer by performing a first polishing the first conductive layer at a first polishing rate and, after the first polishing, a second polishing the first conductive layer at a second polishing rate lower than the first polishing rate. The first pad of the first substrate and a second pad of a second substrate are joined together by annealing the first substrate and the second substrate. The selection ratio of the first conductive layer to the first insulating film is 0.3 to 0.4.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: May 4, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takahiko Kawasaki, Yukiteru Matsui, Akifumi Gawase
  • Patent number: 10991588
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes bringing a first catalyst into contact with a workpiece to form an oxide film on a surface of the workpiece, and bringing a second catalyst different from the first catalyst and the oxide film into contact with each other or moving the second catalyst and the oxide film closer to each other to elute the oxide film into a treatment liquid.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: April 27, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Akifumi Gawase, Yukiteru Matsui, Takahiko Kawasaki
  • Patent number: 10985027
    Abstract: A method for manufacturing a semiconductor device according to an embodiment includes: forming a first layer on a semiconductor substrate, a surface of the first layer having a first plane of which distance from the semiconductor substrate is a first distance and a second plane of which distance from the semiconductor substrate is a second distance smaller than the first distance, and a difference between the first distance and the second distance being 30 nm or more; performing planarization processing on the first layer to have the difference of less than 30 nm; forming a second layer directly on the first layer after performing the planarization processing; supplying a resist to the second layer; bringing a template having a pattern into contact with the resist to form a resist layer to which the pattern has been transferred; and etching the second layer using the resist layer as a mask.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: April 20, 2021
    Assignee: Kioxia Corporation
    Inventors: Akifumi Gawase, Yukiteru Matsui, Mikiya Sakashita
  • Publication number: 20210082711
    Abstract: A method for manufacturing a semiconductor device according to an embodiment includes: forming a first layer on a semiconductor substrate, a surface of the first layer having a first plane of which distance from the semiconductor substrate is a first distance and a second plane of which distance from the semiconductor substrate is a second distance smaller than the first distance, and a difference between the first distance and the second distance being 30 nm or more; performing planarization processing on the first layer to have the difference of less than 30 nm; forming a second layer directly on the first layer after performing the planarization processing; supplying a resist to the second layer; bringing a template having a pattern into contact with the resist to form a resist layer to which the pattern has been transferred; and etching the second layer using the resist layer as a mask.
    Type: Application
    Filed: March 17, 2020
    Publication date: March 18, 2021
    Applicant: Kioxia Corporation
    Inventors: Akifumi GAWASE, Yukiteru MATSUI, Mikiya SAKASHITA
  • Patent number: 10850363
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes detecting elastic waves, and detecting or predicting an abnormality of the processing object occurring during polishing of the processing object. The elastic waves are generated from the processing object during the polishing. The abnormality is detected or predicted by analyzing the detected elastic waves.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: December 1, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Yukiteru Matsui, Takahiko Kawasaki, Akifumi Gawase, Shuji Suzuki, Tsutomu Miki
  • Publication number: 20200035636
    Abstract: A semiconductor device production method includes forming a first recess portion in a first insulating film formed on a first substrate and a first conductive layer on the front surface of the first insulating film located inside and outside the first recess portion. In the first recess portion, a first pad is formed having a width of 3 ?m or less and including the first conductive layer by performing a first polishing the first conductive layer at a first polishing rate and, after the first polishing, a second polishing the first conductive layer at a second polishing rate lower than the first polishing rate. The first pad of the first substrate and a second pad of a second substrate are joined together by annealing the first substrate and the second substrate. The selection ratio of the first conductive layer to the first insulating film is 0.3 to 0.4.
    Type: Application
    Filed: February 28, 2019
    Publication date: January 30, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takahiro KAWASAKI, Yukiteru MATSUI, Akifumi GAWASE
  • Publication number: 20190283206
    Abstract: A polishing pad is described. The polishing pad includes a surface having plural recess portions, and a substrate is polished by the surface. In the pad, an average width of the recess portions at one area of the surface in a direction parallel to the surface is 20 ?m or less, and an average density of the recess portions at one area of the surface is 1,300/mm2 or more.
    Type: Application
    Filed: August 22, 2018
    Publication date: September 19, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takahiko KAWASAKI, Yukiteru MATSUI, Akifumi GAWASE
  • Patent number: 10283383
    Abstract: According to one embodiment, a planarization method and a planarization apparatus are provided. In the planarization method, a work surface of a work piece is planarized by bringing the work surface of the work piece containing a silicon oxide film and a surface of a solid plate onto which hydrogen ions are adsorbed, into contact or extremely close proximity with one another in a state in which a process liquid containing fluorine ions is supplied to the surface of the solid plate.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: May 7, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Akifumi Gawase, Yukiteru Matsui, Gaku Minamihaba, Hajime Eda
  • Patent number: 10195716
    Abstract: According to one embodiment, a dresser includes a base metal plate, and a plurality of chip portions that are provided on the base metal plate. Each chip portion includes a Si substrate having a projection at an upper portion thereof and a diamond layer provided on the projection of the Si substrate.
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: February 5, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takahiko Kawasaki, Yukiteru Matsui, Akifumi Gawase
  • Patent number: 10121677
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes forming, on a substrate, protruding portions with first films on the surfaces thereof, respectively, forming a second film different from the first films so as to fill a depressed portion between the protruding portions and to cover the protruding portions, processing in such a manner that the top surface of the second film on the depressed portion is higher than the top surface of the second film on the protruding portions after forming the second film to cover the protruding portions, and polishing the second film on the depressed and protruding portions to expose the first films.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: November 6, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Yukiteru Matsui, Takahiko Kawasaki, Akifumi Gawase, Kenji Iwade
  • Publication number: 20180277388
    Abstract: A manufacturing method of a semiconductor device according to an embodiment implants impurities into a central portion of a polishing target film or an outer peripheral portion of the central portion of the polishing target film to cause an impurity concentration in the outer peripheral portion of the polishing target film and an impurity concentration in the central portion thereof to be different from each other, thereby modifying a surface of the polishing target film. The modified surface of the polishing target film is polished by a CMP method.
    Type: Application
    Filed: May 30, 2018
    Publication date: September 27, 2018
    Applicant: Toshiba Memory Corporation
    Inventors: Yukiteru MATSUI, Kyoichi SUGURO, Akifumi GAWASE, Takahiko KAWASAKI
  • Patent number: 10079153
    Abstract: In a substrate processing method according to the embodiment, a first material is implanted into a surface of a target film to modify the surface of the target film. The surface of the target film is dissolved to remove the surface of the target film by bringing a catalytic material close to the surface of the target film or by contacting the catalytic material to the surface of the target film while supplying a process solution on the surface of the target film which has been modified.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: September 18, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Akifumi Gawase, Yukiteru Matsui, Takahiko Kawasaki
  • Patent number: 10010997
    Abstract: In accordance with an embodiment, a polishing method includes supplying slurry to a surface of a polishing layer including a polymer, and bringing a polishing object into contact with the polishing layer to polish the polishing object. The polishing layer has a fibrous first substance mixed therein or contains a second substance. The second substance is higher in specific heat and higher in thermal conductivity than the polymer in such a manner that the second substance is surrounded by the polymer.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: July 3, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Akifumi Gawase, Yukiteru Matsui, Takahiko Kawasaki, Yosuke Otsuka, Hajime Eda