Patents by Inventor Yukiteru Matsui

Yukiteru Matsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10008390
    Abstract: A manufacturing method of a semiconductor device according to an embodiment implants impurities into a central portion of a polishing target film or an outer peripheral portion of the central portion of the polishing target film to cause an impurity concentration in the outer peripheral portion of the polishing target film and an impurity concentration in the central portion thereof to be different from each other, thereby modifying a surface of the polishing target film. The modified surface of the polishing target film is polished by a CMP method.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: June 26, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Yukiteru Matsui, Kyoichi Suguro, Akifumi Gawase, Takahiko Kawasaki
  • Patent number: 9937602
    Abstract: In a substrate processing method according to an embodiment, a surface of an object to be polished disposed on a substrate is polished on a polishing pad supplied with slurry. After the polishing process using the slurry, the surface of the object to be polished on the polishing pad is polished, while supplying water on the polishing pad where a residue including the slurry or a sludge of the polishing pad adhered. After the polishing process using the water, the surface of the object to be polished is cleaned on the polishing pad by supplying rinse liquid on the polishing pad.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: April 10, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Yosuke Otsuka, Masako Kodera, Yukiteru Matsui
  • Publication number: 20180056482
    Abstract: According to one embodiment, a dresser includes a base metal plate, and a plurality of chip portions that are provided on the base metal plate. Each chip portion includes a Si substrate having a projection at an upper portion thereof and a diamond layer provided on the projection of the Si substrate.
    Type: Application
    Filed: February 10, 2017
    Publication date: March 1, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takahiko KAWASAKI, Yukiteru MATSUI, Akifumi GAWASE
  • Publication number: 20180061654
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes bringing a first catalyst into contact with a workpiece to form an oxide film on a surface of the workpiece, and bringing a second catalyst different from the first catalyst and the oxide film into contact with each other or moving the second catalyst and the oxide film closer to each other to elute the oxide film into a treatment liquid.
    Type: Application
    Filed: November 6, 2017
    Publication date: March 1, 2018
    Applicant: Toshiba Memory Corporation
    Inventors: Akifumi Gawase, Yukiteru Matsui, Takahiko Kawasaki
  • Patent number: 9837279
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes bringing a first catalyst into contact with a workpiece to form an oxide film on a surface of the workpiece, and bringing a second catalyst different from the first catalyst and the oxide film into contact with each other or moving the second catalyst and the oxide film closer to each other to elute the oxide film into a treatment liquid.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: December 5, 2017
    Assignee: Toshiba Memory Corporation
    Inventors: Akifumi Gawase, Yukiteru Matsui, Takahiko Kawasaki
  • Publication number: 20170250081
    Abstract: In a substrate processing method according to the embodiment, a first material is implanted into a surface of a target film to modify the surface of the target film. The surface of the target film is dissolved to remove the surface of the target film by bringing a catalytic material close to the surface of the target film or by contacting the catalytic material to the surface of the target film while supplying a process solution on the surface of the target film which has been modified.
    Type: Application
    Filed: February 16, 2017
    Publication date: August 31, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akifumi GAWASE, Yukiteru MATSUI, Takahiko KAWASAKI
  • Publication number: 20170133238
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes using a slurry containing a cationic water-soluble polymer (A), iron nitrate (B), and abrasive grains (C) to chemically and mechanically polish a film to be polished. The film includes an insulating film provided with a groove or a hole, and a tungsten film to fill the groove or the hole. The chemical mechanical polishing includes a first polishing process to polish the tungsten film, and a second polishing process to polish the tungsten film and the insulating film together. The second polishing process is conducted after the first polishing process. The content of the (A) component in the slurry used in the second polishing process is less than 300 ppm, and the content of the (B) component is 100 ppm or less.
    Type: Application
    Filed: August 4, 2016
    Publication date: May 11, 2017
    Inventors: Takahiko KAWASAKI, Yukiteru Matsui, Kenji Iwade, Akifumi Gawase
  • Publication number: 20170076953
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes bringing a first catalyst into contact with a workpiece to form an oxide film on a surface of the workpiece, and bringing a second catalyst different from the first catalyst and the oxide film into contact with each other or moving the second catalyst and the oxide film closer to each other to elute the oxide film into a treatment liquid.
    Type: Application
    Filed: March 10, 2016
    Publication date: March 16, 2017
    Inventors: Akifumi GAWASE, Yukiteru Matsui, Takahiko Kawasaki
  • Patent number: 9558961
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes: respectively forming a first layer and a second layer at the top of a protruding portion and at the bottom of a depressed portion of a treatment target having protrusions/depressions in such a manner that sidewalls of the protruding portion is exposed, supplying a treatment liquid to the treatment target having the first layer and the second layer, bringing a catalyst into contact with or closer to the first layer and thereby increasing the dissolution rate of the first layer in dissolving into the treatment liquid and dissolving the first layer into the treatment liquid, and sequentially dissolving the protruding portion and the second layer into the treatment liquid after the dissolution of the first layer.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: January 31, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akifumi Gawase, Yukiteru Matsui, Kenji Iwade, Takahiko Kawasaki
  • Publication number: 20160375547
    Abstract: In a substrate processing method according to an embodiment, a surface of an object to be polished disposed on a substrate is polished on a polishing pad supplied with slurry. After the polishing process using the slurry, the surface of the object to be polished on the polishing pad is polished, while supplying water on the polishing pad where a residue including the slurry or a sludge of the polishing pad adhered. After the polishing process using the water, the surface of the object to be polished is cleaned on the polishing pad by supplying rinse liquid on the polishing pad.
    Type: Application
    Filed: September 9, 2016
    Publication date: December 29, 2016
    Inventors: Yosuke OTSUKA, Masako KODERA, Yukiteru MATSUI
  • Publication number: 20160358787
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes: respectively forming a first layer and a second layer at the top of a protruding portion and at the bottom of a depressed portion of a treatment target having protrusions/depressions in such a manner that sidewalls of the protruding portion is exposed, supplying a treatment liquid to the treatment target having the first layer and the second layer, bringing a catalyst into contact with or closer to the first layer and thereby increasing the dissolution rate of the first layer in dissolving into the treatment liquid and dissolving the first layer into the treatment liquid, and sequentially dissolving the protruding portion and the second layer into the treatment liquid after the dissolution of the first layer.
    Type: Application
    Filed: January 28, 2016
    Publication date: December 8, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akifumi GAWASE, Yukiteru Matsui, Kenji Iwade, Takahiko Kawasaki
  • Publication number: 20160322231
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes forming, on a substrate, protruding portions with first films on the surfaces thereof, respectively, forming a second film different from the first films so as to fill a depressed portion between the protruding portions and to cover the protruding portions, processing in such a manner that the top surface of the second film on the depressed portion is higher than the top surface of the second film on the protruding portions after forming the second film to cover the protruding portions, and polishing the second film on the depressed and protruding portions to expose the first films.
    Type: Application
    Filed: January 6, 2016
    Publication date: November 3, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yukiteru Matsui, Takahiko Kawasaki, Akifumi Gawase, Kenji Iwade
  • Publication number: 20160229026
    Abstract: In accordance with an embodiment, a polishing apparatus includes a polishing table and a polishing head. A retainer ring is attached to a surface of the polishing head. The surface of the polishing head faces the polishing table. The retainer ring includes a ceramic material. The fracture toughness of the ceramic material is 4 MPa·m1/2 or more.
    Type: Application
    Filed: September 9, 2015
    Publication date: August 11, 2016
    Inventors: Takahiko KAWASAKI, Yukiteru MATSUI, Kenji IWADE, Akifumi GAWASE
  • Publication number: 20160207163
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes detecting elastic waves, and detecting or predicting an abnormality of the processing object occurring during polishing of the processing object. The elastic waves are generated from the processing object during the polishing. The abnormality is detected or predicted by analyzing the detected elastic waves.
    Type: Application
    Filed: September 2, 2015
    Publication date: July 21, 2016
    Inventors: Yukiteru MATSUI, Takahiko Kawasaki, Akifumi Gawase, Shuji Suzuki, Tsutomu Miki
  • Publication number: 20160129548
    Abstract: In accordance with an embodiment, a polishing method includes supplying slurry to a surface of a polishing layer including a polymer, and bringing a polishing object into contact with the polishing layer to polish the polishing object. The polishing layer has a fibrous first substance mixed therein or contains a second substance. The second substance is higher in specific heat and higher in thermal conductivity than the polymer in such a manner that the second substance is surrounded by the polymer.
    Type: Application
    Filed: September 8, 2015
    Publication date: May 12, 2016
    Inventors: Akifumi GAWASE, Yukiteru MATSUI, Takahiko KAWASAKI, Yosuke OTSUKA, Hajime EDA
  • Publication number: 20160064243
    Abstract: A chemical planarization method according to an embodiment includes a step of forming a hydrophobic protective film on a film to be processed with surface asperity. A dissolving solution for dissolving the film to be processed is supplied to the surface of the protective film. A processing body with a hydrophobic surface is brought into contact with or brought closed to the protective film, and a portion of the protective film is selectively removed by hydrophobic interaction from the film to be processed. The film to be processed is dissolved by the dissolving solution after the portion of the protective film is removed.
    Type: Application
    Filed: March 10, 2015
    Publication date: March 3, 2016
    Inventors: Akifumi GAWASE, Yukiteru MATSUI
  • Publication number: 20160035598
    Abstract: According to one embodiment, a method for chemical planarization includes: preparing a treatment liquid containing a hydrosilicofluoric acid aqueous solution containing silicon dioxide dissolved therein at a saturated concentration; and decreasing height of irregularity of a silicon dioxide film. In the decreasing, dissolution rate of convex portions is made larger than dissolution rate of concave portion of the irregularity while changing equilibrium state of the treatment liquid at areas being in contact with the convex portions of the irregularity, in a state in which the silicon dioxide film having the irregularity is brought into contact with the treatment liquid.
    Type: Application
    Filed: October 16, 2015
    Publication date: February 4, 2016
    Inventors: Masako Kodera, Yukiteru Matsui
  • Publication number: 20160027660
    Abstract: A manufacturing method of a semiconductor device according to an embodiment implants impurities into a central portion of a polishing target film or an outer peripheral portion of the central portion of the polishing target film to cause an impurity concentration in the outer peripheral portion of the polishing target film and an impurity concentration in the central portion thereof to be different from each other, thereby modifying a surface of the polishing target film. The modified surface of the polishing target film is polished by a CMP method.
    Type: Application
    Filed: March 10, 2015
    Publication date: January 28, 2016
    Inventors: YUKITERU MATSUI, KYOICHI SUGURO, AKIFUMI GAWASE, TAKAHIKO KAWASAKI
  • Publication number: 20150357212
    Abstract: According to one embodiment, a planarization method and a planarization apparatus are provided. In the planarization method, a work surface of a work piece is planarized by bringing the work surface of the work piece containing a silicon oxide film and a surface of a solid plate onto which hydrogen ions are adsorbed, into contact or extremely close proximity with one another in a state in which a process liquid containing fluorine ions is supplied to the surface of the solid plate.
    Type: Application
    Filed: August 14, 2015
    Publication date: December 10, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akifumi GAWASE, Yukiteru Matsui, Gaku Minamihaba, Hajime Eda
  • Patent number: 9196501
    Abstract: According to one embodiment, a method for chemical planarization includes: preparing a treatment liquid containing a hydrosilicofluoric acid aqueous solution containing silicon dioxide dissolved therein at a saturated concentration; and decreasing height of irregularity of a silicon dioxide film. In the decreasing, dissolution rate of convex portions is made larger than dissolution rate of concave portion of the irregularity while changing equilibrium state of the treatment liquid at areas being in contact with the convex portions of the irregularity, in a state in which the silicon dioxide film having the irregularity is brought into contact with the treatment liquid.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: November 24, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masako Kodera, Yukiteru Matsui