Patents by Inventor Yumiko Ohno
Yumiko Ohno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7511380Abstract: A semiconductor chip having a plurality of device formative layers that are formed into an integrated thin film is provided by a technique for transferring. According to the present invention, a semiconductor chip that is formed into a thin film and that is highly integrated can be manufactured by transferring a device formative layer with a thickness of at most 50 ?m which is separated from a substrate into another substrate by a technique for transferring, and transferring another device formative layer with a thickness of at most 50 ?m which is separated from another substrate to the above device formative layer, and, repeating such transferring process.Type: GrantFiled: May 25, 2006Date of Patent: March 31, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno
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Patent number: 7495256Abstract: It is an object of the present invention to provide a semiconductor device capable of preventing deterioration due to penetration of moisture or oxygen, for example, a light-emitting apparatus having an organic light-emitting device that is formed over a plastic substrate, and a liquid crystal display apparatus using a plastic substrate. According to the present invention, devices formed on a glass substrate or a quartz substrate (a TFT, a light-emitting device having an organic compound, a liquid crystal device, a memory device, a thin-film diode, a pin-junction silicon photoelectric converter, a silicon resistance element, or the like) are separated from the substrate, and transferred to a plastic substrate having high thermal conductivity.Type: GrantFiled: August 18, 2005Date of Patent: February 24, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno
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Patent number: 7459726Abstract: A semiconductor device which has a high performance integrated circuit formed of an inexpensive glass substrate and capable of processing a large amount of information and operating at higher data rates. The semiconductor device includes semiconductor elements stacked by transferring a semiconductor element formed on a different substrate. A resin film is formed between the stacked semiconductor elements and a metal oxide film is partially formed between the stacked semiconductor elements as well. A first electric signal is converted to an optical signal in a light emitting element electrically connected to one of the stacked semiconductor elements. Meanwhile, the optical signal is converted to a second electric signal in a light receiving element electrically connected to another one of the stacked semiconductor elements.Type: GrantFiled: February 11, 2004Date of Patent: December 2, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
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Patent number: 7436050Abstract: To provide a thin film device which becomes possible to be formed in the portion which has been considered impossible to be provided with such device by the conventional technique, and to provide a semiconductor device which occupies small space and which has high shock resistance and flexibility, a device formation layer with a thickness of at most 50 ?m which was peeled from a substrate by a transfer technique is transferred to another substrate, hence, a thin film device can be formed over various substrates. For instance, a semiconductor device can be formed so as to occupy small space by pasting a thin film device which is transferred to a flexible substrate onto a rear surface of a substrate of a panel, by pasting directly a thin film device onto a rear surface of a substrate of a panel, or by transferring a thin film device to an FPC which is pasted onto a substrate of a panel.Type: GrantFiled: January 21, 2004Date of Patent: October 14, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Yasuyuki Arai, Noriko Shibata
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Publication number: 20080206959Abstract: A peeling method is provided which does not cause damage to a layer to be peeled, and the method enables not only peeling of the layer to be peeled having a small area but also peeling of the entire layer to be peeled having a large area at a high yield. Further, there are provided a semiconductor device, which is reduced in weight through adhesion of the layer to be peeled to various base materials, and a manufacturing method thereof. In particular, there are provided a semiconductor device, which is reduced in weight through adhesion of various elements, typically a TFT, to a flexible film, and a manufacturing method thereof. A metal layer or nitride layer is provided on a substrate; an oxide layer is provided contacting with the metal layer or nitride layer; then, a base insulating film and a layer to be peeled containing hydrogen are formed; and heat treatment for diffusing hydrogen is performed thereto at 410° C. or more.Type: ApplicationFiled: April 28, 2008Publication date: August 28, 2008Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Takuya Tsurume, Hideaki Kuwabara
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Patent number: 7407870Abstract: The present invention is a separation method for easy separation of an allover release layer with a large area. Further, the present invention is the separating method that is not subjected to restrictions in the use of substrates, such as a kind of substrate, during forming a release layer. A separation method comprising the steps of forming a metal film, a first oxide, and a semiconductor film containing hydrogen in this order; and bonding a support to a release layer containing the first oxide and the semiconductor film and separating the release layer bonded to the support from a substrate provided with the metal layer by a physical means.Type: GrantFiled: April 25, 2006Date of Patent: August 5, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junya Maruyama, Yumiko Ohno, Toru Takayama, Yuugo Goto, Shunpei Yamazaki
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Publication number: 20080138943Abstract: An object of the present invention is to provide a semiconductor device formed by laser crystallization by which formation of grain boundaries in the TFT channel formation region can be avoided, and a method of manufacturing the same. Still another object of the present invention is to provide a method of designating the semiconductor device.Type: ApplicationFiled: January 4, 2008Publication date: June 12, 2008Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Toshihiko Saito, Atsuo Isobe, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
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Patent number: 7375006Abstract: A peeling method is provided which does not cause damage to a layer to be peeled, and the method enables not only peeling of the layer to be peeled having a small area but also peeling of the entire layer to be peeled having a large area at a high yield. Further, there are provided a semiconductor device, which is reduced in weight through adhesion of the layer to be peeled to various base materials, and a manufacturing method thereof. In particular, there are provided a semiconductor device, which is reduced in weight through adhesion of various elements, typically a TFT, to a flexible film, and a manufacturing method thereof. A metal layer or nitride layer is provided on a substrate; an oxide layer is provided contacting with the metal layer or nitride layer; then, a base insulating film and a layer to be peeled containing hydrogen are formed; and heat treatment for diffusing hydrogen is performed thereto at 410° C. or more.Type: GrantFiled: October 4, 2006Date of Patent: May 20, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Takuya Tsurume, Hideaki Kuwabara
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Publication number: 20080088034Abstract: It is an object of the present invention to provide a technique for making a semiconductor device thinner without using a back-grinding method for a silicon wafer. According to the present invention, an integrated circuit film is mounted, thereby making a semiconductor device mounting the integrated circuit film thinner. The term “an integrated circuit film” means a film-like integrated circuit which is manufactured based on an integrated circuit manufactured by a semiconductor film formed over a substrate such as a glass substrate or a quartz substrate. In the present invention, the integrated circuit film is manufactured by a technique for transferring.Type: ApplicationFiled: November 30, 2007Publication date: April 17, 2008Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hideaki Kuwabara, Junya Maruyama, Yumiko Ohno, Toru Takayama, Yuugo Goto, Etsuko Arakawa, Shunpei Yamazaki
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Patent number: 7344925Abstract: An object of the present invention is to provide a semiconductor device formed by laser crystallization by which formation of grain boundaries in the TFT channel formation region can be avoided, and a method of manufacturing the same. Still another object of the present invention is to provide a method of designating the semiconductor device.Type: GrantFiled: February 25, 2005Date of Patent: March 18, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Toshihiko Saito, Atsuo Isobe, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
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Patent number: 7303942Abstract: It is an object of the present invention to provide a technique for making a semiconductor device thinner without using a back-grinding method for a silicon wafer. According to the present invention, an integrated circuit film is mounted, thereby making a semiconductor device mounting the integrated circuit film thinner. The term “an integrated circuit film” means a film-like integrated circuit which is manufactured based on an integrated circuit manufactured by a semiconductor film formed over a substrate such as a glass substrate or a quartz substrate. In the present invention, the integrated circuit film is manufactured by a technique for transferring.Type: GrantFiled: December 16, 2003Date of Patent: December 4, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hideaki Kuwabara, Junya Maruyama, Yumiko Ohno, Toru Takayama, Yuugo Goto, Etsuko Arakawa, Shunpei Yamazaki
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Publication number: 20070275506Abstract: It is an object to provide a semiconductor device integrating various elements without using a semiconductor substrate, and a method of manufacturing the same. According to the present invention, a layer to be separated including an inductor, a capacitor, a resistor element, a TFT element, an embedded wiring and the like, is formed over a substrate, separated from the substrate, and transferred onto a circuit board 100. An electrical conduction with a wiring pattern 114 provided in the circuit board 100 is made by a wire 112 or a solder 107, thereby forming a high frequency module or the like.Type: ApplicationFiled: May 10, 2007Publication date: November 29, 2007Applicant: Semiconductor Energy Laboratory., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno, Yuugo Goto, Hideaki Kuwabara
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Publication number: 20070243352Abstract: An object of the present invention is to provide a method of transferring an object to be peeled onto a transferring member in a short time without imparting damage to the object to be peeled within a laminate. Also, another object of the present invention is to provide a method of manufacturing a semiconductor device in which a semiconductor element manufactured on a substrate is transferred onto a transferring member, typically, a plastic substrate. The methods are characterized by including: forming a peeling layer and an object to be peeled on a substrate; bonding the object to be peeled and a support through a two-sided tape; peeling the object to be peeled from the peeling layer by using a physical method, and then bonding the object to be peeled onto a transferring member; and peeling the support and the two-sided tape from the object to be peeled.Type: ApplicationFiled: October 16, 2006Publication date: October 18, 2007Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toru Takayama, Yuugo Goto, Junya Maruyama, Yumiko Ohno
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Publication number: 20070211189Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.Type: ApplicationFiled: May 4, 2007Publication date: September 13, 2007Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
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Patent number: 7245331Abstract: The present invention provides a simplifying method for a peeling process as well as peeling and transcribing to a large-size substrate uniformly. A feature of the present invention is to peel a first adhesive and to cure a second adhesive at the same time in a peeling process, thereby to simplify a manufacturing process. In addition, the present invention is to devise the timing of transcribing a peel-off layer in which up to an electrode of a semiconductor are formed to a predetermined substrate. In particular, a feature is that peeling is performed by using a pressure difference in the case that peeling is performed with a state in which plural semiconductor elements are formed on a large-size substrate.Type: GrantFiled: January 8, 2004Date of Patent: July 17, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
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Publication number: 20070158745Abstract: (Object) It is an object of the present invention to provide a peeling method that causes no damage to a layer to be peeled and to allow not only a layer to be peeled with a small surface area but also a layer to be peeled with a large surface area to be peeled entirely. Further, it is also an object of the present invention to bond a layer to be peeled to various base materials to provide a lighter semiconductor device and a manufacturing method thereof. Particularly, it is an object to bond various elements typified by a TFT, (a thin film diode, a photoelectric conversion element comprising a PIN junction of silicon, or a silicon resistance element) to a flexible film to provide a lighter semiconductor device and a manufacturing method thereof.Type: ApplicationFiled: March 5, 2007Publication date: July 12, 2007Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno
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Publication number: 20070138954Abstract: (OBJECT) The object is to provide a lightened semiconductor device and a manufacturing method thereof by pasting a layer to be peeled to various base materials. (MEANS FOR SOLVING THE PROBLEM) In the present invention, a layer to be peeled is formed on a substrate, then a seal substrate provided with an etching stopper film is pasted with a binding material on the layer to be peeled, followed by removing only the seal substrate by etching or polishing. The remaining etching stopper film is functioned as a blocking film. In addition, a magnet sheet may be pasted as a pasting member.Type: ApplicationFiled: February 5, 2007Publication date: June 21, 2007Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toru Takayama, Junya Maruyama, Yumiko Ohno, Masakazu Murakami, Toshiji Hamatani, Hideaki Kuwabara, Shunpei Yamazaki
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Patent number: 7230316Abstract: It is an object to provide a semiconductor device integrating various elements without using a semiconductor substrate, and a method of manufacturing the same. According to the present invention, a layer to be separated including an inductor, a capacitor, a resistor element, a TFT element, an embedded wiring and the like, is formed over a substrate, separated from the substrate, and transferred onto a circuit board 100. An electrical conduction with a wiring pattern 114 provided in the circuit board 100 is made by a wire 112 or a solder 107, thereby forming a high frequency module or the like.Type: GrantFiled: December 22, 2003Date of Patent: June 12, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno, Yuugo Goto, Hideaki Kuwabara
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Publication number: 20070120132Abstract: It is an object of the present invention to provide a light emitting device having a structure wherein oxygen and moisture are prevented from reaching to the light emitting device, and to provide a manufacturing method thereof. It is another object of the present invention to seal a light emitting device in fewer steps without encapsulating a desiccant. The present invention provides a structure in which a pixel region 13 is surrounded by a first sealing material (having higher viscosity than a second sealing material) 16 including a spacer (filler, minute particles and/or the like) which maintains a gap between the two substrates, filled with a few drops of the transparent second sealing material 17a which is spread in the region; and sealed by using the first sealing material 16 and the second sealing material 17.Type: ApplicationFiled: January 29, 2007Publication date: May 31, 2007Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junya Maruyama, Toru Takayama, Yumiko Ohno
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Publication number: 20070109735Abstract: The present invention intends to realize a narrow frame of a system on panel. In addition to this, a system mounted on a panel is intended to make higher and more versatile in the functionality. In the invention, on a panel on which a pixel portion (including a liquid crystal element, a light-emitting element) and a driving circuit are formed, integrated circuits that have so far constituted an external circuit are laminated and formed. Specifically, of the pixel portion and the driving circuit on the panel, on a position that overlaps with the driving circuit, any one kind or a plurality of kinds of the integrated circuits is formed by laminating according to a transcription technique.Type: ApplicationFiled: January 2, 2007Publication date: May 17, 2007Applicant: Semiconductor Energy Laboratory Co., LTD.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Yasuyuki Arai, Noriko Shibata