Patents by Inventor Yun Chiu
Yun Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10757513Abstract: An adjustment method of a hearing auxiliary device includes steps of (a) providing a context awareness platform and a hearing auxiliary device, (b) acquiring an activity and emotion information and inputting the activity and emotion information to the context awareness platform, (c) acquiring a scene information and inputting the scene information to the context awareness platform, (d) obtaining a sound adjustment suggestion according to the activity and emotional information and the scene information, (e) determining whether a response of a user to the sound adjustment suggestion meets expectation, and (f) when the judgment result of the step (e) is TRUE, transmitting the sound adjustment suggestion to the hearing auxiliary device and adjusting the hearing auxiliary device according to the sound adjustment suggestion. Therefore, the hearing auxiliary device can be appropriately adjusted to meet the demands and correctly and effectively adjusted without any assistance of a professional.Type: GrantFiled: May 23, 2019Date of Patent: August 25, 2020Assignee: COMPAL ELECTRONICS, INC.Inventors: Yi-Ching Chen, Yun-Chiu Ching
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Publication number: 20200233578Abstract: An operating method for a touch display device is provided. The operating method includes the following steps. At least two targets are displayed on a display screen, wherein the at least two targets are circled by a selected range. When a first touch event occurring at a position corresponding to the selected range is detected, a control function is activated for the at least two targets in the selected range until the first touch event is not detected. When the control function is activated, whether a second touch event occurs is detected. When the control function is activated and the second touch event occurs, different control actions are performed respectively to the at least two targets in the selected range according to the behavior of the second touch event.Type: ApplicationFiled: December 30, 2019Publication date: July 23, 2020Applicant: Qisda CorporationInventors: Hao-Lun TANG, Hsiang-Yun CHIU
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Publication number: 20200064670Abstract: An electronic device is provided. The electronic device includes a first substrate and a second substrate disposed on the first substrate. The first substrate includes a first side, and the first side includes a first portion and a second portion. The second substrate covers the first portion. The first portion is unprocessed and the second portion is processed.Type: ApplicationFiled: August 22, 2018Publication date: February 27, 2020Inventors: Liang-Yun CHIU, Tsung-Han TSAI, Yuan-Lin WU
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Publication number: 20190051031Abstract: A system that combines augmented reality (AR) technology with self-created elements to produce video works and a media storing the same are revealed. The system includes a data module used for storing drawing templates and scenes, a video input module that reads a hand-drawn image of a picture book and defines a hand-drawn border, a recognition and analysis module that compares the drawing template with the hand-drawn border to get drawn content, a voice input module that reads a speech to generate voice content, and an integration module that integrates the drawn content, the voice content and the scene for generating a self-created AR work. Thereby users can use the system to create AR video works with self-created elements in a real-time manner.Type: ApplicationFiled: August 13, 2018Publication date: February 14, 2019Inventors: Pei-Wei CHYAU, Shih-Yun CHIU, Yu-Chun LIN
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Patent number: 10061272Abstract: A two-stage successive-approximation-register (SAR) analog-to-digital converter (ADC) comprising is described. The SAR ADC includes a first stage comprising a SAR ADC; a voltage-to-time interface that translates a voltage-domain residue from the SAR ADC to a time-domain residue; and a second stage comprising a time-to-digital converter (TDC) that resolves multiple bits from the time-domain residue.Type: GrantFiled: June 12, 2017Date of Patent: August 28, 2018Assignee: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEMInventors: Yun Chiu, Benwei Xu
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Publication number: 20180219558Abstract: A delta-sigma modulator. The delta-sigma modulator includes a loop filter (LF) and a digital-to-analog converter (DAC) connected to an input of the LF. The delta-sigma modulator also includes an asynchronous successive-approximation register (ASAR) quantizer (QTZ) connected to the DAC. The delta-sigma modulator also includes a second order noise coupling circuit (NC) connected to the ASAR and the DAC.Type: ApplicationFiled: January 30, 2018Publication date: August 2, 2018Inventors: Yun Chiu, Bo Wu
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Patent number: 9990763Abstract: Computer-implemented systems and methods are provided for analyzing and determining properties of virtual environments rendered on a display. The disclosed embodiments include, for example, a method for rendering a virtual environment, the method comprising operations performed with one or more processors. The operations of the method may include generating a plurality of object layers, the object layers representing permissible height values. The method may also include populating the environment with a plurality of objects, wherein each object is associated with a height value corresponding to one of the object layers. The method may also include determining whether any two objects form an occluded pair. The method may also include calculating a cast shadow index for each occluded pair reflecting a magnitude of a height differential between occluding object and the occluded object. The method may also include rendering the virtual environment in accordance with the calculated cast shadow indices.Type: GrantFiled: June 23, 2015Date of Patent: June 5, 2018Assignee: Google LLCInventors: Ariel Sachter-Zeltzer, Christian Robertson, Jon Wiley, John Nicholas Jitkoff, Zachary Gibson, David Haw Yun Chiu
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Patent number: 9968301Abstract: Disclosed are systems and methods for monitoring biopotential signals in biomedical devices. The disclosure provides a mixed signal background calibration that stabilizes the time-varying coupling gain between the body and an electrode due to motion artifacts. The calibration technique involves a low-level test signal in the form of a one-bit pseudorandom bit-sequence that is injected through a reference electrode to the body, detected by the sensing electrode and recorded along with the bio signals. A digital algorithm is employed in the backend to identify the acquisition channel characteristics while maintaining its normal operation of recording. Programmable gain stages in analog or digital domain(s) can be used to stabilize the overall gain of the channel. The disclosed technique is in the background and not interfering with the normal recording operation(s), and provides continuous monitoring of the ETI and continuous correction of the ensuing channel characteristic degradation due to the ETI variation.Type: GrantFiled: July 9, 2014Date of Patent: May 15, 2018Assignee: The Board of Regents, The University of Texas SystemInventors: Yun Chiu, Jingyi Song
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Publication number: 20170357219Abstract: A two-stage successive-approximation-register (SAR) analog-to-digital converter (ADC) comprising is described. The SAR ADC includes a first stage comprising a SAR ADC; a voltage-to-time interface that translates a voltage-domain residue from the SAR ADC to a time-domain residue; and a second stage comprising a time-to-digital converter (TDC) that resolves multiple bits from the time-domain residue.Type: ApplicationFiled: June 12, 2017Publication date: December 14, 2017Inventors: Yun CHIU, Benwei XU
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Patent number: 9819314Abstract: A pipelined SAR ADC includes a first stage and passive residue transfer is used to boost a conversion speed. Owing to the passive residue transfer, the first stage may be released during a residue amplification phase, cutting down a large part of the first-stage timing budget. An asynchronous timing scheme may also be adopted in both the first- and second-stage SAR ADCs to maximize the overall conversion speed. Lastly, a dynamic amplifier with proposed PVT stabilization technique may be employed to further save power consumption and improve the conversion speed simultaneously.Type: GrantFiled: January 31, 2017Date of Patent: November 14, 2017Assignee: Board of Regents, The University of Texas SystemInventors: Yun Chiu, Hai Huang
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Patent number: 9607427Abstract: Computer-implemented systems and methods are provided for analyzing and determining properties of virtual environments rendered on a display. The disclosed embodiments include, for example, a method for obtaining, by one or more processors, one or more depth parameters comprising one or more display parameters reflecting characteristics of the display, wherein the display parameters include a height and width of the display, and one or more environment depth multipliers reflecting a scaling factor to optimize display performance. The method may also include calculating, by the one or more processors, a diagonal display distance based on the display parameters. The method may also include calculating, by the one or more processors, an environment depth based on the diagonal display distance and the one or more environment depth multipliers. The method may also include setting, by the one or more processors, the depth of the display equal to the environment depth.Type: GrantFiled: June 24, 2015Date of Patent: March 28, 2017Assignee: Google Inc.Inventors: Ariel Sachter-Zeltzer, Christian Robertson, Jon Wiley, John Nicholas Jitkoff, Zachary Gibson, David Haw Yun Chiu
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Patent number: 9577593Abstract: Disclosed are systems implementing an implicit Feed-Forward Compensated (FFC) op-amp, where the main FFC port is realized by the P-side of the CMOS input structure of the 2nd and 3rd stages of the op-amp, while the main signal path is through the N-side. According to some embodiments, to balance the relative strengths of the main path and feed-forward paths, the 2nd-stage NMOS input pair is split into two pairs, one is used to route the main path while the other is used for auxiliary FFC. The disclosed implicit FCC op-amp is unconditionally stable with adequate phase lead. According to some embodiments, the disclosed op-amp, which may be a wide-band op-amp, can be used in highly linear applications operative at intermediate frequency (IF), such as signal buffers for high-performance data converters or radio-frequency (RF) modulators and demodulators, continuous-time (CT) filters or sigma-delta data converters.Type: GrantFiled: April 15, 2014Date of Patent: February 21, 2017Assignee: Board of Regents, The University of Texas SystemInventors: Yun Chiu, Bo Wu
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Patent number: 9287889Abstract: Disclosed are methods and systems implementing digital background calibration techniques for identifying and remedying dynamic path-mismatch errors in time-interleaved analog-to-digital converters (TI-ADC). The disclosed systems and methods employ a calibration technique specifically focuses on removing the timing skew and input bandwidth mismatches by equalizing each sub-ADC in an array to a common reference ADC using direct input derivative information. The errors are identified by correlating the ensuing conversion error to the input derivatives of various orders to identify the mismatch parameters. Simple passive high-pass filters (HPF) are used to extract input derivatives followed by one-bit quantizers.Type: GrantFiled: April 17, 2014Date of Patent: March 15, 2016Assignee: The Board of Regents, The University of Texas SystemInventors: Yun Chiu, Benwei Xu
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Publication number: 20160007928Abstract: Disclosed are systems and methods for monitoring biopotential signals in biomedical devices. The disclosure provides a mixed signal background calibration that stabilizes the time-varying coupling gain between the body and an electrode due to motion artifacts. The calibration technique involves a low-level test signal in the form of a one-bit pseudorandom bit-sequence that is injected through a reference electrode to the body, detected by the sensing electrode and recorded along with the bio signals. A digital algorithm is employed in the backend to identify the acquisition channel characteristics while maintaining its normal operation of recording. Programmable gain stages in analog or digital domain(s) can be used to stabilize the overall gain of the channel. The disclosed technique is in the background and not interfering with the normal recording operation(s), and provides continuous monitoring of the ETI and continuous correction of the ensuing channel characteristic degradation due to the ETI variation.Type: ApplicationFiled: July 9, 2014Publication date: January 14, 2016Applicant: THE BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEMInventors: Yun Chiu, Jingyi Song
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Publication number: 20150371438Abstract: Computer-implemented systems and methods are provided for analyzing and determining properties of virtual environments rendered on a display. The disclosed embodiments include, for example, a method for obtaining, by one or more processors, one or more depth parameters comprising one or more display parameters reflecting characteristics of the display, wherein the display parameters include a height and width of the display, and one or more environment depth multipliers reflecting a scaling factor to optimize display performance. The method may also include calculating, by the one or more processors, a diagonal display distance based on the display parameters. The method may also include calculating, by the one or more processors, an environment depth based on the diagonal display distance and the one or more environment depth multipliers. The method may also include setting, by the one or more processors, the depth of the display equal to the environment depth.Type: ApplicationFiled: June 24, 2015Publication date: December 24, 2015Inventors: Ariel SACHTER-ZELTZER, Christian ROBERTSON, Jon WILEY, John Nicholas JITKOFF, Zachary GIBSON, David Haw Yun CHIU
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Publication number: 20150371436Abstract: Computer-implemented systems and methods are provided for analyzing and determining properties of virtual environments rendered on a display. The disclosed embodiments include, for example, a method for rendering a virtual environment, the method comprising operations performed with one or more processors. The operations of the method may include generating a plurality of object layers, the object layers representing permissible height values. The method may also include populating the environment with a plurality of objects, wherein each object is associated with a height value corresponding to one of the object layers. The method may also include determining whether any two objects form an occluded pair. The method may also include calculating a cast shadow index for each occluded pair reflecting a magnitude of a height differential between occluding object and the occluded object. The method may also include rendering the virtual environment in accordance with the calculated cast shadow indices.Type: ApplicationFiled: June 23, 2015Publication date: December 24, 2015Inventors: Ariel SACHTER-ZELTZER, Christian ROBERTSON, Jon WILEY, John Nicholas JITKOFF, Zachary GIBSON, David Haw Yun CHIU
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Publication number: 20150303934Abstract: Disclosed are methods and systems implementing digital background calibration techniques for identifying and remedying dynamic path-mismatch errors in time-interleaved analog-to-digital converters (TI-ADC). The disclosed systems and methods employ a calibration technique specifically focuses on removing the timing skew and input bandwidth mismatches by equalizing each sub-ADC in an array to a common reference ADC using direct input derivative information. The errors are identified by correlating the ensuing conversion error to the input derivatives of various orders to identify the mismatch parameters. Simple passive high-pass filters (HPF) are used to extract input derivatives followed by one-bit quantizers.Type: ApplicationFiled: April 17, 2014Publication date: October 22, 2015Applicant: The Board of Regents, The University of Texas SystemInventors: Yun Chiu, Benwei Xu
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Publication number: 20150295551Abstract: Disclosed are systems implementing an implicit Feed-Forward Compensated (FFC) op-amp, where the main FFC port is realized by the P-side of the CMOS input structure of the 2nd and 3rd stages of the op-amp, while the main signal path is through the N-side. According to some embodiments, to balance the relative strengths of the main path and feed-forward paths, the 2nd-stage NMOS input pair is split into two pairs, one is used to route the main path while the other is used for auxiliary FFC. The disclosed implicit FCC op-amp is unconditionally stable with adequate phase lead. According to some embodiments, the disclosed op-amp, which may be a wide-band op-amp, can be used in highly linear applications operative at intermediate frequency (IF), such as signal buffers for high-performance data converters or radio-frequency (RF) modulators and demodulators, continuous-time (CT) filters or sigma-delta data converters.Type: ApplicationFiled: April 15, 2014Publication date: October 15, 2015Applicant: THE BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEMInventors: YUN CHIU, BO WU
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Patent number: 9154146Abstract: Disclosed are systems employing a digital background calibration technique for linearizing the front-end circuits of IF-sampling ADCs. The disclosed systems and methods employ a power series model to eliminate the static non-linearity with split-ADC architecture and LMS algorithm for background learning. The present disclosure utilizes a technique for applying two different offset signals to the input of two conversion paths in the split-ADC architecture. When the system nonlinearity is successfully calibrated, the output difference between the two conversion paths results in a fixed offset that is identical to the offset injected at the input. The disclosed digital background calibration technique can linearize the front-end circuits of high-speed ADCs and significantly reduce power consumption.Type: GrantFiled: June 3, 2014Date of Patent: October 6, 2015Assignee: The Board of Regents, The University of Texas SystemInventors: Yun Chiu, Yuan Zhou, Yanqing Li
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Publication number: 20090167362Abstract: A comparator is provided. In a first period, input terminal of the pre-amplifier is coupled to a first voltage. A first terminal of the first capacitor is coupled to the second input terminal of the pre-amplifier. A second terminal of the first capacitor is coupled to the first input voltage in the first period, and is coupled to the second input voltage in the second period. The second capacitor is coupled between the output terminal of the pre-amplifier and an input terminal of the gain unit. The switch is coupled between the input terminal and an output terminal of the gain unit. An input terminal of the latch is coupled to the output terminal of the gain unit. The latch outputs a comparison result.Type: ApplicationFiled: December 28, 2007Publication date: July 2, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Szu-Kang Hsien, Yun Chiu