Patents by Inventor Yun Fu

Yun Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090267176
    Abstract: The disclosure describes a multi-layer shallow trench isolation structure in a semiconductor device. The shallow trench isolation structure may include a first void-free, doped oxide layer in the shallow trench, and a second void-free layer above the first doped oxide layer. The first layer may be formed by vapor deposition of precursors of a source of silicon, a source of oxygen and sources of doping materials and making the layer void-free by reflowing the initial layer by an annealing process. The second layer may be formed by vapor deposition of precursors of silicon and doping materials and making the layer void-free by reflowing the initial layer by an annealing process. Alternatively, the second layer may be a silicon oxide layer that may be formed by an atomic layer deposition method. The processing conditions for forming the two layers are different.
    Type: Application
    Filed: April 29, 2008
    Publication date: October 29, 2009
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Tine Yang, Chen-Hua Yu, Chu-Yun Fu
  • Publication number: 20090233410
    Abstract: A method of forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric over the semiconductor substrate, wherein the semiconductor substrate and a sidewall of the gate dielectric has a joint point; forming a gate electrode over the gate dielectric; forming a mask layer over the semiconductor substrate and the gate electrode, wherein a first portion of the mask layer adjacent the joint point is at least thinner than a second portion of the mask layer away from the joint point; after the step of forming the mask layer, performing a halo/pocket implantation to introduce a halo/pocket impurity into the semiconductor substrate; and removing the mask layer after the halo/pocket implantation.
    Type: Application
    Filed: March 13, 2008
    Publication date: September 17, 2009
    Inventors: Chen-Hua Yu, Yihang Chiu, Shu-Tine Yang, Jyh-Cherng Sheu, Chu-Yun Fu, Cheng-Tung Lin
  • Publication number: 20090167158
    Abstract: In an OLED there is a reflectivity influencing layer (27) which is preferably semi-absorbent and in embodiments is dark coloured or black which is formed of a sublimable organometallic compound. The reflectivity influencing layer is formed between an electrode (29 or 22) and a light-emitting layer (25).
    Type: Application
    Filed: November 7, 2006
    Publication date: July 2, 2009
    Inventors: Poopathy Kathirgamanathan, Seenivasagam Ravichandran, Yun Fu Chan
  • Publication number: 20090155826
    Abstract: Biomarkers relating to insulin resistance, pre-diabetes, type-2 diabetes, metabolic syndrome, atherosclerosis, and cardiomyopathy are provided, as well as methods for using such biomarkers as biomarkers for insulin resistance, pre-diabetes, type-2 diabetes, metabolic syndrome, atherosclerosis, and cardiomyopathy. In addition, methods for modulating the respective disorders or conditions of a subject are also provided. Also provided are suites of small molecule entities as biomarkers for insulin resistance, pre-diabetes, type-2 diabetes, metabolic syndrome, atherosclerosis, and cardiomyopathy.
    Type: Application
    Filed: July 17, 2008
    Publication date: June 18, 2009
    Applicant: Metabolon, Inc.
    Inventors: Yun Fu Hu, Costel Chirila, Danny Alexander, Michael Milburn, Matthew W. Mitchell, Walter Gall, Kay A. Lawton
  • Patent number: 7548908
    Abstract: Methods, systems, and machine-readable media are disclosed for searching a corpus of information by utilizing a Bloom filter for caching query results. According to one aspect of the present invention, a method of caching information from a corpus of information can include populating one or more Bloom filters with a plurality of bits representative of information in the corpus of information. A search request can be received identifying requested information from the corpus of information. One or more bits in the filter(s) associated with the requested information can be checked and the requested information can be retrieved from the corpus of information based on results of said checking. Furthermore, the filter(s) can be used to determine which information to make available to a particular user in a system where certain information is associated with or access is limited to certain users or groups of users.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: June 16, 2009
    Assignee: Yahoo! Inc.
    Inventors: Yun Fu, Zhichen Xu, Jianchang Mao
  • Patent number: 7531316
    Abstract: This invention relates to a method for determining the activity of Lp-PLA2 in a plurality of samples from animals. The invention also relates to a kit for determining Lp-PLA2 activity in a plurality of samples.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: May 12, 2009
    Assignee: Glaxo Group Limited
    Inventors: Yun-Fu Hu, George T. Walker
  • Patent number: 7518392
    Abstract: Various systems and methods for device configuration are disclosed herein. For example, some embodiments of the present invention provide high speed pin continuity and pin-to-pin short tester circuits. Such circuits include a threshold driver, a test driver, and a comparator. An input of the threshold driver is electrically coupled to a voltage threshold, and an output of the threshold driver is electrically coupled to a test pin node via a current limiting resistor. An input of the test driver is electrically coupled to a drive data input, and an output of the test driver is electrically coupled to the test pin node. One input of the comparator is electrically coupled to the test pin node, and the other input of the comparator is electrically coupled to a threshold comparator input.
    Type: Grant
    Filed: August 2, 2006
    Date of Patent: April 14, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Gunvant T. Patel, Trevor J. Tarsi, Yun-Fu Wang, Anthony J. Lendino
  • Patent number: 7510411
    Abstract: An electrical connector comprises a dielectric housing which comprises a base portion, a plurality of contact receiving recesses, and engaging holes in diagonal corners thereof; a plurality of conductive contacts retained in said contact receiving recesses; a pick up comprising first engaging pole and second engaging pole corresponding to said engaging holes; each of the first and second engaging poles having a shape of a circular cylinder with a plurality of ribs on a circular surface thereof; said first engaging pole having at least three ribs while said second engaging pole having at least two ribs; the line joining the center of said first engaging pole and the center of said second engaging pole being perpendicular to the line joining the centers of said two ribs of said second engaging pole.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: March 31, 2009
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: Tsu-Yang Wu, Yun-Fu Tsai, Sheng-Ko Chen
  • Publication number: 20090035909
    Abstract: The present disclosure provides a method of fabricating a FinFET element including providing a substrate including a first fin and a second fin. A first layer is formed on the first fin. The first layer comprises a dopant of a first type. A dopant of a second type is provided to the second fin. High temperature processing of the substrate is performed on the substrate including the formed first layer and the dopant of the second type.
    Type: Application
    Filed: July 31, 2007
    Publication date: February 5, 2009
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Hung Chang, Chen-Hua Yu, Chen-Nan Yeh, Chu-Yun Fu, Yu-Rung Hsu, Ding-Yuan Chen
  • Patent number: 7487508
    Abstract: According to one embodiment of the present invention, a method for reconstructing client web page accesses is provided that comprises capturing network-level information for client accesses of at least one web page, and using the captured network-level information to reconstruct client accesses of the at least one web page. Another embodiment of the present invention provides a method for reconstructing client information accesses. The method comprises capturing network-level information for client accesses of information from a server, wherein each client access of the information comprises a plurality of transactions. The method further comprises relating the plurality of transactions to their corresponding client access of information from the server.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: February 3, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Yun Fu, Ludmila Cherkasova, Wenting Tang
  • Publication number: 20080303104
    Abstract: A semiconductor device including reentrant isolation structures and a method for making such a device. A preferred embodiment comprises a substrate of semiconductor material forming at least one isolation structure having a reentrant profile and isolating one or more adjacent operational components. The reentrant profile of the at least one isolation structure is formed of substrate material and is created by ion implantation, preferably using oxygen ions applied at a number of different angles and energy levels. In another embodiment the present invention is a method of forming an isolation structure for a semiconductor device performing at least one oxygen ion implantation.
    Type: Application
    Filed: June 5, 2007
    Publication date: December 11, 2008
    Inventors: Chen-Hua Yu, Chen-Nan Yeh, Chu-Yun Fu, Ding-Yuan Chen
  • Patent number: 7437451
    Abstract: According to one embodiment of the present invention, a method for compiling desired information for network transactions is provided. The method comprises capturing network-level information in a kernel-level module of a processor-based device arranged on the server-side of a client-server communication network, and using the captured network-level information to compile, in the kernel-level module, desired information for at least one network transaction conducted between a client and a server via the client-server communication network. Another embodiment of the present invention provides a method for compiling desired information for network transactions that comprises implementing a kernel-level module in a STREAMS-based network stack of a server, wherein the kernel-level module is operable to monitor a network connection to the server to compile desired information for network transactions conducted through the network connection.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: October 14, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Wenting Tang, Ludmila Cherkasova, Yun Fu
  • Publication number: 20080194072
    Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer on the semiconductor substrate; forming a first silicon-containing layer on the gate dielectric layer, wherein the first silicon-containing layer is substantially free from p-type and n-type impurities; forming a second silicon-containing layer over the first silicon-containing layer, wherein the second silicon-containing layer comprises an impurity; and performing an annealing to diffuse the impurity in the second silicon-containing layer into the first silicon-containing layer.
    Type: Application
    Filed: February 12, 2007
    Publication date: August 14, 2008
    Inventors: Chen-Hua Yu, Ding-Yuan Chen, Chu-Yun Fu, Liang-Gi Yao, Chen-Nan Yeh
  • Publication number: 20080194087
    Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer on the semiconductor substrate; forming a first silicon-containing layer on the gate dielectric layer, wherein the first silicon-containing layer is substantially free from p-type and n-type impurities; forming a second silicon-containing layer over the first silicon-containing layer, wherein the second silicon-containing layer comprises an impurity; and performing an annealing to diffuse the impurity in the second silicon-containing layer into the first silicon-containing layer.
    Type: Application
    Filed: March 28, 2007
    Publication date: August 14, 2008
    Inventors: Chen-Hua Yu, Ding-Yuan Chen, Chu-Yun Fu, Liang-Gi Yao, Chen-Nan Yeh
  • Publication number: 20080172399
    Abstract: The present invention is directed towards systems and method for organization of bookmarks. The method according to one embodiment comprises retrieving one or more bookmarks associated with one or more content items, a given bookmark generated by a user of a client device and identifying one or more tags associated with one or uniform resource locators corresponding to the or more bookmarks. A bookmark folder hierarchy is created through use of a clustering algorithm on the basis of the one or more tags associated with the one or more uniform resource locators corresponding to the one or more bookmarks.
    Type: Application
    Filed: January 17, 2007
    Publication date: July 17, 2008
    Inventors: Liang-Yu Chi, Dmitry Yurievich Pavlov, Yun Fu, Eren Manavoglu, Paul Heymann, Zhichen Xu
  • Publication number: 20080158222
    Abstract: A method of generating an avatar for a user may include receiving image data of a user from a camera, generating feature vectors for a plurality of features of a user, associating the user with a likely user group selected from a number of defined user groups based on the feature vectors, and assigning an avatar based on the associated user group.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Applicant: Motorola, Inc.
    Inventors: Renxiang Li, Dongge Li, Yun Fu
  • Publication number: 20080155465
    Abstract: Techniques are described for identifying items that have recently undergone an interest burst. Items that have recently undergone an interest burst are identified by comparing how many interest-actions have been performed on the items during a current time window against how many interest-actions have been performed on the items historically. Various tests are performed to rule out candidates that are not likely to be of interest to other users. In addition, various spam detection techniques are described for reducing the possibility that the items that are listed as interest burst items are listed because of spam.
    Type: Application
    Filed: December 21, 2006
    Publication date: June 26, 2008
    Inventors: Yun Fu, Zhichen Xu, Liang-Yu (Tom) Chi
  • Patent number: 7371629
    Abstract: A method is provided for improving Idsat in NMOS and PMOS transistors. A silicon nitride etch stop layer is deposited by a PECVD technique on STI and silicide regions and on sidewall spacers during a MOSFET manufacturing scheme. A dielectric layer is formed on the nitride and then contact holes are fabricated through the dielectric layer and nitride layer to silicide regions and are filled with a metal. For NMOS transistors, silane and NH3 flow rates and a 400° C. temperature are critical in improving NMOS short channel Idsat. Hydrogen content in the nitride is increased by higher NH3 and SiH4 flow rates but does not significantly degrade HCE and Vt. With PMOS transistors, deposition temperature is increased to 550° C. to reduce hydrogen content and improve HCE and Vt stability.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: May 13, 2008
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chu-Yun Fu, Chi-Hsun Hsieh, Yi-Ming Sheu, Syun-Ming Jang
  • Publication number: 20080090442
    Abstract: An electrical connector comprises a dielectric housing which comprises a base portion, a plurality of contact receiving recesses, and engaging holes in diagonal corners thereof; a plurality of conductive contacts retained in said contact receiving recesses; a pick up comprising first engaging pole and second engaging pole corresponding to said engaging holes; each of the first and second engaging poles having a shape of a circular cylinder with a plurality of ribs on a circular surface thereof; said first engaging pole having at least three ribs while said second engaging pole having at least two ribs; the line joining the center of said first engaging pole and the center of said second engaging pole being perpendicular to the line joining the centers of said two ribs of said second engaging pole.
    Type: Application
    Filed: October 15, 2007
    Publication date: April 17, 2008
    Inventors: Tsu-Yang Wu, Yun-Fu Tsai, Sheng-Ko Chen
  • Patent number: 7297632
    Abstract: A method for forming a semiconductor device utilizing a chemical-mechanical polishing (CMP) process is provided. In one example, the method includes sequentially performing a first CMP process for removing a first portion of an oxide surface of a semiconductor device using a high selectivity slurry (HSS) and a first polish pad, interrupting the first CMP process, cleaning the semiconductor device and the first polish pad, and performing a second CMP process for removing a second portion of the oxide surface.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: November 20, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chuang-Ping Hou, Syun-Ming Jang, Ying-Ho Chen, Chu-Yun Fu, Tung-Ching Tseng