Abstract: A method for forming a semiconductor device structure is provided. The method includes forming an interconnect structure over a substrate. The method includes forming a first conductive pad and a mask layer over the interconnect structure. The mask layer covers a top surface of the first conductive pad. The method includes forming a metal oxide layer over a sidewall of the first conductive pad. The method includes forming a second conductive pad over the first conductive pad and passing through the mask layer. The first conductive pad and the second conductive pad are made of different materials.

Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.

Abstract: In some examples, an apparatus may include a backlight unit (BLU) including an electronic integrated circuit layer, a photonic integrated circuit layer, a color conversion module, and a display interface layer. In some examples, a BLU may include at least one laser or may be configured to receive laser light from at least one external laser source. Laser light may be transmitted towards a portion of the display interface layer using the photonic integrated circuit. Color conversion modules may be used to convert the laser light into one or more desired colors. Example apparatus may be used in head-mounted devices such as augmented reality and/or virtual reality devices. Other devices, methods, systems, and computer-readable media are also disclosed.

Abstract: A gateway device selection method is provided. The method includes: receiving, by a terminal device, a message from a gateway device, where the message includes identification information of the gateway device, and the identification information of the gateway device indicates information about the gateway device; determining, by the terminal device, that the identification information of the gateway device is consistent with preset identification information of a gateway device on the terminal device, and using the gateway device as a selected gateway device; and sending, by the terminal device, a data packet to the selected gateway device. This helps the terminal device correctly identify the gateway device to which the terminal device is to send data.

Abstract: A semiconductor device and method of fabricating the same include a substrate, a first epitaxial layer, a first protection layer, and a contact etching stop layer. The substrate includes a PMOS transistor region, and the first epitaxial layer is disposed on the substrate, within the PMOS transistor region. The first protection layer is disposed on the first epitaxial layer, covering surfaces of the first epitaxial layer. The contact etching stop layer is disposed on the first protection layer and the substrate, wherein a portion of the first protection layer is exposed from the contact etching stop layer.

Abstract: A thermoplastic vulcanizate is provided. The thermoplastic vulcanizate includes: (A) about 100 parts by weight of a styrene copolymer rubber; (B) about 40-90 parts by weight of a thermoplastic elastomer; (C) about 5-15 parts by weight of an interfacial compatible resin; and (D) about 0.2-3 parts by weight of a cross-linking formulation, wherein the content of component (A) is greater than the content of component (B). Component (A) is dispersed in component (B) in the form of particles with a particle size of about 0.5-10 ?m.

Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.

Abstract: A memory device includes a main array comprising main memory cells; a redundancy array comprising redundancy memory cells; and write circuitry configured to perform a first programming operation on a main memory cell, to detect whether a current of the main memory cell exceeds a predefined current threshold during the first programming operation, and to disable a second programming operation for a redundancy memory cell if the current of the main memory cell exceeds the predefined current threshold during the first programming operation.

Abstract: An epitaxial structure adapted to a semiconductor pickup element is provided. The semiconductor pickup element has at least one guiding structure and provided with a pickup portion. The epitaxial structure includes a semiconductor layer corresponding to the pickup portion and capable of being picked up by the semiconductor pickup element. The epitaxial structure also includes at least one alignment structure disposed on the semiconductor layer and corresponding to the at least one guiding structure, so that the epitaxial structure and the semiconductor pickup element are positioned relative to each other. The number of the at least one alignment structure matches the number of the at least one guiding structure.

Abstract: The present invention provides a method of modulating the expression of a gene containing expanded nucleotide repeats in a cell, comprising: inhibiting the biological activity of SPT4 or SUPT4H; and regulating the formation of R-loops. The inhibition step can effectively reduce the expression of the gene containing the expanded nucleotide repeats and the regulatory step can further enhance the inhibition step. The inhibition step and the regulation step are for the purpose of regulating gene expression by interfering the capacity of RNA polymerase II transcribing over a DNA template with lengthy nucleotide repeats.

Abstract: A multi-compartment bed radial flow adsorber capable of realizing large telescopic deformation mainly comprises an adsorber body, the adsorber body consists of an upper seal head, a barrel, a lower seal head and a pressed shell connected with an upper connecting pipe and a lower connecting pipe, the upper seal head and the lower seal head of the shell are each provided with an upper gas inlet and outlet pipe and a lower gas inlet and outlet pipe, a supporting seat is arranged at the bottom in the shell, an adsorption barrel is arranged above the supporting seat and consists of a plurality of concentric barrels with different diameters, a plurality of annular spaces are formed by the concentric barrels with different diameters, different types of adsorbents can be filled in the annular spaces, and the adsorption barrel is composed of a pore plate or a grid.

Abstract: A kinase inhibitor, comprising a compound of formula (I) or a pharmaceutically acceptable salt, solvate, ester, acid, metabolite or prodrug thereof. A method and a use for using the inhibitor for treatment of diseases related to CDK9 and/or mutagenic activity thereof.

Abstract: Bonding a full-bridge device and an LLC device in a stack, or forming the full-bridge device and the LLC device on a same substrate, rather than connecting the devices, reduces a chip area associated with a power converter including the full-bridge device and the LLC device. Additionally, the full-bridge device and the LLC device consume less power because parasitic inductance and capacitance are reduced. Additionally, raw materials and production time are conserved that would otherwise have been used to connect the full-bridge device and the LLC device (e.g., via wires).

Abstract: An electrical connector includes an insulating housing and a terminal module. The terminal module is fastened in the insulating housing. The terminal module includes a plurality of corrosion resistance terminals. Each corrosion resistance terminal has a fastening portion. A front end of the fastening portion extends frontward to form a contacting portion. A rear end of the fastening portion defines a soldering portion. A surface of the contacting portion of each corrosion resistance terminal sequentially has a copper electroplating layer, a nickel-tungsten electroplating layer, a gold electroplating layer, a platinum alloy electroplating layer and a rhodium-ruthenium alloy electroplating layer from an inside to an outside. A surface of the fastening portion of each corrosion resistance terminal is covered with an electro-deposition coating.

Abstract: A method for generating a user interface for analyzing a patient-specific electronic medical or health record that includes a problem list includes the steps of grouping related potential problems into problem list categories, grouping a subset of the problems into clusters within the categories, mapping, using a computer, entries in the problem list with a respective description in an interface terminology, associating one or more of other medical data, e.g., medication, lab results, procedures, imaging results, past medical history or surgeries, notes, vital signs, or allergy data in the record with at least one problem, receiving a request corresponding to a problem or problem list category or to other medical data, identifying non-problem data in the record grouped in a cluster with the requested data, and modifying a user interface to display the identified data separate from other similar medical data included in the electronic medical or health record.

Abstract: The present disclosure provides embodiments of semiconductor structures. A semiconductor structure according to the present disclosure includes a substrate, a fin-shaped structure disposed over the substrate, the fin-shaped structure including a plurality of first semiconductor layers interleaved by a plurality of second semiconductor layers, a gate structure disposed over a channel region of the fin-shaped structure, a first source/drain feature extending through at least a first portion the fin-shaped structure, a second source/drain feature extending through at least a second portion of the fin-shaped structure, and a backside metal line disposed below the substrate and spaced apart from the first source/drain feature and the second source/drain feature.

Abstract: In some embodiments, the present disclosure relates to a method of forming a high electron mobility transistor (HEMT) device. The method includes forming a passivation layer over a substrate. A source contact and a drain contact are formed within the passivation layer. A part of the passivation layer is removed to form a cavity. The cavity has a lower portion formed by a first sidewall and a second sidewall of the passivation layer and an upper portion formed by the first sidewall of the passivation layer and a sidewall of the source contact. A gate structure is formed within the passivation layer between the drain contact and the cavity. A cap structure is formed within the cavity.

Abstract: A semiconductor device includes a first semiconductor structure including a first high electron mobility transistor (HEMT) device, wherein the first HEMT device includes a first gate, a first source, and a first drain; and a second semiconductor structure stacked above and bonded to the first semiconductor structure, wherein the second semiconductor structure includes a second HEMT device and a third HEMT device, wherein the second HEMT device includes a second gate, a second source, and a second drain that is electrically connected to the first source, wherein the third HEMT device includes a third gate, a third source, and a third drain that is electrically connected to the first gate.