Abstract: A method for preparing high-toughness heat-resistant aluminum alloy armature material, comprises: heating and melting an aluminum ingot into an aluminum liquid; adding the following elements to the aluminum solution in mass percent: Ce 6-12%, Y 5-9.5%, Zr 0.5-3%, Mg 0.1-2.5%, X 0.15-2.5%, Fe 0.15-0.25%, Mn 0.05-0.15%, and Si 0.1-0.5%; forming an alloy solution and casting same into an alloy ingot; processing the alloy ingot into spherical alloy powder; subjecting the spherical alloy powder to selective laser melting and solidification forming to produce nano-scale Al11Ce3, Al3(Y, Zr), and/or Al3X intermetallic compounds distributed in a net-like skeleton structure in an aluminum matrix. The material of the present disclosure has low density, high-temperature resistance, high energy absorption rate and excellent electrical conductivity, and excellent mechanical properties at room temperature and high temperature.

Abstract: A spiral ultrasonic tomography imaging method and system are provided. The method is to use synchronous rotation of an ultrasonic probe or cyclic switching of emission array elements in the ultrasonic probe under the premise of a uniform displacement of the ultrasonic probe along the Z axis, so that the change trajectory of the positions of emission array elements over time in a three-dimensional space at each ultrasonic emission time is distributed along a spiral line or a curve. During the process of the uniform displacement of the ultrasonic probe along the Z axis, the ultrasonic probe emits ultrasonic waves and receives and collects echo data. The collected echo data is stored and post-processed to realize ultrasonic tomography imaging of an object. The spiral ultrasonic tomography three-dimensional scanning method and the corresponding system realize rapid continuous uninterrupted data acquisition to ensure that higher spatial resolution in the Z-axis direction.

Abstract: The present invention provides a smart wearable device, which is held on an upper body of a wearer by a plurality of contact pad sets, and has a connection unit, a first sensing module, a second sensing module, and an extension unit.

Abstract: A memory device includes a main array comprising main memory cells; a redundancy array comprising redundancy memory cells; and write circuitry configured to perform a first programming operation on a main memory cell, to detect whether a current of the main memory cell exceeds a predefined current threshold during the first programming operation, and to disable a second programming operation for a redundancy memory cell if the current of the main memory cell exceeds the predefined current threshold during the first programming operation.

Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.

Abstract: The application relates to an anti-back-transfer intake structure of a rotating detonation combustion chamber including a Tesla valve communicating with the rotating detonation combustion chamber and arranged at an inlet of the rotating detonation combustion chamber. The Tesla valve includes a casing and a flow passage, the casing is coaxially connected with an outer wall of the rotating detonation combustion chamber, the flow passage is arranged in the casing, and the flow passage has an inlet end for introducing air, and an outlet end connected with an annular passage of the rotating detonation combustion chamber.

Abstract: The present application relates to a pregabalin sustained release composition, comprising: (a) an active ingredient; (b) a matrix-forming agent; (c) a swelling agent; (d) a gelling agent; and optionally a filler. The pregabalin sustained release composition provided in the present application can rapidly swell in volume when exposed to aqueous medium until exceeding the dimeter of human gastric pyloric (13 mm). It thereby prolongs the gastric emptying time to increase the retention time of pregabalin in the stomach and enhances absorption of pregabalin in the small intestine and ascending colon. Moreover, the pregabalin sustained release composition provided herein achieves a sustained release for 24 h, which allows QD (once a day) administration, reduces administration number, and improves patient compliance.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming an interconnect structure over a substrate. The method includes forming a first conductive pad and a mask layer over the interconnect structure. The mask layer covers a top surface of the first conductive pad. The method includes forming a metal oxide layer over a sidewall of the first conductive pad. The method includes forming a second conductive pad over the first conductive pad and passing through the mask layer. The first conductive pad and the second conductive pad are made of different materials.

Abstract: A semiconductor device and method of fabricating the same include a substrate, a first epitaxial layer, a first protection layer, and a contact etching stop layer. The substrate includes a PMOS transistor region, and the first epitaxial layer is disposed on the substrate, within the PMOS transistor region. The first protection layer is disposed on the first epitaxial layer, covering surfaces of the first epitaxial layer. The contact etching stop layer is disposed on the first protection layer and the substrate, wherein a portion of the first protection layer is exposed from the contact etching stop layer.

Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.

Abstract: A memory device includes a main array comprising main memory cells; a redundancy array comprising redundancy memory cells; and write circuitry configured to perform a first programming operation on a main memory cell, to detect whether a current of the main memory cell exceeds a predefined current threshold during the first programming operation, and to disable a second programming operation for a redundancy memory cell if the current of the main memory cell exceeds the predefined current threshold during the first programming operation.

Abstract: The present invention provides a method of modulating the expression of a gene containing expanded nucleotide repeats in a cell, comprising: inhibiting the biological activity of SPT4 or SUPT4H; and regulating the formation of R-loops. The inhibition step can effectively reduce the expression of the gene containing the expanded nucleotide repeats and the regulatory step can further enhance the inhibition step. The inhibition step and the regulation step are for the purpose of regulating gene expression by interfering the capacity of RNA polymerase II transcribing over a DNA template with lengthy nucleotide repeats.

Abstract: A multi-compartment bed radial flow adsorber capable of realizing large telescopic deformation mainly comprises an adsorber body, the adsorber body consists of an upper seal head, a barrel, a lower seal head and a pressed shell connected with an upper connecting pipe and a lower connecting pipe, the upper seal head and the lower seal head of the shell are each provided with an upper gas inlet and outlet pipe and a lower gas inlet and outlet pipe, a supporting seat is arranged at the bottom in the shell, an adsorption barrel is arranged above the supporting seat and consists of a plurality of concentric barrels with different diameters, a plurality of annular spaces are formed by the concentric barrels with different diameters, different types of adsorbents can be filled in the annular spaces, and the adsorption barrel is composed of a pore plate or a grid.

Abstract: A kinase inhibitor, comprising a compound of formula (I) or a pharmaceutically acceptable salt, solvate, ester, acid, metabolite or prodrug thereof. A method and a use for using the inhibitor for treatment of diseases related to CDK9 and/or mutagenic activity thereof.

Abstract: Bonding a full-bridge device and an LLC device in a stack, or forming the full-bridge device and the LLC device on a same substrate, rather than connecting the devices, reduces a chip area associated with a power converter including the full-bridge device and the LLC device. Additionally, the full-bridge device and the LLC device consume less power because parasitic inductance and capacitance are reduced. Additionally, raw materials and production time are conserved that would otherwise have been used to connect the full-bridge device and the LLC device (e.g., via wires).

Abstract: An electrical connector includes an insulating housing and a terminal module. The terminal module is fastened in the insulating housing. The terminal module includes a plurality of corrosion resistance terminals. Each corrosion resistance terminal has a fastening portion. A front end of the fastening portion extends frontward to form a contacting portion. A rear end of the fastening portion defines a soldering portion. A surface of the contacting portion of each corrosion resistance terminal sequentially has a copper electroplating layer, a nickel-tungsten electroplating layer, a gold electroplating layer, a platinum alloy electroplating layer and a rhodium-ruthenium alloy electroplating layer from an inside to an outside. A surface of the fastening portion of each corrosion resistance terminal is covered with an electro-deposition coating.

Abstract: A method for generating a user interface for analyzing a patient-specific electronic medical or health record that includes a problem list includes the steps of grouping related potential problems into problem list categories, grouping a subset of the problems into clusters within the categories, mapping, using a computer, entries in the problem list with a respective description in an interface terminology, associating one or more of other medical data, e.g., medication, lab results, procedures, imaging results, past medical history or surgeries, notes, vital signs, or allergy data in the record with at least one problem, receiving a request corresponding to a problem or problem list category or to other medical data, identifying non-problem data in the record grouped in a cluster with the requested data, and modifying a user interface to display the identified data separate from other similar medical data included in the electronic medical or health record.

Abstract: The present disclosure provides embodiments of semiconductor structures. A semiconductor structure according to the present disclosure includes a substrate, a fin-shaped structure disposed over the substrate, the fin-shaped structure including a plurality of first semiconductor layers interleaved by a plurality of second semiconductor layers, a gate structure disposed over a channel region of the fin-shaped structure, a first source/drain feature extending through at least a first portion the fin-shaped structure, a second source/drain feature extending through at least a second portion of the fin-shaped structure, and a backside metal line disposed below the substrate and spaced apart from the first source/drain feature and the second source/drain feature.