Patents by Inventor Yung-Hsiang Chen

Yung-Hsiang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11521005
    Abstract: The present invention relates to a container, a package, a production system, and a distribution system. The container comprises a first identification and a second identification. The first identification is unique for identifying the container and is not exposed. The second identification is unique for identifying the container and is accessible. The second identification is different from the first identification. The second identification is associated with the first identification. The distribution system comprises a processor and a memory. The memory includes instructions causing the processor to perform operations.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: December 6, 2022
    Assignee: TCI CO., LTD.
    Inventors: Yung-Hsiang Lin, Min Yue, Hsing-I Wang, Tsung Jung Chen
  • Patent number: 11509984
    Abstract: A microphone module, including a substrate assembly, two sensing structures, and two housings, is provided. The substrate assembly has at least one through hole and at least one circuit structure electrically connected to at least one pad. The through hole includes two holes formed on opposite sides of the substrate assembly. The sensing structures are disposed on and cover the two holes. The two sensing structures and the through hole collectively form a communicating cavity. A size of the communicating cavity in an axial direction is greater than that in a radial direction. The two housings are respectively disposed on the opposite sides of the substrate assembly and respectively shield the two sensing structures. Each of the housings, the substrate assembly, and the corresponding sensing structure form an inner cavity. The housings each has a sound hole. The inner cavity communicates with the outside through the sound hole.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: November 22, 2022
    Assignee: Merry Electronics(Shenzhen) Co., Ltd.
    Inventors: Jen-Yi Chen, Chao-Sen Chang, Kai-Yu Jiang, Yung-Hsiang Chang
  • Publication number: 20220367656
    Abstract: A method includes providing a substrate, a dummy fin, and a stack of semiconductor channel layers; forming an interfacial layer wrapping around each of the semiconductor channel layers; depositing a high-k dielectric layer, wherein a first portion of the high-k dielectric layer over the interfacial layer is spaced away from a second portion of the high-k dielectric layer on sidewalls of the dummy fin by a first distance; depositing a first dielectric layer over the dummy fin and over the semiconductor channel layers, wherein a merge-critical-dimension of the first dielectric layer is greater than the first distance thereby causing the first dielectric layer to be deposited in a space between the dummy fin and a topmost layer of the stack of semiconductor channel layers, thereby providing air gaps between adjacent layers of the stack of semiconductor channel layers and between the dummy fin and the stack of semiconductor channel layers.
    Type: Application
    Filed: July 28, 2021
    Publication date: November 17, 2022
    Inventors: Chia-Hao Pao, Chih-Chuan Yang, Shih-Hao Lin, Kian-Long Lim, Chih-Wei Lee, Chien-Yuan Chen, Jo-Chun Hung, Yung-Hsiang Chan, Yu-Kuan Lin, Lien Jung Hung
  • Publication number: 20220367604
    Abstract: A semiconductor processing system is provided to form a capacitor dielectric layer in a metal-insulator-metal capacitor. The semiconductor processing system includes a precursor tank configured to generate a precursor gas from a metal organic solid precursor, a processing chamber configured to perform a plasma enhanced chemical vapor deposition, and at least one buffer tank between the precursor tank and the processing chamber. The at least one buffer tank is coupled to the precursor tank via a first pipe and coupled to the processing chamber via a second pipe.
    Type: Application
    Filed: July 29, 2022
    Publication date: November 17, 2022
    Inventors: Wei-Liang CHEN, Yu-Lung YEH, Chihchous CHUANG, Yen-Hsiu CHEN, Tsai-Ji LIOU, Yung-Hsiang CHEN, Ching-Hung HUANG
  • Publication number: 20220369012
    Abstract: A microphone module, including a substrate assembly, two sensing structures, and two housings, is provided. The substrate assembly has at least one through hole and at least one circuit structure electrically connected to at least one pad. The through hole includes two holes formed on opposite sides of the substrate assembly. The sensing structures are disposed on and cover the two holes. The two sensing structures and the through hole collectively form a communicating cavity. A size of the communicating cavity in an axial direction is greater than that in a radial direction. The two housings are respectively disposed on the opposite sides of the substrate assembly and respectively shield the two sensing structures. Each of the housings, the substrate assembly, and the corresponding sensing structure form an inner cavity. The housings each has a sound hole. The inner cavity communicates with the outside through the sound hole.
    Type: Application
    Filed: July 31, 2022
    Publication date: November 17, 2022
    Applicant: Merry Electronics(Shenzhen) Co., Ltd.
    Inventors: Jen-Yi Chen, Chao-Sen Chang, Kai-Yu Jiang, Yung-Hsiang Chang
  • Patent number: 11502160
    Abstract: A semiconductor processing system is provided to form a capacitor dielectric layer in a metal-insulator-metal capacitor. The semiconductor processing system includes a precursor tank configured to generate a precursor gas from a metal organic solid precursor, a processing chamber configured to perform a plasma enhanced chemical vapor deposition, and at least one buffer tank between the precursor tank and the processing chamber. The at least one buffer tank is coupled to the precursor tank via a first pipe and coupled to the processing chamber via a second pipe.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: November 15, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Liang Chen, Yu-Lung Yeh, Chihchous Chuang, Yen-Hsiu Chen, Tsai-Ji Liou, Yung-Hsiang Chen, Ching-Hung Huang
  • Patent number: 11487210
    Abstract: A method includes: providing a workpiece to a semiconductor apparatus, the workpiece comprising a material layer, wherein the material layer includes a plurality of areas extending along a first axis; scanning the workpiece in a first direction along the first axis to generate first topography measurement data; scanning the workpiece in a second direction along the first axis to generate second topography measurement data; and performing an exposure operation on the material layer according to the first topography measurement data and the second topography measurement data.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: November 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yung-Yao Lee, Yeh-Chin Wang, Yang-Ann Chu, Yung-Hsiang Chen, Yung-Cheng Chen
  • Publication number: 20220336609
    Abstract: A semiconductor device includes a stack of semiconductor layers vertically arranged above a semiconductor base structure, a gate dielectric layer having portions each surrounding one of the semiconductor layers, and a gate electrode surrounding the gate dielectric layer. Each portion of the gate dielectric layer has a top section above the respective semiconductor layer and a bottom section below the semiconductor layer. The top section has a top thickness along a vertical direction perpendicular to a top surface of the semiconductor base structure; and the bottom section has a bottom thickness along the vertical direction. The top thickness is greater than the bottom thickness.
    Type: Application
    Filed: April 16, 2021
    Publication date: October 20, 2022
    Inventors: Yung-Hsiang Chan, Wen-Hung Huang, Shan-Mei Liao, Kuei-Lun Lin, Jian-Hao Chen, Kuo-Feng Yu
  • Publication number: 20220336690
    Abstract: A non-diffusion type photodiode is described and has: a substrate, a buffer layer, a light absorption layer, an intermediate layer, and a multiplication/window layer. The buffer layer is disposed on the substrate. The light absorption layer is disposed on the buffer layer. The intermediate layer is disposed on the light absorption layer and has a first boundary, wherein the intermediate layer is an I-type semiconductor layer or a graded refractive index layer. The multiplication/window layer is disposed on the intermediate layer and has a second boundary, wherein in a top view, the first boundary surrounds the second boundary, and a distance between the first boundary and the second boundary is greater than or equal to 1 micrometer. The non-diffusion type photodiode can reduce generation of dark current.
    Type: Application
    Filed: June 24, 2021
    Publication date: October 20, 2022
    Inventors: Huang-wei PAN, Hung-Wen HUANG, Yung-Chao CHEN, Yi-Hsiang WANG
  • Publication number: 20220326732
    Abstract: An electronic device is provided. The electronic device includes a first body with a base and a movable member, a second body, a lifting member, and a linkage mechanism. The movable member is located on an upper surface of the base and includes a first side and a second side. The first side is pivotally connected to the base. The second body is pivotally connected to the second side by using a first rotary shaft. The lifting member is pivotally connected to the movable member by using a second rotary shaft. The linkage mechanism is disposed on the movable member, is linked to the second body by using the first rotary shaft, and drives the lifting member to rotate by using the second rotary shaft. When the second body is opened upward, an air outlet on a rear side of the first body is prevented from being covered.
    Type: Application
    Filed: February 22, 2022
    Publication date: October 13, 2022
    Inventors: Yung-Hsiang CHEN, Li-Wei HUNG
  • Publication number: 20220328650
    Abstract: A semiconductor device includes an interface layer on a substrate, a gate dielectric layer on the interface layer, and a work function metal layer on the gate dielectric layer. An interface between the interface layer and the gate dielectric layer has a concentration of a dipole-inducing element. The semiconductor device also includes an oxygen blocking layer on the work function metal layer and a metal fill layer on the oxygen blocking layer.
    Type: Application
    Filed: November 22, 2021
    Publication date: October 13, 2022
    Inventors: An-Hung Tai, Yung-Hsiang Chan, Shan-Mei Liao, Hsin-Han Tsai, Jian-Hao Chen, Kuo-Feng Yu
  • Publication number: 20220320293
    Abstract: A method includes receiving a workpiece having a first stack of semiconductor layers in a first region and a second stack of semiconductor layers in a second region; forming a first gate dielectric layer surrounding each layer of the first stack and a second gate dielectric layer surrounding each layer of the second stack; forming a first dipole layer surrounding the first gate dielectric layer and merging between vertically adjacent portions of the first gate dielectric layer, and a second dipole layer surrounding the second gate dielectric layer and merging between vertically adjacent portions of the second gate dielectric layer; removing the first dipole layer; after the removing of the first dipole layer, conducting a first annealing on the workpiece; removing a remaining portion of the second dipole layer; and forming a gate electrode layer in the first region and the second region.
    Type: Application
    Filed: September 22, 2021
    Publication date: October 6, 2022
    Inventors: Shan-Mei Liao, Yung-Hsiang Chan, Yao-Teng Chuang, Jian-Hao Chen, Kuo-Feng Yu
  • Publication number: 20220283651
    Abstract: A stylus pen for use with a charging base is provided. The stylus pen includes a pen body, a pen tip, a battery, a first receiving end conductive structure, and a second receiving end conductive structure. The pen body includes an opening to connect to the charging base. The pen tip is connected to the pen body. The battery is disposed in the pen body. The first receiving end conductive structure and the second receiving end conductive structure are disposed in the opening, and are respectively electrically connected to the battery.
    Type: Application
    Filed: January 27, 2022
    Publication date: September 8, 2022
    Inventors: Chin Chung LAI, Yung-Hsiang CHEN
  • Publication number: 20220285954
    Abstract: The disclosure provides a charging base. The charging base is applied to electrically connect to an electronic device and charge a stylus. The charging base includes: a base, a connector, a first charging end conductive structure, and a second charging end conductive structure. The base includes a through-hole. The connector is disposed on one side of the base and is used for being electrically connected to the electronic device. The first charging end conductive structure is formed on an upper surface of the base and is electrically connected to the connector. The second charging end conductive structure is formed in the through-hole and is electrically connected to the connector.
    Type: Application
    Filed: January 27, 2022
    Publication date: September 8, 2022
    Inventors: Chin Chung LAI, Yung-Hsiang CHEN
  • Publication number: 20220262928
    Abstract: A method includes forming a dielectric layer on a semiconductor workpiece, forming a first patterned layer of a first dipole material on the dielectric layer, and performing a first thermal drive-in operation at a first temperature to form a diffusion feature in a first portion of the dielectric layer beneath the first patterned layer. The method also includes forming a second patterned layer of a second dipole material, where a first section of the second patterned layer is on the diffusion feature and a second patterned layer is offset from the diffusion feature. The method further includes performing a second thermal drive-in operation at a second temperature, where the second temperature is less than the first temperature. The method additionally includes forming a gate electrode layer on the dielectric layer.
    Type: Application
    Filed: September 1, 2021
    Publication date: August 18, 2022
    Inventors: Yung-Hsiang Chan, Shan-Mei Liao, Wen-Hung Huang, Jian-Hao Chen, Kuo-Feng Yu, Mei-Yun Wang
  • Publication number: 20220247378
    Abstract: A Lamb wave resonator includes a piezoelectric material layer, a first finger electrode, a second finger electrode, at least two floating electrodes, and at least two gaps. The first finger electrode is disposed on one side of the piezoelectric material layer and includes a first main portion and first fingers. The second finger electrode is disposed on the side of the piezoelectric material layer and includes a second main portion and second fingers. The first fingers are parallel to and alternately arranged with the second fingers. The floating electrodes are disposed between each first finger and each second finger, and the gaps are disposed at two ends of each floating electrode, respectively.
    Type: Application
    Filed: February 1, 2021
    Publication date: August 4, 2022
    Inventors: Chin-Yu Chang, Yen-Lin Chen, Chien-Hui Li, Tai-I Yang, Yung-Hsiang Chen
  • Publication number: 20220230443
    Abstract: A method for detecting objects and labeling the objects with distances in an image includes steps of: obtaining a thermal image from a thermal camera, an RGB image from an RGB camera, and radar information from an mmWave radar; adjusting the thermal image based on the RGB image to generate an adjusted thermal image, and generating a fused image based on the RGB image and the adjusted thermal image; generating a second fused image based on the fused image and the radar information; detecting objects in the images, and generating, based on the fused image, another fused image including bounding boxes marking the objects; and determining motion parameters of the objects.
    Type: Application
    Filed: December 15, 2021
    Publication date: July 21, 2022
    Inventors: KAI-LUNG HUA, YUNG-YAO CHEN, SIN-YE JHONG, YO-CHENG CHEN, BA-LIN LIN, TZYY-YZONG LIN, CHENG-SHU WEN, YEN-PO WANG, CHUN-JUNG CHEN, TUNG-HSIN YANG, WEN-HSIANG LU, CHYI-JIA HUANG
  • Publication number: 20220231173
    Abstract: A semiconductor device and a method of forming the same is disclosed. The semiconductor device includes a substrate, a first well region disposed within the substrate, a second well region disposed adjacent to the first well region and within the substrate, and an array of well regions disposed within the first well region. The first well region includes a first type of dopants, the second well region includes a second type of dopants that is different from the first type of dopants, and the array of well regions include the second type of dopants. The semiconductor device further includes a metal silicide layer disposed on the array of well regions and within the substrate, a metal silicide nitride layer disposed on the metal silicide layer and within the substrate, and a contact structure disposed on the metal silicide nitride layer.
    Type: Application
    Filed: November 18, 2021
    Publication date: July 21, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ting-Ying WU, Yung-Hsiang CHEN, Yu-Lung YEH, Yen-Hsiu CHEN, Wei-Liang CHEN, Ying-Tsang HO
  • Patent number: 11386624
    Abstract: The invention provides a new software tool for editing standard operating procedures (SOPs). Using an augmented reality (AR) device as a carrier, it integrates resources such as 3D models, voice prompts, videos, photo comparisons, prompt boxes and text descriptions. It also introduces artificial intelligence (AI) with 3D spatial position navigation mechanism and simulation operations reality. Accordingly, it makes editing of SOP easier to use and more intuitive.
    Type: Grant
    Filed: April 12, 2020
    Date of Patent: July 12, 2022
    Assignee: ADAT Technology Co., Ltd.
    Inventors: Kai-Hung Su, I-Chin Lo, Yung-Tsen Chen, Yung-Hsiang Lin
  • Patent number: D957398
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: July 12, 2022
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Hao-Siang Min, Yung-Hsiang Chen, Chin-Chung Lai