Patents by Inventor Yung-Hsiang Chen

Yung-Hsiang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11625075
    Abstract: An electronic device includes a first body, a pivot assembly and a second body. The first body includes a first side and a second side, and the second side includes a groove. The pivot assembly includes a container, a first gear, a second gear and a third gear. The container includes an accommodating space and a side wall. The first gear is disposed in the accommodating space and connected to the groove. The second gear is disposed in the accommodating space, pivotally disposed at the side wall and engaged with the first gear. The third gear is disposed in the accommodating space, pivotally disposed at the side wall and engaged with the second gear. The second body is pivotally disposed at the container and connected to the third gear.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: April 11, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chin-Chung Lai, Yung-Hsiang Chen, Shih-Wei Yang
  • Patent number: 11620005
    Abstract: A stylus pen for use with a charging base is provided. The stylus pen includes a pen body, a pen tip, a battery, a first receiving end conductive structure, and a second receiving end conductive structure. The pen body includes an opening to connect to the charging base. The pen tip is connected to the pen body. The battery is disposed in the pen body. The first receiving end conductive structure and the second receiving end conductive structure are disposed in the opening, and are respectively electrically connected to the battery.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: April 4, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chin Chung Lai, Yung-Hsiang Chen
  • Publication number: 20230085172
    Abstract: A method includes: providing a workpiece to a semiconductor apparatus, the workpiece including a material layer, wherein the material layer includes a first strip having a first plurality of exposure fields configured to be exposed in a first direction and a second plurality of exposure fields configured to be exposed in a second direction different from the first direction; scanning the first strip along a first scan route in the first direction to generate first topography measurement data; scanning the first strip along a second scan route in the second direction to generate second topography measurement data; and exposing the first plurality of exposure fields according to the first topography measurement data and exposing the second plurality of exposure fields according to the second topography measurement data.
    Type: Application
    Filed: October 31, 2022
    Publication date: March 16, 2023
    Inventors: YUNG-YAO LEE, YEH-CHIN WANG, YANG-ANN CHU, YUNG-HSIANG CHEN, YUNG-CHENG CHEN
  • Publication number: 20230063670
    Abstract: One or more semiconductor processing tools may deposit a contact etch stop layer on a substrate. In some implementations, the contact etch stop layer is comprised of less than approximately 12 percent hydrogen. Depositing the contact etch stop layer may include depositing contact etch stop layer material at a temperature of greater than approximately 600 degrees Celsius, at a pressure of greater than approximately 150 torr, and/or with a ratio of at least approximately 70:1 of NH3 and SiH4, among other examples. The one or more semiconductor processing tools may deposit a silicon-based layer above the contact etch stop layer. The one or more semiconductor processing tools may perform an etching operation into the silicon-based layer until reaching the contact etch stop layer to form a trench isolation structure.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 2, 2023
    Inventors: Cheng-Hsien CHEN, Yung-Hsiang CHEN, J.H. LEE, Yu-Lung YEH, Yen-Hsiu CHEN
  • Publication number: 20230067539
    Abstract: A method is provided that includes forming a first metal layer of a seal structure over a micro-electromechanical system (MEMS) structure and over a channel formed through the MEMS structure to an integrated circuit of a semiconductor structure. The first metal layer is formed at a first temperature. The method includes forming a second metal layer over the first metal layer. The second metal layer is formed at a second temperature less than the first temperature. The method includes performing a first cooling process to cool the semiconductor structure.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Kai-Lan CHANG, Yu-Lung Yeh, Yen-Hsiu Chen, Shuo Yen Tai, Yung-Hsiang Chen
  • Publication number: 20230063905
    Abstract: A metal-insulator-metal (MIM) device may include a first metal layer. The MIM device may include an insulator stack on the first metal layer. The insulator stack may include a first high dielectric constant (high-K) layer on the first metal layer. The insulator stack may include a low dielectric constant (low-K) layer on the first high-K layer. The insulator stack may include a second high-K layer on the low-K layer. The MIM device may include a second metal layer on the insulator stack.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 2, 2023
    Inventors: Yung-Hsiang CHEN, Yu-Lung YEH, Yen-Hsiu CHEN, Chihchous CHUANG, Ching-Hung HUANG, Wei-Liang CHEN
  • Publication number: 20230049278
    Abstract: A computer device and a host module thereof are provided. The host module includes a case, a motherboard, and a power supply unit. The case includes a first side plate, a second side plate, a front panel, a rear panel, and a separation structure. The rear panel is located on an opposite side of the front panel. The first side plate, the second side plate, the front panel, and the rear panel enclose an internal space. The separation structure is located in the internal space, extends from the first side plate to the second side plate, and divides the internal space into a first part and a second part. The second part is located under the first part. The motherboard is disposed in the first part. The power supply unit is disposed in the second part, and is electrically connected to the motherboard.
    Type: Application
    Filed: March 7, 2022
    Publication date: February 16, 2023
    Inventors: Yung-Hsiang CHEN, Marco DA ROS, Li-Wei HUNG, Li-Hsiang CHIU
  • Publication number: 20230050313
    Abstract: The disclosure provides a computer device. The computer device includes a base, a host case, and a display support. The base includes an upper surface and includes a power module therein. The host case is detachably fixed to the base and electrically connected to the power module through the upper surface. One end of the display support is connected to the base, and the other end thereof includes a display connection structure.
    Type: Application
    Filed: May 9, 2022
    Publication date: February 16, 2023
    Inventors: Yung-Hsiang CHEN, Li-Hsiang CHIU, Marco DA ROS, Li-Wei HUNG
  • Publication number: 20220367604
    Abstract: A semiconductor processing system is provided to form a capacitor dielectric layer in a metal-insulator-metal capacitor. The semiconductor processing system includes a precursor tank configured to generate a precursor gas from a metal organic solid precursor, a processing chamber configured to perform a plasma enhanced chemical vapor deposition, and at least one buffer tank between the precursor tank and the processing chamber. The at least one buffer tank is coupled to the precursor tank via a first pipe and coupled to the processing chamber via a second pipe.
    Type: Application
    Filed: July 29, 2022
    Publication date: November 17, 2022
    Inventors: Wei-Liang CHEN, Yu-Lung YEH, Chihchous CHUANG, Yen-Hsiu CHEN, Tsai-Ji LIOU, Yung-Hsiang CHEN, Ching-Hung HUANG
  • Patent number: 11502160
    Abstract: A semiconductor processing system is provided to form a capacitor dielectric layer in a metal-insulator-metal capacitor. The semiconductor processing system includes a precursor tank configured to generate a precursor gas from a metal organic solid precursor, a processing chamber configured to perform a plasma enhanced chemical vapor deposition, and at least one buffer tank between the precursor tank and the processing chamber. The at least one buffer tank is coupled to the precursor tank via a first pipe and coupled to the processing chamber via a second pipe.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: November 15, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Liang Chen, Yu-Lung Yeh, Chihchous Chuang, Yen-Hsiu Chen, Tsai-Ji Liou, Yung-Hsiang Chen, Ching-Hung Huang
  • Patent number: 11487210
    Abstract: A method includes: providing a workpiece to a semiconductor apparatus, the workpiece comprising a material layer, wherein the material layer includes a plurality of areas extending along a first axis; scanning the workpiece in a first direction along the first axis to generate first topography measurement data; scanning the workpiece in a second direction along the first axis to generate second topography measurement data; and performing an exposure operation on the material layer according to the first topography measurement data and the second topography measurement data.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: November 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yung-Yao Lee, Yeh-Chin Wang, Yang-Ann Chu, Yung-Hsiang Chen, Yung-Cheng Chen
  • Publication number: 20220326732
    Abstract: An electronic device is provided. The electronic device includes a first body with a base and a movable member, a second body, a lifting member, and a linkage mechanism. The movable member is located on an upper surface of the base and includes a first side and a second side. The first side is pivotally connected to the base. The second body is pivotally connected to the second side by using a first rotary shaft. The lifting member is pivotally connected to the movable member by using a second rotary shaft. The linkage mechanism is disposed on the movable member, is linked to the second body by using the first rotary shaft, and drives the lifting member to rotate by using the second rotary shaft. When the second body is opened upward, an air outlet on a rear side of the first body is prevented from being covered.
    Type: Application
    Filed: February 22, 2022
    Publication date: October 13, 2022
    Inventors: Yung-Hsiang CHEN, Li-Wei HUNG
  • Publication number: 20220283651
    Abstract: A stylus pen for use with a charging base is provided. The stylus pen includes a pen body, a pen tip, a battery, a first receiving end conductive structure, and a second receiving end conductive structure. The pen body includes an opening to connect to the charging base. The pen tip is connected to the pen body. The battery is disposed in the pen body. The first receiving end conductive structure and the second receiving end conductive structure are disposed in the opening, and are respectively electrically connected to the battery.
    Type: Application
    Filed: January 27, 2022
    Publication date: September 8, 2022
    Inventors: Chin Chung LAI, Yung-Hsiang CHEN
  • Publication number: 20220285954
    Abstract: The disclosure provides a charging base. The charging base is applied to electrically connect to an electronic device and charge a stylus. The charging base includes: a base, a connector, a first charging end conductive structure, and a second charging end conductive structure. The base includes a through-hole. The connector is disposed on one side of the base and is used for being electrically connected to the electronic device. The first charging end conductive structure is formed on an upper surface of the base and is electrically connected to the connector. The second charging end conductive structure is formed in the through-hole and is electrically connected to the connector.
    Type: Application
    Filed: January 27, 2022
    Publication date: September 8, 2022
    Inventors: Chin Chung LAI, Yung-Hsiang CHEN
  • Publication number: 20220247378
    Abstract: A Lamb wave resonator includes a piezoelectric material layer, a first finger electrode, a second finger electrode, at least two floating electrodes, and at least two gaps. The first finger electrode is disposed on one side of the piezoelectric material layer and includes a first main portion and first fingers. The second finger electrode is disposed on the side of the piezoelectric material layer and includes a second main portion and second fingers. The first fingers are parallel to and alternately arranged with the second fingers. The floating electrodes are disposed between each first finger and each second finger, and the gaps are disposed at two ends of each floating electrode, respectively.
    Type: Application
    Filed: February 1, 2021
    Publication date: August 4, 2022
    Inventors: Chin-Yu Chang, Yen-Lin Chen, Chien-Hui Li, Tai-I Yang, Yung-Hsiang Chen
  • Publication number: 20220231173
    Abstract: A semiconductor device and a method of forming the same is disclosed. The semiconductor device includes a substrate, a first well region disposed within the substrate, a second well region disposed adjacent to the first well region and within the substrate, and an array of well regions disposed within the first well region. The first well region includes a first type of dopants, the second well region includes a second type of dopants that is different from the first type of dopants, and the array of well regions include the second type of dopants. The semiconductor device further includes a metal silicide layer disposed on the array of well regions and within the substrate, a metal silicide nitride layer disposed on the metal silicide layer and within the substrate, and a contact structure disposed on the metal silicide nitride layer.
    Type: Application
    Filed: November 18, 2021
    Publication date: July 21, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ting-Ying WU, Yung-Hsiang CHEN, Yu-Lung YEH, Yen-Hsiu CHEN, Wei-Liang CHEN, Ying-Tsang HO
  • Publication number: 20220196586
    Abstract: A capacitive biosensor is provided. The capacitive biosensor includes: a transistor, an interconnect structure on the transistor, and a passivation layer on the interconnect structure. The interconnect structure includes a first metal structure on the transistor, a second metal structure on the first metal structure, and a third metal structure on the second metal structure. The third metal structure includes a first conductive layer, a second conductive layer, and a third conductive layer that are sequentially stacked. The passivation has an opening exposing a portion of the third metal structure. The capacitive biosensor further includes a sensing region on the interconnect structure. The sensing region includes a first sensing electrode and a second sensing electrode. The first sensing electrode is formed of the third conductive layer, and the second sensing electrode is disposed on the passivation layer.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Cheng-Ping CHANG, Chien-Hui LI, Chien-Hsun WU, Tai-I YANG, Yung-Hsiang CHEN
  • Patent number: 11366182
    Abstract: A magnetoresistive device includes a magnetoresistor disposed over a substrate, a stress release structure covering a side surface of the magnetoresistor, an electrical connection structure disposed over the magnetoresistor, and a passivation layer disposed over the electrical connection structure and the stress release structure.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: June 21, 2022
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chien-Hsun Wu, Cheng-Ping Chang, Chien-Hui Li, Tai-I Yang, Yung-Hsiang Chen
  • Patent number: 11362264
    Abstract: An electrical contact structure and a method for forming the electrical contact structure are provided. The method includes forming a thin film material layer on a substrate, forming a first barrier layer on the thin film material layer and forming a metal layer on the first barrier layer. The method further includes patterning the metal layer to form a metal pattern, forming a spacer on a sidewall of the metal pattern and covering a portion of the first barrier layer. The method further includes etching the first barrier layer, wherein the portion of the first barrier layer located under the spacer is not completely etched. The method further includes removing the spacer and exposing the sidewall of the metal pattern to form an electrical contact structure on the thin film material layer, wherein the first barrier layer has a protrusion part exceeding the sidewall of the metal pattern.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: June 14, 2022
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chien-Hui Li, Chien-Hsun Wu, Yung-Hsiang Chen
  • Patent number: D957398
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: July 12, 2022
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Hao-Siang Min, Yung-Hsiang Chen, Chin-Chung Lai