Patents by Inventor Yung-Hsiang Chen

Yung-Hsiang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9116854
    Abstract: An image correlation for images having speckle pattern is evaluated. Modulation transfer function (MTF) curves of speckle-pattern images captured at different times are figured out. Whether a correlation value between the MTF curves meets a threshold is checked. If the correlation value is smaller than the threshold, speckle-pattern images are re-selected for re-figuring out the MTF curves and the correlation value. Thus, error of strain and displacement for digital image correlation owing to blurring images of the on-moving target object is figured out; calculation time of the digital image correlation is reduced; and accuracy on measuring physical parameters of the target object before and after movement is improved for digital image correlation.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: August 25, 2015
    Assignee: National Applied Research Laboratories
    Inventors: Chi-Hung Huang, Wei-Chung Wang, Yung-Hsiang Chen, Tzi-Hung Chung, Tai-Shan Liao
  • Patent number: 9104374
    Abstract: An electronic device including a first body, an input module and a functional element is provided. The input module is movably disposed on the first body and adapted to be moved between a first position and a second position. The functional element is disposed on the input module. When the input module is located at the first position, the functional element is concealed in the first body. When the input module is located at the second position, the functional element is exposed outside the first body.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: August 11, 2015
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Hui-Jou Tsai, Yung-Hsiang Chen, Wen-Yi Chiu, Kuan-Yu Chou, Chuan-Hao Wen, Chun-Huang Yu, Chao-Tung Hsu, Chih-Yin Lai, Chia-Sheng Liu, Hsiang-Ling Liu
  • Patent number: 9107301
    Abstract: A foldable electronic device includes a first body, a second body and a hinge body. The hinge body is pivoted to the first body around a first pivoting axis and pivoted to the second body around a second pivoting axis so that the first body is able to rotate relatively to the second body. When the first body rotates to a first position relatively to the second body, a first front surface of the first body is closed to a second front surface of the second body on a closing plane, and a pivoting plane where the first pivoting axis and the second pivoting axis are located on and the closing plane are oblique to each other.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: August 11, 2015
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Hung-Sung Pan, Chung-Hao Kuo, Jui-Wen Chou, Hung-Jui Lin, Tzu-Chien Lai, Hsin Yeh, Long-Cheng Chang, Chuang-Yueh Chen, Po-Chin Yu, Chuan-Hao Wen, Yung-Hsiang Chen, Ting-Wei Wu, Hui-Lian Chang, Ming-Wang Lin, Jui-Yuan Lee
  • Patent number: 9092194
    Abstract: An electronic device includes a base, a rotating element and a sliding element. The rotating element is pivoted to the base. The sliding element is slidably disposed on the base. When the rotating element is rotated relative to the base and an included angle between the two is greater than a specific angle, the sliding element slides from a first position to a second position relative to the base.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: July 28, 2015
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Hsiao-Ling Chan, Yung-Hsiang Chen, Hsin Lu, Wei-Chih Hsu, Chien-I Lin, Kun-Yen Liu
  • Publication number: 20150204097
    Abstract: A lever viscoelastic damping wall assembly includes a first wall, a second wall and a viscoelastic damper. The first and second walls are connected respectively to a first structural member and a second structural member. The viscoelastic damper includes a swing rod connected pivotally to the first and second walls, a first viscoelastic unit connected between the first wall and an end portion of the swing rod, and a second viscoelastic unit connected between the second wall and an opposite end portion of the swing rod. The swing rod is driven to pivot relative to the first and second walls, and to thereby generate shear deformations of the first and second viscoelastic units to damp a relative movement between the first and second structural members.
    Type: Application
    Filed: July 17, 2014
    Publication date: July 23, 2015
    Inventors: Chung-Che Chou, Steven Tsuang, Yung-Hsiang Chen, Luh-Maan Chang
  • Patent number: 9081293
    Abstract: A method of exposing a wafer substrate includes receiving an integrated circuit (IC) design layout defining a pattern; determining a temperature profile of a mask based on the IC design layout, the pattern being formed on the mask; calculating a pre-corrected overlay shift for the mask based on the calculated temperature profile; and exposing a resist layer coated on a substrate using the mask with overlay compensation based on the pre-corrected overlay shift.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: July 14, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dong-Hsu Cheng, Chun-Jen Chen, Ming-Ho Tsai, Jim Liang, Yung-Hsiang Chen, Jun-Hua Chen
  • Patent number: 9036157
    Abstract: A system of computing surface reconstruction, in-plane and out-of-plane displacements and strain distribution utilizes the optical switching element to switch the reference beam to analyze the images of the test object before and after deformation, to measure the topography, in-plane and out-of-plane displacements and surface two-dimensional strain distribution on the test surface of the test object, and thus to increase the measurement range on the test surface of the test object with the use of image registration. Thereby, the complexity and error of scanning the test object can be reduced. Such a system need not to move the image capturing device or test object to generate relative displacement for reaching the measurement effect of the test surface of the test object in three-dimensional coordinates.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: May 19, 2015
    Assignee: National Applied Research Laboratories
    Inventors: Ming-Hsing Shen, Chi-Hung Huang, Wei-Chung Wang, Yung-Hsiang Chen
  • Patent number: 9025324
    Abstract: An electronic device includes first and second bodies. The second body includes a display module and a supporting assembly. The supporting assembly includes a sliding component slidably disposed on the display module and a pivot component pivoted to the first body and the sliding component. When the second body expands from the first body through the rotation of the pivot component relative to the first body, the sliding component and the pivot component are adapted to rotate relative to each other so that a bottom side of the display module moves to a predetermined position on the first body. When the bottom side is located at the predetermined position, the sliding component and the display module are adapted to slide relative to each other so that the display module rotate around the bottom side, so as to change an included angle between the display module and the first body.
    Type: Grant
    Filed: May 7, 2013
    Date of Patent: May 5, 2015
    Assignee: Compal Electronics, Inc.
    Inventors: Pei-Pin Huang, Li-Fang Chen, Yung-Hsiang Chen
  • Publication number: 20150093043
    Abstract: An image correlation for images having speckle pattern is evaluated. Modulation transfer function (MTF) curves of speckle-pattern images captured at different times are figured out. Whether a correlation value between the MTF curves meets a threshold is checked. If the correlation value is smaller than the threshold, speckle-pattern images are re-selected for re-figuring out the MTF curves and the correlation value. Thus, error of strain and displacement for digital image correlation owing to blurring images of the on-moving target object is figured out; calculation time of the digital image correlation is reduced; and accuracy on measuring physical parameters of the target object before and after movement is improved for digital image correlation.
    Type: Application
    Filed: October 2, 2013
    Publication date: April 2, 2015
    Applicant: National Applied Research Laboratories
    Inventors: CHI-HUNG HUANG, WEI-CHUNG WANG, YUNG-HSIANG CHEN, TZI-HUNG CHUNG, TAI-SHAN LIAO
  • Publication number: 20140355190
    Abstract: An electronic device including a first body and a second body is provided. The first body has a first connection end. The second body has a second connection end, in which the second connection end has a first magnetic component and a first convex arc surface, and the second body is detachably connected to the first body through a magnetic attractive force between the first magnetic component and the first connection end. The first body and the second body are configured to rotate around a rotation axis relatively to each other, and the first convex arc surface faces the first connection end and extends along a direction parallel to the rotation axis.
    Type: Application
    Filed: November 14, 2013
    Publication date: December 4, 2014
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Hsin Yeh, Yung-Hsiang Chen, Wei-Han Hu, Tzu-Chien Lai, Cho-Yao Yen
  • Publication number: 20140272717
    Abstract: A method of exposing a wafer substrate includes receiving an integrated circuit (IC) design layout defining a pattern; determining a temperature profile of a mask based on the IC design layout, the pattern being formed on the mask; calculating a pre-corrected overlay shift for the mask based on the calculated temperature profile; and exposing a resist layer coated on a substrate using the mask with overlay compensation based on the pre-corrected overlay shift.
    Type: Application
    Filed: October 17, 2013
    Publication date: September 18, 2014
    Inventors: Dong-Hsu Cheng, Chun-Jen Chen, Ming-Ho Tsai, Jim Liang, Yung-Hsiang Chen, Jun-Hua Chen
  • Publication number: 20140256067
    Abstract: The present disclosure provides an integrated circuit structure that includes a semiconductor substrate having a first region and a second region having an area less than about 10 micron×10 micron; a first material layer over the semiconductor substrate and patterned to have a first circuit feature in the first region and a first mark in the second region; and a second material layer over the first material layer and patterned to have a second circuit feature in the first region and a second mark in the second region. The first mark includes first mark features oriented in a first direction, and second mark features oriented in a second direction perpendicular to the first direction. The second mark includes third mark features oriented in the first direction, and fourth mark features oriented in the second direction.
    Type: Application
    Filed: May 23, 2014
    Publication date: September 11, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Dong-Hsu Cheng, Ming-Ho Tsai, Chih-Chung Huang, Yung- Hsiang Chen, Jyun-Hong Chen
  • Patent number: 8815645
    Abstract: A multi-chip stacking method to reduce voids between stacked chips is revealed. A first chip is disposed on a substrate, and a plurality of first bonding wires are formed by wire bonding to electrically connect the first chip and the substrate. A second chip is disposed on an active surface of the first chip where a FOW (film over wire) adhesive is formed on a back surface of the second chip. The FOW adhesive partially encapsulates the first bonding wires and adheres to the active surface of the first chip. Then, the substrate is placed in a pressure oven to provide a positive pressure greater than one atm during thermally curing the FOW adhesive with exerted pressures. Accordingly, voids can be reduced inside the FOW adhesive during the multi-chip stacked processes where issues of poor adhesion and popcorn between chips can be avoided.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: August 26, 2014
    Assignee: Walton Advanced Engineering, Inc.
    Inventors: Kuo-Yuan Lee, Yung-Hsiang Chen, Wen-Chun Chiu
  • Patent number: 8803943
    Abstract: The present disclosure uses at least three cameras to monitor even a large-scale area. Displacement and strain are measured in a fast, convenient and effective way. The present disclosure has advantages on whole field, far distance and convenience.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: August 12, 2014
    Assignee: National Applied Research Laboratories
    Inventors: Chi-Hung Huang, Yung-Hsiang Chen, Wei-Chung Wang, Tai-Shan Liao
  • Publication number: 20140187233
    Abstract: A watch type mobile terminal capable of being worn on a user's wrist is provided. The watch type mobile terminal includes a case, a circuit board, a first connector, a band, a receiver and a first flexible printed circuit (FPC) board. The circuit board is disposed in the case. The first connector is disposed on the circuit board. The band is connected to the case, whereby the watch type mobile terminal is capable of being worn on the user's wrist, and the band has a first end and a second end opposite to the first end. The receiver is disposed at the first end. The first FPC board is disposed in the band and connected between the first connector and the receiver.
    Type: Application
    Filed: December 27, 2012
    Publication date: July 3, 2014
    Applicant: COMPAL COMMUNICATIONS, INC.
    Inventors: Yung-Hsiang Chen, Chang-Hua Wei, Wei-Chih Hsu, Shi-Kuan Chen, Chuan-Hao Wen, Ming-Yu Tseng, Po-Yi Wu, Yi-Chen Lin, Yi-Chu Hsu, Chih-Hsiang Fang, Pang-Ruei Huang, Lien-Chih Tsai, Yen-Hui Li, Yung-Ching Tien
  • Patent number: 8736084
    Abstract: The present disclosure provides an integrated circuit structure that includes a semiconductor substrate having a first region and a second region having an area less than about 10 micron×10 micron; a first material layer over the semiconductor substrate and patterned to have a first circuit feature in the first region and a first mark in the second region; and a second material layer over the first material layer and patterned to have a second circuit feature in the first region and a second mark in the second region. The first mark includes first mark features oriented in a first direction, and second mark features oriented in a second direction perpendicular to the first direction. The second mark includes third mark features oriented in the first direction, and fourth mark features oriented in the second direction.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: May 27, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dong-Hsu Cheng, Ming-Ho Tsai, Chih-Chung Huang, Yung-Hsiang Chen, Jyun-Hong Chen
  • Publication number: 20140111810
    Abstract: A system of computing surface reconstruction, in-plane and out-of-plane displacements and strain distribution utilizes the optical switching element to switch the reference beam to analyze the images of the test object before and after deformation, to measure the topography, in-plane and out-of-plane displacements and surface two-dimensional strain distribution on the test surface of the test object, and thus to increase the measurement range on the test surface of the test object with the use of image registration. Thereby, the complexity and error of scanning the test object can be reduced. Such a system need not to move the image capturing device or test object to generate relative displacement for reaching the measurement effect of the test surface of the test object in three-dimensional coordinates.
    Type: Application
    Filed: October 19, 2012
    Publication date: April 24, 2014
    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: MING-HSING SHEN, CHI-HUNG HUANG, WEI-CHUNG WANG, YUNG-HSIANG CHEN
  • Patent number: D705774
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: May 27, 2014
    Assignee: Compal Electronics, Inc.
    Inventors: Guo Shiung Hung, I-Wen Chen, Pei-pin Huang, Ting-Wei Wu, Tzu-Chien Lai, Li Fang Chen, Yung-hsiang Chen, Hong-Tien Wang
  • Patent number: D714256
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: September 30, 2014
    Assignee: Compal Electronics, Inc.
    Inventors: Hui-Jou Tsai, Yung-Hsiang Chen, Wen-Yi Chiu, Kuan-Yu Chou, Hsing-Yi Kao, Hsiang-Ling Liu
  • Patent number: D735187
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: July 28, 2015
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Wei-Chih Hsu, Li Fang Chen, Yung-Hsiang Chen, Chien I Lin, I Chen Chen, Yao Tsung Yeh