Patents by Inventor Yung-Hui Yeh
Yung-Hui Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955338Abstract: A method includes providing a substrate having a surface such that a first hard mask layer is formed over the surface and a second hard mask layer is formed over the first hard mask layer, forming a first pattern in the second hard mask layer, where the first pattern includes a first mandrel oriented lengthwise in a first direction and a second mandrel oriented lengthwise in a second direction different from the first direction, and where the first mandrel has a top surface, a first sidewall, and a second sidewall opposite to the first sidewall, and depositing a material towards the first mandrel and the second mandrel such that a layer of the material is formed on the top surface and the first sidewall but not the second sidewall of the first mandrel.Type: GrantFiled: January 30, 2023Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Chun Huang, Ya-Wen Yeh, Chien-Wen Lai, Wei-Liang Lin, Ya Hui Chang, Yung-Sung Yen, Ru-Gun Liu, Chin-Hsiang Lin, Yu-Tien Shen
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Patent number: 10964912Abstract: Provided is a protective structure including an auxiliary layer and a hard coating layer. The auxiliary layer has a first surface and a second surface opposite to the first surface. The hard coating layer is located on the second surface of the auxiliary layer. The Young's modulus of the auxiliary layer is gradually increased from the second surface to the first surface. An electronic device with the same is also provided.Type: GrantFiled: April 10, 2019Date of Patent: March 30, 2021Assignees: Industrial Technology Research Institute, Intellectual Property Innovation CorporationInventors: Yung-Hui Yeh, Jui-Chang Chuang, Li-Ching Wang, Cheng-Yueh Chang, Chyi-Ming Leu, Shih-Ming Chen
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Patent number: 10644167Abstract: A thin film transistor including a flexible substrate, a semiconductor layer, a first gate, and a first gate dielectric layer is provided. The semiconductor layer is located on the flexible substrate. The first gate is located on the flexible substrate and corresponds to a portion of the semiconductor layer. The first gate dielectric layer is located between the first gate and the semiconductor layer. The first gate dielectric layer is in contact with the semiconductor layer, and the hydrogen atom concentration of the first gate dielectric layer is less than 6.5×1020 atoms/cm3. A method of manufacturing the thin film transistor is also provided.Type: GrantFiled: March 6, 2018Date of Patent: May 5, 2020Assignees: Industrial Technology Research Institute, Intellectual Property Innovation CorporationInventors: Tai-Jui Wang, Yung-Hui Yeh, Jui-Wen Yang, Hsiao-Chiang Yao, Chun-Hung Chu
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Publication number: 20200052243Abstract: Provided is a protective structure including an auxiliary layer and a hard coating layer. The auxiliary layer has a first surface and a second surface opposite to the first surface. The hard coating layer is located on the second surface of the auxiliary layer. The Young's modulus of the auxiliary layer is gradually increased from the second surface to the first surface. An electronic device with the same is also provided.Type: ApplicationFiled: April 10, 2019Publication date: February 13, 2020Applicants: Industrial Technology Research Institute, Intellectual Property Innovation CorporationInventors: Yung-Hui Yeh, Jui-Chang Chuang, Li-Ching Wang, Cheng-Yueh Chang, Chyi-Ming Leu, Shih-Ming Chen
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Publication number: 20190140106Abstract: A thin film transistor including a flexible substrate, a semiconductor layer, a first gate, and a first gate dielectric layer is provided. The semiconductor layer is located on the flexible substrate. The first gate is located on the flexible substrate and corresponds to a portion of the semiconductor layer. The first gate dielectric layer is located between the first gate and the semiconductor layer. The first gate dielectric layer is in contact with the semiconductor layer, and the hydrogen atom concentration of the first gate dielectric layer is less than 6.5×1020 atoms/cm3. A method of manufacturing the thin film transistor is also provided.Type: ApplicationFiled: March 6, 2018Publication date: May 9, 2019Applicants: Industrial Technology Research Institute, Intellectual Property Innovation CorporationInventors: Tai-Jui Wang, Yung-Hui Yeh, Jui-Wen Yang, Hsiao-Chiang Yao, Chun-Hung Chu
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Patent number: 10168733Abstract: A foldable body is adapted to be connected between two neighboring ones of a plurality of supporting units, such that the two neighboring supporting units are moved relative to each other to flatten or bend a flexible display panel mounted on a supporting surface of each of the supporting units. The foldable body includes a main track and a main shaft. The main track is fixedly connected to one of the two neighboring supporting units. The main shaft is fixedly connected to the other of the two neighboring supporting units and is coupled to the main track to be translated and rotated in the main track. The two neighboring supporting units are connected by the foldable body, such that the supporting units are moved, such as being translated, rotated, or both, relative to each other, to bend at least a portion of the flexible display panel.Type: GrantFiled: April 15, 2016Date of Patent: January 1, 2019Assignee: Industrial Technology Research InstituteInventors: Chien-Ju Lee, Yung-Hui Yeh
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Patent number: 10165688Abstract: A flexible electronic device including a first flexible substrate, an electronic component, and a control device is provided. The electronic component includes a conductive layer. The control device includes at least one integrated circuit and a circuit layer set. The circuit layer set includes a plurality of circuit layers and at least one first dielectric layer, and at least a portion of the first dielectric layer is interposed between two adjacent circuit layers. The integrated circuit is electrically connected to the electronic component through the circuit layer set and the conductive layer. At least a portion of the conductive layer and at least a portion of one circuit layer are integrally formed, and the conductive layer and the circuit layer are both disposed on the first flexible substrate. A fabricating method of a flexible electronic device is also provided.Type: GrantFiled: April 25, 2016Date of Patent: December 25, 2018Assignee: Industrial Technology Research InstituteInventors: Sheng-Po Wang, Heng-Yin Chen, Cheng-Chung Lee, Jia-Chong Ho, Yung-Hui Yeh, Tai-Jui Wang
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Publication number: 20170118853Abstract: A foldable body is adapted to be connected between two neighboring ones of a plurality of supporting units, such that the two neighboring supporting units are moved relative to each other to flatten or bend a flexible display panel mounted on a supporting surface of each of the supporting units. The foldable body includes a main track and a main shaft. The main track is fixedly connected to one of the two neighboring supporting units. The main shaft is fixedly connected to the other of the two neighboring supporting units and is coupled to the main track to be translated and rotated in the main track. The two neighboring supporting units are connected by the foldable body, such that the supporting units are moved, such as being translated, rotated, or both, relative to each other, to bend at least a portion of the flexible display panel.Type: ApplicationFiled: April 15, 2016Publication date: April 27, 2017Inventors: Chien-Ju Lee, Yung-Hui Yeh
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Publication number: 20170020002Abstract: A flexible electronic device including a first flexible substrate, an electronic component, and a control device is provided. The electronic component includes a conductive layer. The control device includes at least one integrated circuit and a circuit layer set. The circuit layer set includes a plurality of circuit layers and at least one first dielectric layer, and at least a portion of the first dielectric layer is interposed between two adjacent circuit layers. The integrated circuit is electrically connected to the electronic component through the circuit layer set and the conductive layer. At least a portion of the conductive layer and at least a portion of one circuit layer are integrally formed, and the conductive layer and the circuit layer are both disposed on the first flexible substrate. A fabricating method of a flexible electronic device is also provided.Type: ApplicationFiled: April 25, 2016Publication date: January 19, 2017Inventors: Sheng-Po Wang, Heng-Yin Chen, Cheng-Chung Lee, Jia-Chong Ho, Yung-Hui Yeh, Tai-Jui Wang
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Patent number: 9543954Abstract: A driver circuit with device variation compensation function and an operation method thereof are provided. The driver circuit includes a pull-up switch unit, an isolating switch and a pull-down switch unit. A first terminal of the pull-up switch unit is coupled to a first voltage. A second terminal of the pull-up switch unit is coupled to an output terminal of the driver circuit. A first terminal of the isolating switch is coupled to the second terminal of the pull-up switch unit. A first terminal of the pull-down switch unit is coupled to a second terminal of the isolating switch. A second terminal of the pull-down switch unit is coupled to a second voltage. The pull-down switch unit has a device variation compensation function.Type: GrantFiled: January 9, 2015Date of Patent: January 10, 2017Assignee: Industrial Technology Research InstituteInventors: Chi-Liang Wu, Ya-Hsiang Tai, Yung-Hui Yeh, Zong-Hua Cai
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Patent number: 9408300Abstract: According to embodiments of the disclosure, a flexible device and a fabrication method thereof are provided. The flexible device has a first area and a second area, and the stiffness of a portion of the first area is greater than the stiffness of the second area. The flexible device may include a flexible substrate and a rigid element. The flexible substrate includes a first surface and a second surface opposite to each other. The second surface has a coarse structure. The surface roughness of the second surface is greater in the first area than in the second area. The rigid element is disposed on the first surface of the flexible substrate and located in the first area. The stiffness of the rigid element is greater than the stiffness of the flexible substrate. A projection area of the coarse structure on the flexible substrate overlaps an area of the rigid element.Type: GrantFiled: February 12, 2015Date of Patent: August 2, 2016Assignee: Industrial Technology Research InstituteInventors: Cheng-Che Wu, Chen-Chu Tsai, Chien-Jung Huang, Yung-Hui Yeh, Heng-Yin Chen
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Publication number: 20160174358Abstract: According to embodiments of the disclosure, a flexible device and a fabrication method thereof are provided. The flexible device has a first area and a second area, and the stiffness of a portion of the first area is greater than the stiffness of the second area. The flexible device may include a flexible substrate and a rigid element. The flexible substrate includes a first surface and a second surface opposite to each other. The second surface has a coarse structure. The surface roughness of the second surface is greater in the first area than in the second area. The rigid element is disposed on the first surface of the flexible substrate and located in the first area. The stiffness of the rigid element is greater than the stiffness of the flexible substrate. A projection area of the coarse structure on the flexible substrate overlaps an area of the rigid element.Type: ApplicationFiled: February 12, 2015Publication date: June 16, 2016Inventors: Cheng-Che Wu, Chen-Chu Tsai, Chien-Jung Huang, Yung-Hui Yeh, Heng-Yin Chen
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Publication number: 20160112046Abstract: A driver circuit with device variation compensation function and an operation method thereof are provided. The driver circuit includes a pull-up switch unit, an isolating switch and a pull-down switch unit. A first terminal of the pull-up switch unit is coupled to a first voltage. A second terminal of the pull-up switch unit is coupled to an output terminal of the driver circuit. A first terminal of the isolating switch is coupled to the second terminal of the pull-up switch unit. A first terminal of the pull-down switch unit is coupled to a second terminal of the isolating switch. A second terminal of the pull-down switch unit is coupled to a second voltage. The pull-down switch unit has a device variation compensation function.Type: ApplicationFiled: January 9, 2015Publication date: April 21, 2016Inventors: Chi-Liang Wu, Ya-Hsiang Tai, Yung-Hui Yeh, Zong-Hua Cai
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Publication number: 20140312343Abstract: A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.Type: ApplicationFiled: May 26, 2014Publication date: October 23, 2014Applicant: Industrial Technology Research InstituteInventors: Yung-Hui Yeh, Chih-Ming Lai
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Patent number: 8759186Abstract: A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.Type: GrantFiled: January 20, 2012Date of Patent: June 24, 2014Assignee: Industrial Technology Research InstituteInventors: Yung-Hui Yeh, Chih-Ming Lai
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Patent number: 8723278Abstract: A sensor element array and method of fabricating the same are provided. The sensor element array is disposed on a substrate and includes a first patterned conductive layer, a channel layer, a first insulation layer, a second patterned conductive layer, a second insulation layer, and a third patterned conductive layer. The first patterned conductive layer includes a sensing line, a first power line, a source/drain pattern and a branch pattern. The channel layer includes a first channel and a second channel. Margins of the first insulation layer and the second patterned conductive layer are substantially overlapped. The second patterned conductive layer includes a selecting line, a gate pattern, and a gate connecting pattern. The second insulation layer has a first connecting opening for exposing the gate connecting pattern. The third patterned conductive layer includes a sensing electrode electrically connected to the gate connecting pattern.Type: GrantFiled: March 4, 2012Date of Patent: May 13, 2014Assignee: Industrial Technology Research InstituteInventors: Chih-Ming Lai, Yung-Hui Yeh
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Publication number: 20140110715Abstract: A thin film transistor (TFT) array display panel and a manufacturing method thereof are provided. The TFT array panel may comprise a substrate, a pixel array and an absorption layer. The substrate has an upper surface. The pixel array may be formed on the upper surface of the substrate and comprises several data lines, several scan lines and several active elements. The data lines and the scan lines define several pixel areas. Each active element is formed in the corresponding pixel area, and may comprise a channel layer. The absorption layer and the channel layer may be formed on the same layer structure.Type: ApplicationFiled: March 29, 2013Publication date: April 24, 2014Applicant: Industrial Technology Research InstituteInventors: Chih-Ming LAI, Yung-Hui YEH
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Publication number: 20130161703Abstract: A sensor element array and method of fabricating the same are provided. The sensor element array is disposed on a substrate and includes a first patterned conductive layer, a channel layer, a first insulation layer, a second patterned conductive layer, a second insulation layer, and a third patterned conductive layer. The first patterned conductive layer includes a sensing line, a first power line, a source/drain pattern and a branch pattern. The channel layer includes a first channel and a second channel. Margins of the first insulation layer and the second patterned conductive layer are substantially overlapped. The second patterned conductive layer includes a selecting line, a gate pattern, and a gate connecting pattern. The second insulation layer has a first connecting opening for exposing the gate connecting pattern. The third patterned conductive layer includes a sensing electrode electrically connected to the gate connecting pattern.Type: ApplicationFiled: March 4, 2012Publication date: June 27, 2013Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chih-Ming Lai, Yung-Hui Yeh
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Publication number: 20130126859Abstract: A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.Type: ApplicationFiled: January 20, 2012Publication date: May 23, 2013Applicant: Industrial Technology Research InstituteInventors: Yung-Hui Yeh, Chih-Ming Lai
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Publication number: 20130059118Abstract: A flexible substrate structure including a flexible metal carrier, a surface-modified layer and a flexible plastic substrate is provided. The flexible metal carrier includes a first region and a second region. The surface-modified layer is located on and contacts with the first region of the flexible metal carrier. The flexible plastic substrate is located over the first region and the second region. The flexible plastic substrate over the first region contacts with the surface-modified layer. The flexible plastic substrate over the second region contacts with the flexible metal carrier.Type: ApplicationFiled: November 29, 2011Publication date: March 7, 2013Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yung-Hui Yeh, Chun-Cheng Cheng, Chyi-Ming Leu, Yung-Lung Tseng