Patents by Inventor Yung-Hui Yeh

Yung-Hui Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10354874
    Abstract: A method of fabricating a semiconductor device includes forming a hard mask layer over a substrate. A multi-layer resist is formed over the hard mask layer. The multi-layer resist is etched to form a plurality of openings in the multi-layer resist to expose a portion of the hard mask layer. Ion are directionally provided at an angle to the multi-layer resist to predominately contact sidewalls of the plurality of openings in the multi-layer resist rather than the hard mask layer. In one embodiment, the multi-layer resist is directionally etched by directing etch ions at an angle to predominately contact sidewalls of the plurality of openings in the multi-layer resist rather than the hard mask layer. In another embodiment, the multi-layer resist is directionally implanted by directing implant ions at an angle to predominately contact sidewalls of the plurality of openings in the multi-layer resist rather than the hard mask layer.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: July 16, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Chun Huang, Chin-Hsiang Lin, Chien-Wen Lai, Ru-Gun Liu, Wei-Liang Lin, Ya Hui Chang, Yung-Sung Yen, Yu-Tien Shen, Ya-Wen Yeh
  • Publication number: 20190157084
    Abstract: A method of depositing a material on one of two, but not both, sidewalls of a raised structure formed on a substrate includes tilting a normal of the substrate away from a source of the deposition material or tilting the source of the deposition material away from the normal of the substrate. The method may be implemented by a plasma-enhanced chemical vapor deposition (PECVD) technique.
    Type: Application
    Filed: August 21, 2018
    Publication date: May 23, 2019
    Inventors: Shih-Chun Huang, Ya-Wen Yeh, Chien Wen Lai, Wei-Liang Lin, Ya Hui Chang, Yung-Sung Yen, Ru-Gun Liu, Chin-Hsiang Lin, Yu-Tien Shen
  • Publication number: 20190148145
    Abstract: A method of fabricating a semiconductor device includes forming a hard mask layer over a substrate. A multi-layer resist is formed over the hard mask layer. The multi-layer resist is etched to form a plurality of openings in the multi-layer resist to expose a portion of the hard mask layer. Ion are directionally provided at an angle to the multi-layer resist to predominately contact sidewalls of the plurality of openings in the multi-layer resist rather than the hard mask layer. In one embodiment, the multi-layer resist is directionally etched by directing etch ions at an angle to predominately contact sidewalls of the plurality of openings in the multi-layer resist rather than the hard mask layer. In another embodiment, the multi-layer resist is directionally implanted by directing implant ions at an angle to predominately contact sidewalls of the plurality of openings in the multi-layer resist rather than the hard mask layer.
    Type: Application
    Filed: November 14, 2017
    Publication date: May 16, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chun Huang, Chin-Hsiang Lin, Lai Chien Wen, Ru-Gun Liu, Wei-Liang Lin, Ya Hui Chang, Yung-Sung Yen, Yu-Tien Shen, Ya-Wen Yeh
  • Publication number: 20190148147
    Abstract: A method of manufacturing a semiconductor device including operations of forming a first hard mask over an underlying layer on a substrate by a photolithographic and etching method, forming a sidewall spacer pattern having a first sidewall portion and a second sidewall portion on opposing sides of the first hard mask, etching the first sidewall portion, etching the first hard mask and leaving the second sidewall portion bridging a gap of the etched first hard mask, and processing the underlying layer using the second hard mask.
    Type: Application
    Filed: November 1, 2018
    Publication date: May 16, 2019
    Inventors: Shih-Chun Huang, Chiu-Hsiang Chen, Ya-Wen Yeh, Yu-Tien Shen, Po-Chin Chang, Chien Wen Lai, Wei-Liang Lin, Ya Hui Chang, Yung-Sung Yen, Li-Te Lin, Pinyen Lin, Ru-Gun Liu, Chin-Hsiang Lin
  • Publication number: 20190140106
    Abstract: A thin film transistor including a flexible substrate, a semiconductor layer, a first gate, and a first gate dielectric layer is provided. The semiconductor layer is located on the flexible substrate. The first gate is located on the flexible substrate and corresponds to a portion of the semiconductor layer. The first gate dielectric layer is located between the first gate and the semiconductor layer. The first gate dielectric layer is in contact with the semiconductor layer, and the hydrogen atom concentration of the first gate dielectric layer is less than 6.5×1020 atoms/cm3. A method of manufacturing the thin film transistor is also provided.
    Type: Application
    Filed: March 6, 2018
    Publication date: May 9, 2019
    Applicants: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Tai-Jui Wang, Yung-Hui Yeh, Jui-Wen Yang, Hsiao-Chiang Yao, Chun-Hung Chu
  • Patent number: 10168733
    Abstract: A foldable body is adapted to be connected between two neighboring ones of a plurality of supporting units, such that the two neighboring supporting units are moved relative to each other to flatten or bend a flexible display panel mounted on a supporting surface of each of the supporting units. The foldable body includes a main track and a main shaft. The main track is fixedly connected to one of the two neighboring supporting units. The main shaft is fixedly connected to the other of the two neighboring supporting units and is coupled to the main track to be translated and rotated in the main track. The two neighboring supporting units are connected by the foldable body, such that the supporting units are moved, such as being translated, rotated, or both, relative to each other, to bend at least a portion of the flexible display panel.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: January 1, 2019
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Ju Lee, Yung-Hui Yeh
  • Patent number: 10165688
    Abstract: A flexible electronic device including a first flexible substrate, an electronic component, and a control device is provided. The electronic component includes a conductive layer. The control device includes at least one integrated circuit and a circuit layer set. The circuit layer set includes a plurality of circuit layers and at least one first dielectric layer, and at least a portion of the first dielectric layer is interposed between two adjacent circuit layers. The integrated circuit is electrically connected to the electronic component through the circuit layer set and the conductive layer. At least a portion of the conductive layer and at least a portion of one circuit layer are integrally formed, and the conductive layer and the circuit layer are both disposed on the first flexible substrate. A fabricating method of a flexible electronic device is also provided.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: December 25, 2018
    Assignee: Industrial Technology Research Institute
    Inventors: Sheng-Po Wang, Heng-Yin Chen, Cheng-Chung Lee, Jia-Chong Ho, Yung-Hui Yeh, Tai-Jui Wang
  • Publication number: 20170118853
    Abstract: A foldable body is adapted to be connected between two neighboring ones of a plurality of supporting units, such that the two neighboring supporting units are moved relative to each other to flatten or bend a flexible display panel mounted on a supporting surface of each of the supporting units. The foldable body includes a main track and a main shaft. The main track is fixedly connected to one of the two neighboring supporting units. The main shaft is fixedly connected to the other of the two neighboring supporting units and is coupled to the main track to be translated and rotated in the main track. The two neighboring supporting units are connected by the foldable body, such that the supporting units are moved, such as being translated, rotated, or both, relative to each other, to bend at least a portion of the flexible display panel.
    Type: Application
    Filed: April 15, 2016
    Publication date: April 27, 2017
    Inventors: Chien-Ju Lee, Yung-Hui Yeh
  • Publication number: 20170020002
    Abstract: A flexible electronic device including a first flexible substrate, an electronic component, and a control device is provided. The electronic component includes a conductive layer. The control device includes at least one integrated circuit and a circuit layer set. The circuit layer set includes a plurality of circuit layers and at least one first dielectric layer, and at least a portion of the first dielectric layer is interposed between two adjacent circuit layers. The integrated circuit is electrically connected to the electronic component through the circuit layer set and the conductive layer. At least a portion of the conductive layer and at least a portion of one circuit layer are integrally formed, and the conductive layer and the circuit layer are both disposed on the first flexible substrate. A fabricating method of a flexible electronic device is also provided.
    Type: Application
    Filed: April 25, 2016
    Publication date: January 19, 2017
    Inventors: Sheng-Po Wang, Heng-Yin Chen, Cheng-Chung Lee, Jia-Chong Ho, Yung-Hui Yeh, Tai-Jui Wang
  • Patent number: 9543954
    Abstract: A driver circuit with device variation compensation function and an operation method thereof are provided. The driver circuit includes a pull-up switch unit, an isolating switch and a pull-down switch unit. A first terminal of the pull-up switch unit is coupled to a first voltage. A second terminal of the pull-up switch unit is coupled to an output terminal of the driver circuit. A first terminal of the isolating switch is coupled to the second terminal of the pull-up switch unit. A first terminal of the pull-down switch unit is coupled to a second terminal of the isolating switch. A second terminal of the pull-down switch unit is coupled to a second voltage. The pull-down switch unit has a device variation compensation function.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: January 10, 2017
    Assignee: Industrial Technology Research Institute
    Inventors: Chi-Liang Wu, Ya-Hsiang Tai, Yung-Hui Yeh, Zong-Hua Cai
  • Patent number: 9408300
    Abstract: According to embodiments of the disclosure, a flexible device and a fabrication method thereof are provided. The flexible device has a first area and a second area, and the stiffness of a portion of the first area is greater than the stiffness of the second area. The flexible device may include a flexible substrate and a rigid element. The flexible substrate includes a first surface and a second surface opposite to each other. The second surface has a coarse structure. The surface roughness of the second surface is greater in the first area than in the second area. The rigid element is disposed on the first surface of the flexible substrate and located in the first area. The stiffness of the rigid element is greater than the stiffness of the flexible substrate. A projection area of the coarse structure on the flexible substrate overlaps an area of the rigid element.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: August 2, 2016
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng-Che Wu, Chen-Chu Tsai, Chien-Jung Huang, Yung-Hui Yeh, Heng-Yin Chen
  • Publication number: 20160174358
    Abstract: According to embodiments of the disclosure, a flexible device and a fabrication method thereof are provided. The flexible device has a first area and a second area, and the stiffness of a portion of the first area is greater than the stiffness of the second area. The flexible device may include a flexible substrate and a rigid element. The flexible substrate includes a first surface and a second surface opposite to each other. The second surface has a coarse structure. The surface roughness of the second surface is greater in the first area than in the second area. The rigid element is disposed on the first surface of the flexible substrate and located in the first area. The stiffness of the rigid element is greater than the stiffness of the flexible substrate. A projection area of the coarse structure on the flexible substrate overlaps an area of the rigid element.
    Type: Application
    Filed: February 12, 2015
    Publication date: June 16, 2016
    Inventors: Cheng-Che Wu, Chen-Chu Tsai, Chien-Jung Huang, Yung-Hui Yeh, Heng-Yin Chen
  • Publication number: 20160112046
    Abstract: A driver circuit with device variation compensation function and an operation method thereof are provided. The driver circuit includes a pull-up switch unit, an isolating switch and a pull-down switch unit. A first terminal of the pull-up switch unit is coupled to a first voltage. A second terminal of the pull-up switch unit is coupled to an output terminal of the driver circuit. A first terminal of the isolating switch is coupled to the second terminal of the pull-up switch unit. A first terminal of the pull-down switch unit is coupled to a second terminal of the isolating switch. A second terminal of the pull-down switch unit is coupled to a second voltage. The pull-down switch unit has a device variation compensation function.
    Type: Application
    Filed: January 9, 2015
    Publication date: April 21, 2016
    Inventors: Chi-Liang Wu, Ya-Hsiang Tai, Yung-Hui Yeh, Zong-Hua Cai
  • Publication number: 20140312343
    Abstract: A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.
    Type: Application
    Filed: May 26, 2014
    Publication date: October 23, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Yung-Hui Yeh, Chih-Ming Lai
  • Patent number: 8759186
    Abstract: A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: June 24, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Yung-Hui Yeh, Chih-Ming Lai
  • Patent number: 8723278
    Abstract: A sensor element array and method of fabricating the same are provided. The sensor element array is disposed on a substrate and includes a first patterned conductive layer, a channel layer, a first insulation layer, a second patterned conductive layer, a second insulation layer, and a third patterned conductive layer. The first patterned conductive layer includes a sensing line, a first power line, a source/drain pattern and a branch pattern. The channel layer includes a first channel and a second channel. Margins of the first insulation layer and the second patterned conductive layer are substantially overlapped. The second patterned conductive layer includes a selecting line, a gate pattern, and a gate connecting pattern. The second insulation layer has a first connecting opening for exposing the gate connecting pattern. The third patterned conductive layer includes a sensing electrode electrically connected to the gate connecting pattern.
    Type: Grant
    Filed: March 4, 2012
    Date of Patent: May 13, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Ming Lai, Yung-Hui Yeh
  • Publication number: 20140110715
    Abstract: A thin film transistor (TFT) array display panel and a manufacturing method thereof are provided. The TFT array panel may comprise a substrate, a pixel array and an absorption layer. The substrate has an upper surface. The pixel array may be formed on the upper surface of the substrate and comprises several data lines, several scan lines and several active elements. The data lines and the scan lines define several pixel areas. Each active element is formed in the corresponding pixel area, and may comprise a channel layer. The absorption layer and the channel layer may be formed on the same layer structure.
    Type: Application
    Filed: March 29, 2013
    Publication date: April 24, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Chih-Ming LAI, Yung-Hui YEH
  • Publication number: 20130161703
    Abstract: A sensor element array and method of fabricating the same are provided. The sensor element array is disposed on a substrate and includes a first patterned conductive layer, a channel layer, a first insulation layer, a second patterned conductive layer, a second insulation layer, and a third patterned conductive layer. The first patterned conductive layer includes a sensing line, a first power line, a source/drain pattern and a branch pattern. The channel layer includes a first channel and a second channel. Margins of the first insulation layer and the second patterned conductive layer are substantially overlapped. The second patterned conductive layer includes a selecting line, a gate pattern, and a gate connecting pattern. The second insulation layer has a first connecting opening for exposing the gate connecting pattern. The third patterned conductive layer includes a sensing electrode electrically connected to the gate connecting pattern.
    Type: Application
    Filed: March 4, 2012
    Publication date: June 27, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Ming Lai, Yung-Hui Yeh
  • Publication number: 20130126859
    Abstract: A method for manufacturing a semiconductor device includes forming a metal oxide semiconductor layer and a first insulating layer on a substrate. A gate is formed on the first insulating layer. The first insulating layer is patterned by using the gate as an etching mask so as to expose the metal oxide semiconductor layer to serve as a source region and a drain region. A dielectric layer is formed on the substrate to cover the gate and the oxide semiconductor layer, where the dielectric layer has at least one of hydrogen group and hydroxyl group. A heating treatment is performed so that the at least one of hydrogen group and hydroxyl group reacts with the source region and the drain region. A source electrode and a drain electrode electrically connected to the source region and the drain region respectively are formed on the dielectric layer.
    Type: Application
    Filed: January 20, 2012
    Publication date: May 23, 2013
    Applicant: Industrial Technology Research Institute
    Inventors: Yung-Hui Yeh, Chih-Ming Lai
  • Publication number: 20130059081
    Abstract: A method of fabricating a flexible substrate structure is provided. A flexible metal carrier including at least one first region and at least one second region is provided. A surface-modified layer is formed on the first region of the flexible metal carrier. A flexible plastic substrate is formed over the first region and the second region of the flexible metal carrier. The flexible plastic substrate over the first region contacts with the surface-modified layer. The flexible plastic substrate over the second region contacts with the flexible metal carrier.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 7, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yung-Hui Yeh, Chun-Cheng Cheng, Chyi-Ming Leu, Yung-Lung Tseng