Patents by Inventor Yunsang Kim
Yunsang Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7316761Abstract: Apparatus for plasma etching a layer of material upon a substrate comprising an anode having a first region protruding from a second region, wherein the second region defines a plane and the first region extends from said plane. In one embodiment, at least one solenoid is disposed near the apparatus to magnetize the plasma.Type: GrantFiled: February 3, 2003Date of Patent: January 8, 2008Assignee: Applied Materials, Inc.Inventors: Kenny L. Doan, Yunsang Kim, Mahmoud Dahimene, Jingbao Liu, Bryan Pu, Hongqing Shan, Don Curry
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Patent number: 7256134Abstract: The present invention includes a process for selectively etching a low-k dielectric material formed on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a fluorine-rich fluorocarbon or hydrofluorocarbon gas, a nitrogen-containing gas, and one or more additive gases, such as a hydrogen-rich hydrofluorocarbon gas, an inert gas and/or a carbon-oxygen gas. The process provides a low-k dielectric to a photoresist mask etching selectivity ratio greater than about 5:1, a low-k dielectric to a barrier/liner layer etching selectivity ratio greater about 10:1, and a low-k dielectric etch rate higher than about 4000 ?/min.Type: GrantFiled: August 1, 2003Date of Patent: August 14, 2007Assignee: Applied Materials, Inc.Inventors: Yunsang Kim, Neungho Shin, Heeyeop Chae, Joey Chiu, Yan Ye, Fang Tian, Xiaoye Zhao
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Patent number: 7227244Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.Type: GrantFiled: August 24, 2004Date of Patent: June 5, 2007Assignee: Applied Materials, Inc.Inventors: Claes H. Bjorkman, Melissa Min Yu, Hongquing Shan, David W. Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Gazala Chapra, Gerald Yin, Farhad K. Moghadam, Judy H. Huang, Dennis Yost, Betty Tang, Yunsang Kim
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Publication number: 20070068623Abstract: A plasma processing system including a plasma chamber for processing a substrate is disclosed. The apparatus includes a chuck configured for supporting a first surface of the substrate. The apparatus also includes a plasma resistant barrier disposed in a spaced-apart relationship with respect to a second surface of the substrate, the second surface being opposite the first surface, the plasma resistant barrier substantially shielding a center portion of the substrate and leaving an annular periphery area of the second surface of the substrate substantially unshielded by the plasma resistant barrier. The apparatus further includes at least one powered electrode, the powered electrode operating cooperatively with the plasma resistant barrier to generate confined plasma from a plasma gas, the confined plasma being substantially confined to the annular periphery portion of the substrate and away from the center portion of the substrate.Type: ApplicationFiled: September 27, 2005Publication date: March 29, 2007Inventors: Yunsang Kim, Andrew Bailey, Hyungsuk Yoon
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Publication number: 20070068900Abstract: Improved mechanisms of removal of etch byproducts, dielectric films and metal films near the substrate bevel edge, and etch byproducts on substrate backside and chamber interior is provided to avoid the accumulation of polymer byproduct and deposited films and to improve process yield. An exemplary plasma etch processing chamber configured to clean a bevel edge of a substrate is provided. The chamber includes a bottom edge electrode surrounding a substrate support in the plasma processing chamber, wherein the substrate support is configured to receive the substrate and the bottom edge electrode and the substrate support are electrically isolated from each other by a bottom dielectric ring.Type: ApplicationFiled: May 24, 2006Publication date: March 29, 2007Applicant: Lam Research CorporationInventors: Yunsang Kim, Andrew Bailey
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Publication number: 20070048447Abstract: A method for forming copper on a substrate including inputting a copper source solution into a mixer, inputting a reducing solution into the mixer, mixing copper source solution and the reducing solution to form a plating solution having a pH of greater than about 6.5 and applying the plating solution to a substrate, the substrate including a catalytic layer wherein applying the plating solution to the substrate includes forming a catalytic layer, maintaining the catalytic layer in a controlled environment and forming copper on the catalytic layer. A system for forming copper structures is also disclosed.Type: ApplicationFiled: July 31, 2006Publication date: March 1, 2007Inventors: Alan Lee, Andrew Bailey, William Thie, Yunsang Kim, Yezdi Dordi
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Patent number: 7140374Abstract: A method for cleaning a processing chamber that includes heating an inner surface of the processing chamber to a first temperature. The first temperature can be sufficient to cause a first species to become volatile. The first species can be one of several species deposited on the inner surface. A cleaning chemistry is injected into the processing chamber. The cleaning chemistry can be reactive with a second one of the species to convert the second species to the first species. The volatilized first species can also be output from the processing chamber. A system for cleaning the process chamber is also described.Type: GrantFiled: March 16, 2004Date of Patent: November 28, 2006Assignee: Lam Research CorporationInventors: Andrew D. Bailey, III, Shrikant P. Lohokare, Arthur M. Howald, Yunsang Kim
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Patent number: 7132369Abstract: A method of fabricating an interconnect structure comprising etching a via into an upper low K dielectric layer and into a hardened portion of a lower low K dielectric layer. The via is defined by a pattern formed in a photoresist layer. The photoresist layer is then stripped, and a trench that circumscribes the via as defined by a hard mask is etched into the upper low K dielectric layer and, simultaneously, the via that was etched into the hardened portion of the lower low K dielectric layer is further etched into the lower low K dielectric layer. The result is a low K dielectric dual damascene structure.Type: GrantFiled: December 22, 2003Date of Patent: November 7, 2006Assignee: Applied Materials, Inc.Inventors: Gerardo A. Delgadino, Yan Ye, Neungho Shin, Yunsang Kim, Li-Qun Xia, Tzu-Fang Huang, Lihua Li, Joey Chiu, Xiaoye Zhao, Fang Tian, Wen Zhu, Ellie Yieh
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Patent number: 7129167Abstract: A method of cleaning a substrate includes receiving a substrate and applying a stress-free cleaning process to the top surface of the substrate. The substrate includes a top surface that is substantially free of device dependent planarity nonuniformities and device independent planarity nonuniformities. The top surface also includes a first material and a device structure formed in the first material, the device structure being formed from a second material. The device structure has a device surface exposed. The device surface has a first surface roughness. A system for stress-free cleaning a substrate is also described.Type: GrantFiled: June 28, 2004Date of Patent: October 31, 2006Assignee: LAM Research CorporationInventors: Andrew D. Bailey, III, Shrikant P. Lohokare, Yunsang Kim, Simon McClatchie
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Publication number: 20060219267Abstract: A method for cleaning a processing chamber that includes heating an inner surface of the processing chamber to a first temperature. The first temperature can be sufficient to cause a first species to become volatile. The first species can be one of several species deposited on the inner surface. A cleaning chemistry is injected into the processing chamber. The cleaning chemistry can be reactive with a second one of the species to convert the second species to the first species. The volatilized first species can also be output from the processing chamber. A system for cleaning the process chamber is also described.Type: ApplicationFiled: May 31, 2006Publication date: October 5, 2006Applicant: LAM RESEARCH CORPORATIONInventors: Andrew Bailey, Shrikant Lohokare, Arthur Howald, Yunsang Kim
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Publication number: 20060128152Abstract: A method of etching a conductive layer includes converting at least a portion of the conductive layer and etching the conductive layer to substantially remove the converted portion of the conductive layer and thereby expose a remaining surface. The remaining surface has an average surface roughness of less than about 10 nm. A system for etching a conductive layer is also disclosed.Type: ApplicationFiled: March 9, 2005Publication date: June 15, 2006Applicant: LAM RESEARCH CORPORATIONInventors: Yunsang Kim, Andrew Bailey, Hyungsuk Yoon, Arthur Howald
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Publication number: 20060054279Abstract: An apparatus for cleaning a substrate in a reactive ion etch process is disclosed. The apparatus is configured to produce an atmospheric plasma using a RF generation device. The apparatus includes a plasma forming chamber including a cavity defined by a set of interior chamber walls comprised of a dielectric material. The apparatus also includes an atmospheric plasma generated by the RF generation device, the atmospheric plasma protruding from a first end of the cavity to clean the substrate.Type: ApplicationFiled: September 10, 2004Publication date: March 16, 2006Inventors: Yunsang Kim, Andras Kuthi
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Publication number: 20050093012Abstract: A method for cleaning a processing chamber that includes heating an inner surface of the processing chamber to a first temperature. The first temperature can be sufficient to cause a first species to become volatile. The first species can be one of several species deposited on the inner surface. A cleaning chemistry is injected into the processing chamber. The cleaning chemistry can be reactive with a second one of the species to convert the second species to the first species. The volatilized first species can also be output from the processing chamber. A system for cleaning the process chamber is also described.Type: ApplicationFiled: March 16, 2004Publication date: May 5, 2005Applicant: LAM RESEARCH CORPORATIONInventors: Andrew Bailey, Shrikant Lohokare, Arthur Howald, Yunsang Kim
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Patent number: 6858153Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.Type: GrantFiled: November 5, 2001Date of Patent: February 22, 2005Assignee: Applied Materials Inc.Inventors: Claes H. Bjorkman, Min Melissa Yu, Hongquing Shan, David W. Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Gazala Chapra, Gerald Yin, Farhad K. Moghadam, Judy H. Huang, Dennis Yost, Betty Tang, Yunsang Kim
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Publication number: 20050023694Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.Type: ApplicationFiled: August 24, 2004Publication date: February 3, 2005Inventors: Claes Bjorkman, Melissa Yu, Hongqing Shan, David Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Chapra, Gerald Yin, Farhad Moghadam, Judy Huang, Dennis Yost, Betty Tang, Yunsang Kim
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Publication number: 20050026430Abstract: The present invention includes a process for selectively etching a low-k dielectric material formed on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a fluorine-rich fluorocarbon or hydrofluorocarbon gas, a nitrogen-containing gas, and one or more additive gases, such as a hydrogen-rich hydrofluorocarbon gas, an inert gas and/or a carbon-oxygen gas. The process provides a low-k dielectric to a photoresist mask etching selectivity ratio greater than about 5:1, a low-k dielectric to a barrier/liner layer etching selectivity ratio greater about 10:1, and a low-k dielectric etch rate higher than about 4000 ?/min.Type: ApplicationFiled: August 1, 2003Publication date: February 3, 2005Inventors: Yunsang Kim, Neungho Shin, Heeyeop Chae, Joey Chiu, Yan Ye, Fang Tian, Xiaoye Zhao
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Publication number: 20040157453Abstract: A method of fabricating an interconnect structure comprising etching a via into an upper low K dielectric layer and into a hardened portion of a lower low K dielectric layer. The via is defined by a pattern formed in a photoresist layer. The photoresist layer is then stripped, and a trench that circumscribes the via as defined by a hard mask is etched into the upper low K dielectric layer and, simultaneously, the via that was etched into the hardened portion of the lower low K dielectric layer is further etched into the lower low K dielectric layer. The result is a low K dielectric dual damascene structure.Type: ApplicationFiled: December 22, 2003Publication date: August 12, 2004Applicant: APPLIED MATERIALS, INC.Inventors: Gerardo A. Delgadino, Yan Ye, Neungho Shin, Yunsang Kim, Li-Qun Xia, Tzu-Fang Huang, Lihua Li Huang, Joey Chiu, Xiaoye Zhao, Fang Tian, Wen Zhu, Ellie Yieh
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Publication number: 20040149394Abstract: Apparatus for plasma etching a layer of material upon a substrate comprising an anode having a first region protruding from a second region, wherein the second region defines a plane and the first region extends from said plane. In one embodiment, at least one solenoid is disposed near the apparatus to magnetize the plasma.Type: ApplicationFiled: February 3, 2003Publication date: August 5, 2004Applicant: Applied Materials, Inc.Inventors: Kenny L. Doan, Yunsang Kim, Mahmoud Dahimene, Jingbao Liu, Bryan Y. Pu, Hongqing Shan
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Patent number: 6686293Abstract: Disclosed herein is a method of etching a trench in a silicon-containing dielectric material, in the absence of a trench etch-stop layer, where the silicon-containing dielectric material has a dielectric constant of about 4 or less. The method comprises exposing the dielectric material to a plasma generated from a source gas comprising a fluorine-containing etchant gas and an additive gas selected from the group consisting of carbon monoxide (CO), argon, and combinations thereof. A volumetric flow ratio of the additive gas to the fluorine-containing etchant gas is within the range of about 1.25:1 to about 20:1 (more typically, about 2.5:1 to about 20:1), depending on the particular fluorine-containing etchant gas used. The method provides good control over critical dimensions and etch profile during trench etching. Also disclosed herein is a method of forming a dual damascene structure, without the need for an intermediate etch stop layer.Type: GrantFiled: May 10, 2002Date of Patent: February 3, 2004Assignee: Applied Materials, IncInventors: Yunsang Kim, Kenny L. Doan, Claes H. Björkman, Hongqing Shan
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Patent number: 6669858Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.Type: GrantFiled: November 5, 2001Date of Patent: December 30, 2003Assignee: Applied Materials Inc.Inventors: Claes H. Bjorkman, Min Melissa Yu, Hongquing Shan, David W. Cheung, Wai-Fan Yau, Kuowei Liu, Nasreen Gazala Chapra, Gerald Yin, Farhad K. Moghadam, Judy H. Huang, Dennis Yost, Betty Tang, Yunsang Kim