Abstract: Structures including a calibration marker adjacent to a photonic structure and methods of forming such structures. The structure comprises a semiconductor substrate, a photonic structure, and a back-end-of-line stack over the semiconductor substrate. The back-end-of-line stack includes a plurality of fill features, an exclusion area surrounded by the plurality of fill features, and a calibration marker in the exclusion area. The calibration marker is disposed adjacent to the photonic structure, and the calibration marker includes a feature having a predetermined dimension.

Abstract: Structures including an optical component and methods of fabricating a structure including an optical component. The structure includes an optical component having a waveguide core, and multiple features positioned adjacent to the waveguide core. The waveguide core contains a first material having a first thermal conductivity, and the features contain a second material having a second thermal conductivity that is greater than the first thermal conductivity.

Abstract: Structures for a photonics chip that include a fully-depleted silicon-on-insulator field-effect transistor and related methods. A first device region of a substrate includes a first device layer, a first portion of a second device layer, and a buried insulator layer separating the first device layer from the first portion of the second device layer. A second device region of the substrate includes a second portion of the second device layer. The first device layer, which has a thickness in a range of about 4 to about 20 nanometers, transitions in elevation to the second portion of the second device layer with a step height equal to a sum of the thicknesses of the first device layer and the buried insulator layer. A field-effect transistor includes a gate electrode on the top surface of the first device layer. An optical component includes the second portion of the second device layer.

Abstract: Structures including a grating coupler and a layer that exhibits an electric-field-induced Pockels effect and methods of forming such structures. The structure comprises a first grating coupler on a substrate, a second grating coupler having an overlapping relationship with the first grating coupler, and a layer including a portion having an overlapping relationship with the second grating coupler. The layer comprises a material that exhibits an electric-field-induced Pockels effect.

Abstract: Photonics chip structures including an edge coupler and a layer that exhibits an electric-field-induced Pockels effect and methods of forming such structures. The structure comprises a substrate, an edge coupler on the substrate, and a layer including a portion that has an overlapping relationship with the edge coupler. The layer comprises a material that exhibits an electric-field-induced Pockels effect.

Abstract: A photonic integrated circuit (PIC) die are provided. The PIC die includes a set of optical connect grooves including a first groove aligning a core of a first optical fiber positioned with a first optical component in a first layer at a first vertical depth in a plurality of layers of a body of the die, and a second groove aligning a core of a second optical fiber positioned therein with a second optical component in a second, different layer at a second different vertical depth in the plurality of layers. The grooves may also have end faces at different lateral depths from an edge of the body of the PIC die. Any number of the first and second grooves can be used to communicate an optical signal to any number of layers at different vertical and/or lateral depths within the body of the PIC die.

Abstract: Structures for a photonics chip that include a reflector and methods of forming such structures. The structure comprises a reflector including a dielectric layer on a semiconductor substrate, a plurality of trenches in the dielectric layer, and a reflector layer. Each trench includes a plurality of sidewalls, and the reflector layer includes a portion on the sidewalls of each trench. The structure further comprises a photonic component over the reflector.

Abstract: Systems and methods for designing photonic integrated circuits (PICs) include a simulation program with virtual optical probing functions and, optionally, bidirectional optical signal propagation simulation. For probing, a processor receives an output expression specifying a virtual optical probing function (e.g., for power in dBm, etc.) and a net within a PIC design. If different simulation types are enabled, the expression specifies simulation type. If bidirectionality is enabled, the expression specifies the forward or reverse direction. In response, the processor accesses the PIC design and results of simulation(s) thereof and calculates and outputs an optical signal parameter value for the specified net.

Abstract: Structures for a thermo-optic phase shifter and methods of forming a thermo-optic phase shifter. The structure comprises an interconnect structure including a dielectric layer, a waveguide core on the dielectric layer, and a heater on the dielectric layer. The heater includes a resistive heating element positioned adjacent to the waveguide core.

Abstract: Structures for a thermo-optic phase shifter and methods of forming a thermo-optic phase shifter. The structure comprises a semiconductor substrate, and a heater including a first resistive heating element, a second resistive heating element, and a slab layer connecting the first resistive heating element to the second resistive heating element. The first resistive heating element and the second resistive heating element have a first thickness, and the slab layer has a second thickness that is less than the first thickness. The structure further comprises a waveguide core including a portion that is laterally positioned between the first resistive heating element and the second resistive heating element. The slab layer of the heater is disposed between the portion of the waveguide core and the semiconductor substrate.

Abstract: Structures including a photodetector and methods of forming a structure including a photodetector. The structure comprises a photodetector including a pad and a semiconductor layer positioned on the pad. The semiconductor layer has a sidewall, the pad comprises a semiconductor material, and the pad includes a top surface and a side edge. The structure further comprises a waveguide core including a tapered section adjacent to the side edge of the pad, and a confining feature in the pad adjacent to the sidewall of the semiconductor layer. The confining feature extends below the top surface of the pad, and the confining feature comprises a dielectric material.

Abstract: A photonic integrated circuit (PIC) includes a waveguide in or over a semiconductor substrate. The waveguide has a terminal end. The PIC also includes an optical absorber having a curved shape adjacent to opposing sides and an endwall of the terminal end of the waveguide, i.e., it surrounds the terminal end of the waveguide. The optical absorber is multi-layered and includes a light absorbing layer. The light absorbing layer may include germanium or a vanadate. The optical absorber terminates or attenuates any stray optical signals from the waveguide while maintaining low back reflection.

Abstract: Structures for an edge coupler and methods of fabricating such structures. The structure comprises a substrate and a back-end-of-line edge coupler including a waveguide core and a grating positioned in a vertical direction between the substrate and the waveguide core. The first waveguide core includes a first longitudinal axis, the grating includes a second longitudinal axis and a plurality of segments positioned with a spaced-apart arrangement along the second longitudinal axis, and the second longitudinal axis is aligned substantially parallel to the first longitudinal axis.

Abstract: Structures including a photodetector and methods of forming a structure including a photodetector. The structure comprises a photodetector including a pad and a semiconductor layer on the pad, a first waveguide core including a tapered section adjacent to a sidewall of the semiconductor layer, and a second waveguide core including a curved section adjacent to the sidewall of the semiconductor layer. The curved section includes a plurality of segments, and the tapered section of the first waveguide core is overlapped by at least one of the plurality of segments in the curved section of the second waveguide core.

Abstract: Structures including an edge coupler and methods of forming such structures. The structure comprises an edge coupler including a first portion and a second portion between the first portion and a semiconductor substrate, a first coupling-assistance feature adjacent to the first portion of the edge coupler, and a second coupling-assistance feature adjacent to the first portion of the edge coupler. The first portion of the edge coupler is positioned in a lateral direction between the first coupling-assistance feature and the second coupling-assistance feature.

Abstract: Structures for a waveguide core and methods of fabricating such structures. The structure comprises a waveguide core including a section having a first trapezoidal portion and a second trapezoidal portion stacked with the first trapezoidal portion. The first trapezoidal portion has a first trapezoidal shape, and the second trapezoidal portion has a second trapezoidal shape different from the first trapezoidal shape.

Abstract: Disclosed is a photonic integrated circuit (PIC) structure including a first waveguide core with a first end portion, a second waveguide core with a second end portion overlaying and physically separated from the first end portion, and a coupler configured to facilitate low-loss optical signal transmission between the waveguide cores. The coupler can include at least one array of photonic material elements (e.g., photonic crystal elements or photonic metamaterial elements) embedded in cladding material between the end portions. Alternatively, the coupler can include at least one photonic material layer (e.g., a photonic crystal layer or a photonic metamaterial layer) between and physically separated from the end portions and an array of cladding material elements extending through the photonic material layer. Also disclosed is a PIC structure including an on-chip system (e.g., a photonic computing system) including a crossing array implemented using any of the above-described couplers.

Abstract: Structures including a cavity adjacent to an edge coupler and methods of forming such structures. The structure comprises a semiconductor substrate including a cavity with a sidewall, a dielectric layer on the semiconductor substrate, and an edge coupler on the dielectric layer. The structure further comprises a fill region including a plurality of fill features adjacent to the edge coupler. The fill region includes a reference marker at least partially surrounded by the plurality of fill features, and the reference marker has a perimeter that surrounds a surface area of the dielectric layer, and the surface area overlaps with a portion of the sidewall of the cavity.

Abstract: A photonic integrated circuit (PIC) die are provided. The PIC die includes a set of optical connect grooves including a first groove aligning a core of a first optical fiber positioned with a first optical component in a first layer at a first vertical depth in a plurality of layers of a body of the die, and a second groove aligning a core of a second optical fiber positioned therein with a second optical component in a second, different layer at a second different vertical depth in the plurality of layers. The grooves may also have end faces at different lateral depths from an edge of the body of the PIC die. Any number of the first and second grooves can be used to communicate an optical signal to any number of layers at different vertical and/or lateral depths within the body of the PIC die.

Abstract: Structures including a photodetector and methods of forming a structure including a photodetector. The structure comprises a semiconductor layer comprising a crystalline semiconductor material, a waveguide core including a first sidewall and a second sidewall, and a photodetector including a light-absorbing layer, an anode, and a cathode. The light-absorbing layer includes a first portion and a second portion that are disposed on the semiconductor layer. The first portion of the light-absorbing layer is adjacent to the first sidewall of the waveguide core, and the second portion of the light-absorbing layer is adjacent to the second sidewall of the waveguide core.