Abstract: An encoder includes memory and circuitry coupled to the memory. The circuitry is configured to: generate an encoded bitstream that includes a multi-layer structure; and store, in the encoded bitstream, a syntax element having a value indicating that a layer in the multi-layer structure to be output by a decoder is arbitrarily specified, the syntax element defining that at least one layer is to be output from among layers arbitrarily specifiable by the decoder.

Abstract: Provided is an encoder including: circuitry; and memory coupled to the circuitry. In operation, the circuitry: performs a mapping process of Luma Mapping with Chroma Scaling (LMCS) for transforming a first pixel value space applied to a luma display image signal into a second pixel value space applied to a luma encoding process signal, using line segments forming a transform curve, each of which corresponds to a different one of sections obtained by partitioning the first pixel value space; and encodes an image, and in the performing of the LMCS, the circuitry determines the transform curve so that among boundary values in the second pixel value space, a first value obtained by dividing a boundary value by a base width defined according to a bit depth of the image is not equal to a second value obtained by dividing another boundary value by the base width.

Abstract: An encoder includes circuitry and memory. In both of a first type of residual coding where an orthogonal transform is applied and a second type of residual coding where the orthogonal transform is skipped, wherein when a restriction on a number of CABAC processes allows CABAC coding of a set of coefficient information flags, the circuitry: encodes the coefficient information flags by CABAC; and otherwise, the circuitry: skips the CABAC encoding of the coefficient information flags; and the circuitry encodes a remainder value of the coefficient with Golomb-Rice code when the coefficient information flags are encoded; and otherwise the circuitry encodes a value of the coefficient with the Golomb-Rice code, wherein in the second type of residual coding, the circuitry encodes absolute value flags each relating to an absolute value of the coefficient after encoding the coefficient information flags and before encoding the remainder value of the coefficient.

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component, and generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry modifies the first coefficient value by performing an arithmetic right shift by 7 bits on the first coefficient value. The circuitry generates a third coefficient value by adding the modified first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value.

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: performs quantization on a plurality of transform coefficients of a current block to be encoded, using a quantization matrix when orthogonal transform is performed on the current block and secondary transform is not performed on the current block; and performs quantization on the plurality of transform coefficients of the current block without using the quantization matrix when orthogonal transform is not performed on the current block and when both orthogonal transform and secondary transform are performed on the current block.

Abstract: According to one aspect of the present disclosure, a decoder includes memory and a processor coupled to the memory. The processor is configured to split a current picture into tiles, generate a slice having a rectangular shape and located at a lower-right corner of the current picture, the slice including at least a part of a tile among the tiles, generate first information on a region of the slice with header information, the header information not including information identical to the first information, and decode the slice with the first information.

Abstract: An encoder includes circuitry which generates a first coefficient value by applying a CCALF process to a first reconstructed image sample of a luma component; generates a second coefficient value by applying an ALF process to a second reconstructed image sample of a chroma component; generates a third coefficient value by adding the first coefficient value to the second coefficient value; and encodes a third reconstructed image sample of the chroma component using the third coefficient value. The circuitry writes a first parameter into a sequence parameter set; writes a second parameter into a parameter set of a picture in response to a value of the first parameter being 1; writes a third parameter into a slice header in response to the value of the first parameter being 1; and writes a fourth parameter into a coding tree unit in response to a value of the third parameter being 1.

Abstract: Provided is an encoder including: circuitry; and memory coupled to the circuitry, in which the circuitry: derives a prediction residual indicating a difference between a current block and a prediction image of the current block; performs primary transform on the prediction residual, and performs secondary transform on a result of the primary transform; performs quantization on a result of the secondary transform; and encodes a result of the quantization. In the performing of the secondary transform, when a matrix weighted intra prediction included in intra prediction and having prediction modes is used, the circuitry uses, as a transform set for the secondary transform, a common transform set shared among the prediction modes. The matrix weighted intra prediction generates the prediction image by performing matrix calculation on a pixel sequence obtained from pixel values of surrounding pixels of the current block.

Abstract: An encoder includes: memory; and circuitry coupled to the memory and configured to generate an encoded bitstream. In the encoder, when a multi-layer structure is to be included in the encoded bitstream to be generated, the circuitry generates the encoded bitstream by including in the encoded bitstream (i) a sequence parameter set that refers to a video parameter set and (ii) a network abstraction layer (NAL) unit having a layer identification (ID) greater than zero in the multi-layer structure, and when the multi-layer structure is not to be included in the encoded bitstream to be generated, the circuitry generates the encoded bitstream by including in the encoded bitstream a sequence parameter set that does not refer to the video parameter set.

Abstract: A planar antenna comprising a slot formed in a flat conductor, wherein the slot includes a first slot extending in a first direction between a first feeding point and a second feeding point, a second slot extending in a second direction different from the first direction from an end portion of the first slot, a third slot extending in a fourth direction opposite to the second direction from an end portion of the first slot in a third direction opposite to the first direction, reaching an open end in the fourth direction, and a J-shaped slot extending from an end portion of the second slot in the second direction to an open end open in the first direction, and wherein a slot width at an open end of the J-shaped slot is wider than a slot width at the end portion of the second slot in the second direction.

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: derives a motion vector of a current block by referring to at least one reference picture different from a picture to which the current block belongs; performs a mode for estimating, for each sub-block unit of sub-blocks obtained by splitting the current block, a surrounding region of the motion vector to correct the motion vector; determines whether to apply deblocking filtering to each of boundaries between neighboring ones of the sub-blocks; and applies the deblocking filtering to the boundary, based on a result of the determination.

Abstract: The ignition device is attached to a cylinder head of an internal combustion engine in which an air flow flowing from an intake port side toward an exhaust port side along a ceiling surface of the combustion chamber is formed. The ignition device includes a housing, a center electrode, a ground electrode, and a wall portion. The wall portion serves as a barrier against the air flow flowing from the outside toward the discharge gap in the radial direction of the center electrode. The ignition device is attached to the cylinder head in a direction in which the wall portion is located between the intake port and the discharge gap in the radial direction of the center electrode.

Abstract: An encoder, includes: memory; and circuitry coupled to the memory, in which in a first encoding process, the circuitry quantizes a current block using a first quantization matrix in both of a first case where the circuitry performs primary transform and the circuitry does not perform secondary transform and a second case where the circuitry performs both the primary transform and the secondary transform, in a second encoding process, the circuitry quantizes the current block using a second quantization matrix in a third case where the circuitry performs primary transform and the circuitry does not perform secondary transform, and in a third encoding process, the circuitry quantizes the current block without using a quantization matrix in both of a fourth case where both the primary transform and the secondary transform are skipped and a fifth case where both the primary transform and the secondary transform are performed.

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: encodes a video using (i) a decoding parameter set (DPS) which is identified based on presence of the DPS in a bitstream and (ii) a sequence parameter set (SPS) which is identified based on an identifier for the SPS.

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In residual coding of a current block, the circuitry, in operation, encodes a subblock flag by Context-based Adaptive Binary Arithmetic Coding (CABAC) in both of a first type of residual coding where an orthogonal transform is performed and a second type of residual coding where the orthogonal transform is skipped, the subblock flag indicating whether a non-zero coefficient is included in a plurality of coefficients for a subblock within the current block, wherein a first syntax used for the first type of residual coding is different from a second syntax used for the second type of residual coding; and controls a number of CABAC processes, wherein the encoding of the subblock flag is not counted as the number of CABAC processes.

Abstract: A method for generating a free lime content estimation model for steelmaking slag, by which the free lime content of steelmaking slag can be estimated in a simple, rapid, and highly accurate manner, a method for estimating the free lime content of steelmaking slag, a method for managing shipment of steelmaking slag, and a method for manufacturing iron and steel slag for road construction. The method for estimating the free lime content includes: acquiring an emission spectrum by irradiating steelmaking slag with a laser to convert a portion of a surface of the slag into plasma and acquiring an emission spectrum from the plasma; and estimating a free lime content by inputting intensities of an emission spectrum including peaks caused by emission lines of Ca, Fe, and Si, within the acquired emission spectrum, into a free lime content estimation model, to output the free lime content of the steelmaking slag.

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry determines whether to split a current luma virtual pipeline decoding unit (VPDU) into smaller blocks. When it is determined not to split the current luma VPDU into smaller blocks, the circuitry predicts a block of chroma samples without using luma samples. When it is determined to split the luma VPDU into smaller blocks, the circuitry predicts the block of chroma samples using luma samples. The circuitry encodes the block using the predicted chroma samples.

Abstract: An encoder includes memory and circuitry coupled to the memory. The circuitry stores a total number of temporal sub-layers in a bitstream into either a picture timing supplemental enhancement information (SEI) message or a buffering period SEI message, and encodes the total number of the temporal sub-layers.

Abstract: An operation service providing system 1 that provides a prescribed operation service includes an operation service execution unit 10 configured to control execution of the prescribed operation service, and an audit preparation unit 20 configured to execute a prescribed audit preparation work in preparation for an audit work for auditing whether the prescribed operation service is executed based on a prescribed standard. The audit preparation unit executes the prescribed audit preparation work for the prescribed operation service each time the operation service execution unit executes the prescribed operation service.

Abstract: An encoder includes memory and circuitry coupled to the memory. The circuitry is configured to: generate an encoded bitstream that includes a multi-layer structure; and store, in the encoded bitstream, a syntax element having a value indicating that a layer in the multi-layer structure to be output by a decoder is arbitrarily specified, the syntax element defining that at least one layer is to be output from among layers arbitrarily specifiable by the decoder.