Patents by Inventor Yusuke Kato
Yusuke Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12658558Abstract: Provided is a vehicle antenna system that is able to efficiently receive circularly polarized signals from the zenith direction. A vehicle antenna system (100) is provided with window glass (30) for a vehicle (20) and an antenna element (40) that is able to receive signals of a predetermined frequency band. The antenna element (40) is provided on a first principal plane of a dielectric substrate (43), and includes a radiating conductor (41) that is able to receive circularly polarized signals of a first frequency, and a grounding conductor (44) positioned opposite the radiating conductor (41) via the dielectric substrate (43). The normal direction of the first principal plane is less than or equal to 45° relative to the vertical direction, and the radiating conductor (41) is positioned away from the inner surface of the window glass (30) via the dielectric layer (60) in the direction of the vehicle interior.Type: GrantFiled: May 10, 2022Date of Patent: June 16, 2026Assignee: AGC Inc.Inventors: Shoichi Takeuchi, Hideaki Shoji, Toshiki Sayama, Yusuke Kato
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Publication number: 20260163934Abstract: An encoder includes memory and circuitry which: (i) encodes an image block; (ii) when encoding the image block: binarizes coefficient information indicating coefficients of the image block; and controls whether to apply arithmetic encoding to a binary data string obtained by binarizing the coefficient information; and (iii) when binarizing the coefficient information: binarizes the coefficient information according to a first syntax structure when arithmetic encoding is applied to the data string and a predetermined condition is not satisfied; binarizes the coefficient information according to a second syntax structure when arithmetic encoding is applied to the data string and the predetermined condition is satisfied; binarizes the coefficient information according to the second syntax structure when no arithmetic encoding is applied to the data string; and subtracts 1 from a value of an initial non-zero coefficient when no arithmetic encoding is applied to the data string when encoding the image block.Type: ApplicationFiled: August 6, 2025Publication date: June 11, 2026Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Yusuke KATO
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Publication number: 20260156297Abstract: An encoder including circuitry and memory coupled to the circuitry. In a second type of residual coding among a first type of residual coding where an orthogonal transform is applied to a current block and the second type of residual coding where the orthogonal transform is skipped for the current block, wherein a first syntax used for the first type of residual coding is different from a second syntax used for the second type of residual coding, the circuitry: in a first loop process, derives a context index by using at least one of a plurality of surrounding coefficients; and encodes a plurality of coefficient information flags by CABAC with the derived context index; and in a second loop process of the plurality of loop processes, encodes a plurality of absolute value flags by CABAC with another context index.Type: ApplicationFiled: October 15, 2025Publication date: June 4, 2026Inventors: Yusuke KATO, Takahiro NISHI, Tadamasa TOMA, Kiyofumi ABE
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Patent number: 12647591Abstract: According to one aspect of the present disclosure, a decoder includes memory and a processor coupled to the memory. The processor is configured to split a current picture into tiles, generate a slice having a rectangular shape and located at a lower-right corner of the current picture, the slice including at least a part of a tile among the tiles, generate first information on a region of the slice with header information, the header information not including information identical to the first information, and decode the slice with the first information.Type: GrantFiled: October 11, 2024Date of Patent: June 2, 2026Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe, Yusuke Kato
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Patent number: 12627058Abstract: An antenna and an antenna apparatus for vehicle that can achieve reduction in size are provided. The antenna includes a dielectric body, a radiation conductor disposed on a first principal surface side of the dielectric body, and a ground conductor disposed on a second principal surface side of the dielectric body. The ground conductor is a planar conductor disposed within a rectangular region having a length LG1 in a first direction and a length LG2 in a second direction. When the ground conductor is divided into a first region and a second region, the ground conductor includes a slit that starts extending toward the inside of the ground conductor starting from an outer edge of the ground conductor in the first region.Type: GrantFiled: January 10, 2024Date of Patent: May 12, 2026Assignee: AGC INC.Inventors: Yusuke Kato, Shoichi Takeuchi, Hideaki Shoji, Toshiki Sayama
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Patent number: 12627036Abstract: An antenna device with an attachment member includes an antenna including a radiation plate provided with radiation face that radiates vertically polarized waves, a housing portion that houses the antenna, an attachment member that attaches the housing portion to a vehicle, and a metal fixing portion that is formed in an elongated shape to one end of the attachment member, that abuts a back face of the housing portion facing toward an opposite side to the radiation face, and that fixes the housing portion. Viewed from a thickness direction of the radiation plate, the fixing portion is disposed between a first region formed to the back face on one side in the extension direction of a first straight line, and a second region formed to the back face on another side in the extension direction of the first straight line.Type: GrantFiled: June 11, 2024Date of Patent: May 12, 2026Assignee: AGC INC.Inventors: Toshiki Sayama, Hideaki Shoji, Yusuke Kato
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Patent number: 12620687Abstract: A vehicle-type-antenna-device includes: a dielectric plate for a vehicle; and an antenna attached to the dielectric-plate; wherein the antenna includes: a dielectric-layer disposed along a curved-surface of the dielectric-plate, a conductive-layer laminated on the dielectric-layer and having a planar-pattern formed thereon, a feeding portion electrically connected to the planar-pattern, and an electronic-component electrically connected to the conductive-layer and having a higher rigidity than a combined rigidity of the dielectric-layer and the conductive-layer, wherein a curved-region of the dielectric-plate is defined as an extent to which the dielectric-layer-is attached to the curved-surface includes a first-curved line having a smallest radius-of-curvature in the curved-region and a second-curved line intersecting the first-curved line and having a radius-of-curvature larger than that of the first-curved line, and a longitudinal direction of an extent of the dielectric-plate to which the electronic-compoType: GrantFiled: September 12, 2024Date of Patent: May 5, 2026Assignee: AGC INC.Inventors: Shoichi Takeuchi, Hideaki Shoji, Toshiki Sayama, Yusuke Kato
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Patent number: 12617940Abstract: A curable composition and a cured material containing: a compound (A) having one (meth)acrylate group in one molecule; a compound (B) having two or more (meth)acrylate groups in one molecule; a polymerization initiator (C); a dispersant (D); and a thermally conductive filler (E) containing zinc oxide.Type: GrantFiled: January 8, 2020Date of Patent: May 5, 2026Assignee: Cosmo Oil Lubricants Co., Ltd.Inventors: Ryuji Terauchi, Yusuke Kato, Masaaki Kondo, Takuya Goto
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Publication number: 20260106032Abstract: A medical assistance apparatus including a processor including hardware. The processor being configured to: record an examination result for a patient; transmit a report based on the examination result to an external apparatus, infer, based on the report on the patient in a past, examination details and an examination timing of a subsequent examination of the patient; determine whether or not read-status information has been received from the external apparatus within a predetermined time period; and when it is determined that the read-status information has not been received within the predetermined time period, transmit a request for generation of an examination order according to the examination details and the examination timing of the subsequent examination of the patient to the external apparatus.Type: ApplicationFiled: December 16, 2025Publication date: April 16, 2026Applicant: OLYMPUS MEDICAL SYSTEMS CORP.Inventor: Yusuke KATO
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Patent number: 12593028Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry, in operation: derives, as a first parameter, a total sum of absolute values of sums of horizontal gradient values respectively for pairs of relative pixel positions; derives, as a second parameter, a total sum of absolute values of sums of vertical gradient values respectively for the pairs of relative pixel positions; derives, as a third parameter, a total sum of horizontal-related pixel difference values respectively for the pairs of relative pixel positions; derives, as a fourth parameter, a total sum of vertical-related pixel difference values respectively for the pairs of relative pixel positions; derives, as a fifth parameter, a total sum of vertical-related sums of horizontal gradient values respectively for the pairs of relative pixel positions; and generates a prediction image to be used to encode the current block using the first, second, third, fourth, and fifth parameters.Type: GrantFiled: June 27, 2024Date of Patent: March 31, 2026Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
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Patent number: 12581124Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry determines whether or not a current video to be processed is a progressive video. When it is determined that the current video is a progressive video, the encoder encodes, into a bitstream, one syntax element indicating a chroma location type which is information indicating locations of chroma samples relative to luma samples for a frame included in the current video. When it is determined that the current video is not a progressive video, the encoder encodes two syntax elements into the bitstream, each of which indicates the chroma location type for a different one of fields of two types included in the current video.Type: GrantFiled: August 6, 2024Date of Patent: March 17, 2026Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
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Patent number: 12581066Abstract: An image encoder includes: circuitry; and a memory coupled to the circuitry. The circuitry, in operation: calculates first values of a current block using intra prediction, the intra prediction being limited to planar mode, the planar mode using multiple reference pixels for each pixel location of the current block; calculates second values of the current block using inter prediction; calculates third values of the current block by weighting the first values and the second values; and encodes the current block using the third values, and in the calculating of the third values, a first weight is applied to the first values and a second weight is applied to the second values, the second weight being different from the first weight.Type: GrantFiled: May 7, 2024Date of Patent: March 17, 2026Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Ru Ling Liao, Chong Soon Lim, Jing Ya Li, Han Boon Teo, Hai Wei Sun, Che Wei Kuo, Yusuke Kato, Tadamasa Toma, Kiyofumi Abe, Takahiro Nishi
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Publication number: 20260075230Abstract: An encoder that includes memory and circuitry coupled to the memory. The circuitry encodes a slice into one or more data access regions in a variable length encoding process. The circuitry encodes one or more offsets into a slice header, based on a flag written into a sequence header and a total number of the one or more data access regions. The one or more offsets each specify a head position of a corresponding one of the one or more data access regions in a bitstream. When the flag indicates that the one or more offsets are to be encoded and the total number is at least two, the one or more offsets are encoded. The flag switches between encoding and not encoding the one or more offsets regardless of whether the total number is at least two.Type: ApplicationFiled: November 18, 2025Publication date: March 12, 2026Inventors: Kiyofumi ABE, Takahiro Nishi, Tadamasa Toma, Yusuke Kato
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Publication number: 20260075240Abstract: An encoder: generates, in an inter prediction mode, a first prediction image of a current block to be processed, based on a derived motion vector; and generates a final prediction image of the current block by applying an update process to the first prediction image. Candidates for the update process include a first process and a second process. The first process is a BDOF process. The second process is a process of mixing the first prediction image with a second prediction image generated in intra prediction for the current block. In the applying of the update process, the first process and the second process are mutually exclusively applied.Type: ApplicationFiled: November 18, 2025Publication date: March 12, 2026Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Yusuke KATO
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Publication number: 20260067462Abstract: An encoder including circuitry and memory coupled to the circuitry. In both of a first case where an orthogonal transform is performed and a second case where the orthogonal transform is skipped, when a number of CABAC processes is within an allowable range, the circuitry: encodes a plurality of coefficient information flags by CABAC; and encodes a remainder value of the coefficient; and when the number of CABAC processes is not within the allowable range, the circuitry: skips the encoding of the plurality of coefficient information flags, wherein in the first case, the circuitry: converts the coefficient to a second coefficient by using a poszero value that is determined using a plurality of surrounding coefficients; and encodes a value of the second coefficient, and wherein in the second case, the circuitry: encodes the value of the coefficient.Type: ApplicationFiled: November 6, 2025Publication date: March 5, 2026Inventors: Yusuke KATO, Takahiro NISHI, Tadamasa TOMA, Kiyofumi ABE
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Patent number: 12568205Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry encodes, into a sequence parameter set, a first parameter indicating that a change in a picture size is allowed for any of pictures, determines whether or not a reference picture having a same size as a current picture is available to encode the current picture, and disables temporal motion vector prediction when it is determined that the reference picture having the same size as the current picture is not available.Type: GrantFiled: April 10, 2024Date of Patent: March 3, 2026Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe, Yusuke Kato
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Patent number: 12568234Abstract: An encoder includes: memory; and circuitry coupled to the memory and configured to generate an encoded bitstream. In the encoder, when a multi-layer structure is to be included in the encoded bitstream to be generated, the circuitry generates the encoded bitstream by including in the encoded bitstream (i) a sequence parameter set that refers to a video parameter set and (ii) a network abstraction layer (NAL) unit having a layer identification (ID) greater than zero in the multi-layer structure, and when the multi-layer structure is not to be included in the encoded bitstream to be generated, the circuitry generates the encoded bitstream by including in the encoded bitstream a sequence parameter set that does not refer to the video parameter set.Type: GrantFiled: July 17, 2024Date of Patent: March 3, 2026Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
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Publication number: 20260052266Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry encodes a hypothetical reference decoder (HRD) parameter into a buffering period supplemental enhancement information (SEI) message independently from a sequence parameter set. The HRD parameter is related to a decoding unit and an HRD.Type: ApplicationFiled: October 28, 2025Publication date: February 19, 2026Inventors: Virginie DRUGEON, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
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Publication number: 20260046430Abstract: An encoder includes circuitry, and memory coupled to the circuitry. The circuitry, in operation, for each of a plurality of sub-bitstreams having mutually different frame rates, encodes identification information into a header of a bitstream including the plurality of sub-bitstreams, the identification information indicating a temporal ID that is an identifier of a temporal layer related to a temporal scalability and corresponds to the sub-bitstream, and encodes level information indicating a conformance level of the sub-bitstream.Type: ApplicationFiled: October 21, 2025Publication date: February 12, 2026Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Yusuke KATO
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Patent number: D1114874Type: GrantFiled: February 27, 2024Date of Patent: February 24, 2026Assignee: SEIKO EPSON CORPORATIONInventor: Yusuke Kato