Patents by Inventor Yusuke Nonaka

Yusuke Nonaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12690237
    Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm?1 and less than or equal to 0.7 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm?1 and less than or equal to 4.1 nm?1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm?1 and less than or equal to 1.4 nm?1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm?1 and less than or equal to 7.1 nm?1.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: July 21, 2026
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kengo Akimoto, Hiroki Ohara, Tatsuya Honda, Takatsugu Omata, Yusuke Nonaka, Masahiro Takahashi, Akiharu Miyanaga
  • Publication number: 20260156899
    Abstract: A semiconductor device includes a semiconductor switching element having a double-gate trench gate structure. The semiconductor switching element includes an upper electrode electrically connected to a body region of a second conductivity type and an impurity region of a first conductivity type, a gate wiring connected to a gate electrode layer of the double-gate trench gate structure, and a shield wiring connected to a shield electrode of the double-gate trench gate structure. The upper electrode, the gate wiring and the shield wiring are electrically isolated from each other.
    Type: Application
    Filed: December 16, 2025
    Publication date: June 4, 2026
    Inventors: Shin TAKIZAWA, Yusuke NONAKA, Kenta GODA, Takeshi HAGINO
  • Patent number: 12439620
    Abstract: A semiconductor device includes a cell portion and a peripheral portion. The cell portion has a semiconductor element including a drift layer, a first impurity region, a second impurity region, trench-gate structures, a high-concentration layer, an interlayer insulating film, a first electrode and a second electrode. The interlayer insulating film is located on the trench-gate structures, the first impurity region and the second impurity region, and has a first contact hole communicating with the first impurity region and the second impurity region. The peripheral portion has a section facing the cell portion in one direction, and the interlayer insulating film further has a second contact hole at the section of the peripheral portion. The second contact hole exposes the first impurity region, and the first electrode is electrically connected to the first impurity region through the second contact hole in the peripheral portion.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: October 7, 2025
    Assignee: DENSO CORPORATION
    Inventors: Shin Takizawa, Yusuke Nonaka, Kenta Gouda, Shunsuke Harada
  • Patent number: 12426304
    Abstract: A semiconductor device has a cell portion and a peripheral portion. The cell portion includes a semiconductor substrate, a first impurity region, a second impurity region, and a contact region for the second impurity region. The semiconductor substrate has a drift layer. The first impurity region is on the drift layer. The second impurity region is on a surface layer portion of the first impurity region. A length of the cell portion is identical to a length of the second impurity region in one direction. The contact region extends from the cell portion to the peripheral portion. A length of a section of the contact region at the peripheral section in the one direction is defined as a protruding length, and a length of the second impurity region is defined as a second-impurity-region length. A ratio of the protruding length to the second-impurity-region length is 0.1 or smaller.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: September 23, 2025
    Assignee: DENSO CORPORATION
    Inventors: Kenta Gouda, Yusuke Nonaka, Takeshi Hagino
  • Patent number: 12399641
    Abstract: There is provided a storage migration method including sending, by a maintenance PC, a power-off instruction for migration to a migration source storage, sending, by the migration source storage, storage configuration information to the maintenance PC, turning off the power of the migration source storage when it is confirmed that the maintenance PC has received the storage configuration information, sending, by the maintenance PC, the storage configuration information and a power-on instruction for migration to a migration destination storage, and outputting, by the maintenance PC, a migration completion notification when a disk drive relocated from the migration source storage can be confirmed to be set in the migration destination storage.
    Type: Grant
    Filed: March 5, 2024
    Date of Patent: August 26, 2025
    Assignee: HITACHI VANTARA, LTD.
    Inventors: Yoshiki Tamura, Hiroshi Miki, Yusuke Nonaka, Yudai Takayama
  • Patent number: 12400590
    Abstract: Emission efficiency of a light-emitting element is improved. The light-emitting element has a pair of electrodes and an EL layer between the pair of electrodes. The EL layer includes a first light-emitting layer and a second light-emitting layer. The first light-emitting layer includes a fluorescent material and a host material. The second light-emitting layer includes a phosphorescent material, a first organic compound, and a second organic compound. An emission spectrum of the second light-emitting layer has a peak in a yellow wavelength region. The first organic compound and the second organic compound form an exciplex.
    Type: Grant
    Filed: November 20, 2023
    Date of Patent: August 26, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Takahiro Ishisone, Nobuharu Ohsawa, Yusuke Nonaka, Toshiki Sasaki
  • Patent number: 12340108
    Abstract: Performance deterioration of a storage system is prevented. A storage controller includes one or more processors, and one or more memories configured to store one or more programs to be executed by the one or more processors. The one or more processors are configured to execute conversion of converting metadata before conversion for controlling the storage system into metadata after conversion in a format corresponding to a new controller newly installed in the storage system, execute control of switching an access destination between the metadata before conversion and the metadata after conversion according to an access control code during the conversion, and access the metadata before conversion without using the access control code before start of the conversion.
    Type: Grant
    Filed: September 19, 2023
    Date of Patent: June 24, 2025
    Assignee: Hitachi Vantara, Ltd.
    Inventors: Shugo Ogawa, Yoshihiro Yoshii, Ryosuke Tatsumi, Tomohiro Yoshihara, Yusuke Nonaka, Hiroshi Miki
  • Publication number: 20250169115
    Abstract: A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion.
    Type: Application
    Filed: January 17, 2025
    Publication date: May 22, 2025
    Inventors: Tatsuya HONDA, Masashi TSUBUKU, Yusuke NONAKA, Takashi SHIMAZU, Shunpei YAMAZAKI
  • Publication number: 20250120278
    Abstract: A multicolor light-emitting element that utilizes fluorescence and phosphorescence and is advantageous for practical application is provided. The light-emitting element has a stacked-layer structure of a first light-emitting layer containing a host material and a fluorescent substance and a second light-emitting layer containing two kinds of organic compounds and a substance that can convert triplet excitation energy into luminescence. Note that light emitted from the first light-emitting layer has an emission peak on the shorter wavelength side than light emitted from the second light-emitting layer.
    Type: Application
    Filed: December 13, 2024
    Publication date: April 10, 2025
    Inventors: Takahiro ISHISONE, Satoshi SEO, Yusuke NONAKA, Nobuharu OHSAWA
  • Patent number: 12225739
    Abstract: A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion.
    Type: Grant
    Filed: April 4, 2024
    Date of Patent: February 11, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Honda, Masashi Tsubuku, Yusuke Nonaka, Takashi Shimazu, Shunpei Yamazaki
  • Patent number: 12218251
    Abstract: A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion.
    Type: Grant
    Filed: April 4, 2024
    Date of Patent: February 4, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Honda, Masashi Tsubuku, Yusuke Nonaka, Takashi Shimazu, Shunpei Yamazaki
  • Publication number: 20250028470
    Abstract: There is provided a storage migration method including sending, by a maintenance PC, a power-off instruction for migration to a migration source storage, sending, by the migration source storage, storage configuration information to the maintenance PC, turning off the power of the migration source storage when it is confirmed that the maintenance PC has received the storage configuration information, sending, by the maintenance PC, the storage configuration information and a power-on instruction for migration to a migration destination storage, and outputting, by the maintenance PC, a migration completion notification when a disk drive relocated from the migration source storage can be confirmed to be set in the migration destination storage.
    Type: Application
    Filed: March 5, 2024
    Publication date: January 23, 2025
    Applicant: Hitachi, Ltd.
    Inventors: Yoshiki TAMURA, Hiroshi MIKI, Yusuke NONAKA, Yudai TAKAYAMA
  • Publication number: 20250024697
    Abstract: An object of one embodiment of the present invention is to provide a multicolor light-emitting element that utilizes fluorescence and phosphorescence and is advantageous for practical application. The light-emitting element has a stacked-layer structure of a first light-emitting layer containing a host material and a fluorescent substance, a separation layer containing a substance having a hole-transport property and a substance having an electron-transport property, and a second light-emitting layer containing two kinds of organic compounds that form an exciplex and a substance that can convert triplet excitation energy into luminescence. Note that a light-emitting element in which light emitted from the first light-emitting layer has an emission spectrum peak on the shorter wavelength side than an emission spectrum peak of the second light-emitting layer is more effective.
    Type: Application
    Filed: July 19, 2024
    Publication date: January 16, 2025
    Inventors: Nobuharu OHSAWA, Yusuke NONAKA, Takahiro ISHISONE, Satoshi SEO, Takuya KAWATA
  • Publication number: 20250020459
    Abstract: A road surface abnormality detection apparatus includes a data acquisition unit, a prediction unit, and an abnormality detection unit. The data acquisition unit acquires road surface observation data obtained by observing a road surface in a chronological order. The prediction unit predicts road surface data at a first timing from a plurality of road surface observation data at a plurality of respective timings earlier than the first timing by using a trained model generated in advance through machine learning. The abnormality detection unit detects, when a difference between road surface observation data at the first timing and the predicted road surface data at the first timing is equal to or larger than a predetermined threshold, an abnormality of the road surface.
    Type: Application
    Filed: June 27, 2024
    Publication date: January 16, 2025
    Applicant: NEC Corporation
    Inventors: Masahiro YAMAGUCHI, Kyota HIGA, Yusuke NONAKA, Hideo SAITO, Hideaki UCHIYAMA
  • Patent number: 12171127
    Abstract: A multicolor light-emitting element that utilizes fluorescence and phosphorescence and is advantageous for practical application is provided. The light-emitting element has a stacked-layer structure of a first light-emitting layer containing a host material and a fluorescent substance and a second light-emitting layer containing two kinds of organic compounds and a substance that can convert triplet excitation energy into luminescence. Note that light emitted from the first light-emitting layer has an emission peak on the shorter wavelength side than light emitted from the second light-emitting layer.
    Type: Grant
    Filed: November 15, 2023
    Date of Patent: December 17, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro Ishisone, Satoshi Seo, Yusuke Nonaka, Nobuharu Ohsawa
  • Patent number: 12154827
    Abstract: A semiconductor device which has favorable electrical characteristics and can be highly integrated is provided. The semiconductor device includes a first insulator; an oxide over the first insulator; a second insulator over the oxide; a first conductor over the second insulator; a third insulator in contact with a top surface of the first insulator, a side surface of the oxide, a top surface of the oxide, a side surface of the second insulator, and a side surface of the first conductor; and a fourth insulator over the third insulator. The third insulator includes an opening exposing the first insulator, and the fourth insulator is in contact with the first insulator through the opening.
    Type: Grant
    Filed: October 24, 2023
    Date of Patent: November 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshihiko Takeuchi, Tsutomu Murakawa, Hiroki Komagata, Daisuke Matsubayashi, Noritaka Ishihara, Yusuke Nonaka
  • Patent number: 12125906
    Abstract: In a semiconductor device having a lateral transistor, a source wiring layer is disposed above at least a part of an interlayer insulating film. The interlayer insulating film is electrically connected to a source electrode and is extended toward a drain region to form a source field plate.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: October 22, 2024
    Assignee: DENSO CORPORATION
    Inventors: Shinichiro Yanagi, Yusuke Nonaka, Syogo Ikeura
  • Publication number: 20240256167
    Abstract: Performance deterioration of a storage system is prevented. A storage controller includes one or more processors, and one or more memories configured to store one or more programs to be executed by the one or more processors. The one or more processors are configured to execute conversion of converting metadata before conversion for controlling the storage system into metadata after conversion in a format corresponding to a new controller newly installed in the storage system, execute control of switching an access destination between the metadata before conversion and the metadata after conversion according to an access control code during the conversion, and access the metadata before conversion without using the access control code before start of the conversion.
    Type: Application
    Filed: September 19, 2023
    Publication date: August 1, 2024
    Inventors: Shugo OGAWA, Yoshihiro YOSHII, Ryosuke TATSUMI, Tomohiro YOSHIHARA, Yusuke NONAKA, Hiroshi MIKI
  • Publication number: 20240250183
    Abstract: A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion.
    Type: Application
    Filed: April 4, 2024
    Publication date: July 25, 2024
    Inventors: Tatsuya HONDA, Masashi TSUBUKU, Yusuke NONAKA, Takashi SHIMAZU, Shunpei YAMAZAKI
  • Publication number: 20240250184
    Abstract: A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion.
    Type: Application
    Filed: April 4, 2024
    Publication date: July 25, 2024
    Inventors: Tatsuya HONDA, Masashi TSUBUKU, Yusuke NONAKA, Takashi SHIMAZU, Shunpei YAMAZAKI